CLOSED-LOOP db SHIFT Degrees DIFFERENTIAL % DIFFERENTIAL Degrees a FEATURES High Speed MHz Bandwidth ( db, G = +) MHz Bandwidth ( db, G = +) V/ s Slew Rate ns Settling Time to.% ( = V Step) Ideal for Video Applications MHz Bandwidth (. db, G = +).% Differential Gain. Differential Phase Low Noise.9 nv/ Hz Input Voltage Noise pa/ Hz Inverting Input Current Noise Low Power. ma Supply Current max. ma Supply Current (Power-Down Mode) High Performance Disable Function Turn-Off Time ns Break Before Make Guaranteed Input to Output Isolation of db (OFF State) Flexible Operation Specified for V and peration.9 utput Swing Into a Load (V S = V) APPLICATIONS Professional Video Cameras Multimedia Systems NTSC, PAL & SECAM Compatible Systems Video Line Driver ADC/DAC Buffer DC Restoration Circuits Low Power Video Op Amp with Disable AD CONNECTION DIAGRAM -Pin Plastic Mini-DIP (N), SOIC (R) and Cerdip (Q) Packages OFFSET NULL IN +IN AD TOP VIEW DISABLE OUTPUT OFFSET NULL PRODUCT DESCRIPTION The AD is a composite and HDTV compatible, current feedback, video operational amplifier, ideal for use in systems such as multimedia, digital tape recorders and video cameras. The. db flatness specification at bandwidth of MHz (G = +) and the differential gain and phase of.% and. (NTSC) make the AD ideal for any broadcast quality video system. All these specifications are under load conditions of Ω (one Ω back terminated cable). The AD is ideal for power sensitive applications such as video cameras, offering a low power supply current of. ma max. The disable feature reduces the power supply current to only. ma, while the amplifier is not in use, to conserve power. Furthermore the AD is specified over a power supply range of ± V to ± V. The AD works well as an ADC or DAC buffer in video systems due to its unity gain bandwidth of MHz. Because the AD is a transimpedance amplifier, this bandwidth can be maintained over a wide range of gains while featuring a low noise of.9 nv/ Hz for wide dynamic range applications... = + R L = Ω ±.V ±.V 9.9........ 9 = + R F = R L = Ω f C =.MHz IRE MODULATED RAMP SUPPLY VOLTAGE ± Volts......... Closed-Loop Gain and Phase vs. Frequency, G = +, R L =, R F = Ω Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Differential Gain and Phase vs. Supply Voltage One Technology Way, P.O. Box 9, Norwood, MA -9, U.S.A. Tel: /9- Fax: /-
AD SPECIFICATIONS (@ T A = + C and V S = V dc, R L = unless otherwise noted) ADA ADS Parameter Conditions V S Min Typ Max Min Typ Max Units DYNAMIC PERFORMANCE db Bandwidth (G = +) R FB = ± V MHz (G = +) R FB = ± V MHz (G = +) R FB = ± V MHz (G = +) R FB = ± V MHz. db Bandwidth (G = +) R FB = ± V MHz Full Power Bandwidth (G = +) R FB = ± V MHz = V p-p, R L = Ω ± V MHz Slew Rate R L = Ω ± V V/µs R L = Ω ± V V/µs Settling Time to.% V Step, G = ± V ns Settling Time to.% V Step, G = ± V ns Differential Gain f =. MHz ± V.... % f -. MHz ± V.... % Differential Phase f =. MHz ± V.... Degrees f =. MHz ± V.... Degrees Total Harmonic Distortion f = MHz, = V p-p R L = Ω, G = + ± V dbc INPUT OFFSET VOLTAGE ± V, ± V.. mv T MIN T MAX ± V, ± V. mv Offset Voltage Drift µv/ C INPUT BIAS CURRENT Input T MIN T MAX ± V, ± V.. µa +Input T MIN T MAX ± V, ± V. µa OPEN-LOOP T MIN T MAX TRANSRESISTANCE = ± V, R L = Ω ± V.... MΩ = ±. V, R L = Ω ± V.... MΩ OPEN-LOOP T MIN T MAX DC VOLTAGE = ± V, R L = Ω ± V db = ±. V, R L = Ω ± V db COMMON-MODE REJECTION T MIN T MAX S V CM = ± V ± V db V CM = ±. V ± V db ±Input Current T MIN T MAX ± V, ± V.... µa/v POWER SUPPLY REJECTION ±. V to ± V S T MIN T MAX db ± Input Current T MIN T MAX.... µa/v INPUT VOLTAGE NOISE f = khz ± V, ± V.9.9 nv/ Hz INPUT CURRENT NOISE I IN, f = khz ± V, ± V pa/ Hz +I IN, f = khz ± V, ± V.. pa/ Hz INPUT COMMON-MODE ± V ±. ±. ±. ± V VOLTAGE RANGE ± V ± ± ± ± V OUTPUT CHARACTERISTICS Output Voltage Swing R L = Ω, T MIN T MAX ± V ±. ±.9 ±. ±.9 V R L = Ω ± V ±. ±.9 ±. ±.9 V R L = Ω, T MIN T MAX ± V ± ± V Short-Circuit Current ± V ma Output Current T MIN T MAX ± V, ± V ma OUTPUT RESISTANCE Open Loop ( MHz) Ω INPUT CHARACTERISTICS Input Resistance +Input ± V.. MΩ Input ± V Ω Input Capacitance +Input ± V pf DISABLE CHARACTERISTICS OFF Isolation f = MHz, See Figure db OFF Output Impedance See Figure (R F + R G ) pf (R F + R G ) pf
TOTAL POWER DISSIPATION Watts AD ADA ADS Parameter Conditions V S Min Typ Max Min Typ Max Units Turn On Time Z OUT = Low, See Figure ns Turn Off Time Z OUT = High ns Disable Pin Current Disable Pin = V ± V µa ± V 9 9 µa Min Disable Pin Current to Disable T MIN T MAX ± V, ± V µa POWER SUPPLY Operating Range + C to T MAX ±. ± ±. ± V T MIN ±. ± ±. ± V Quiescent Current ± V.... ma ± V.... ma T MIN T MAX ± V, ± V.. 9. ma Power-Down Current ± V.... ma ± V.... ma NOTES See Analog Devices Military Data Sheet for B Specifications. Slew rate measurement is based on % to 9% rise time with the amplifier configured for a gain of. Voltage Swing is defined as useful operating range, not the saturation range. Disable guaranteed break before make. Turn On Time is defined with ± V supplies using complementary output CMOS to drive the disable pin. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS Supply Voltage................................ ± V Internal Power Dissipation....... Observe Derating Curves Output Short Circuit Duration.... Observe Derating Curves Common-Mode Input Voltage......................±V S Differential Input Voltage........................ ± V Storage Temperature Range Plastic DIP........................ C to + C Cerdip........................... C to + C Small Outline IC................... C to + C Operating Temperature Range ADA........................... C to + C ADS.......................... C to + C Lead Temperature Range (Soldering sec)....... + C NOTES Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum raring conditions for extended periods may affect device reliability. -Pin Plastic Package: θ JA = 9 C/Watt; -Pin Cerdip Package: θ JA = C/Watt; -Pin SOIC Package: θ JA = C/Watt. ESD SUSCEPTIBILITY ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as volts, which readily accumulate on the human body and on test equipment, can discharge without detection. Although the AD features ESD protection circuitry, permanent damage may still occur on these devices if they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid any performance degradation or loss of functionality. ORDERING GUIDE Temperature Package Package Model Range Description Option ADAN C to + C -Pin Plastic DIP N- ADAR C to + C -Pin Plastic SOIC R- ADAR-REEL C to + C -Pin Plastic SOIC R- 9-9MPA C to + C -Pin Cerdip Q- MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD is limited by the associated rise in junction temperature. For the plastic packages, the maximum safe junction temperature is C. For the cerdip package, the maximum junction temperature is C. If these maximums are exceeded momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in the overheated condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the derating curves............ -PIN SOIC -PIN MINI-DIP -PIN CERDIP AMBIENT TEMPERATURE C -PIN MINI-DIP Maximum Power Dissipation vs. Temperature While the AD is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature is not exceeded under all conditions..µf kω AD.µF SEE TEXT Offset Null Configuration
INPUT BIAS CURRENT µa INPUT OFFSET VOLTAGE mv OUTPUT VOLTAGE Volts p-p SUPPLY CURRENT ma MAGNITUDE OF THE OUTPUT VOLTAGE ±Volts MAGNITUDE OF THE OUTPUT VOLTAGE ±Volts AD Typical Characteristics NO LOAD NO LOAD R L = Ω R L = Ω Figure. Input Common-Mode Voltage Range vs. Supply Voltage Figure. Output Voltage Swing vs. Supply ±V SUPPLY 9 V S = SUPPLY k k LOAD RESISTANCE Ohms Figure. Output Voltage Swing vs. Load Resistance JUNCTION TEMPERATURE C Figure. Supply Current vs. Junction Temperature NONINVERTING INPUT V S =, ±V V S = INVERTING INPUT V S =, ±V JUNCTION TEMPERATURE C Figure. Input Bias Current vs. Temperature JUNCTION TEMPERATURE C Figure. Input Offset Voltage vs. Junction Temperature
OUTPUT VOLTAGE Volts p-p VOLTAGE NOISE nv/ Hz CURRENT NOISE pa/ Hz CLOSED-LOOP OUTPUT RESISTANCE Ω OUTPUT RESISTANCE Ω SHORT CIRCUIT CURRENT ma OUTPUT CURRENT ma Typical Characteristics AD V S = ± V V S = ± V V S = + + + + + + + JUNCTION TEMPERATURE C Figure. Short Circuit Current vs. Temperature + + + + + + + JUNCTION TEMPERATURE C Figure. Linear Output Current vs. Temperature. M. = R F = V S = k k. k. k k M M M Figure 9. Closed-Loop Output Resistance vs. Frequency k M M M Figure. Output Resistance vs. Frequency, Disabled State ± OUTPUT LEVEL FOR % THD R L = Ω V S = TO ±V INVERTING INPUT CURRENT NOISE V S = VOLTAGE NOISE NONINVERTING INPUT CURRENT NOISE k M M M Figure. Large Signal Frequency Response k k k Figure. Input Voltage and Current Noise vs. Frequency
OUTPUT SWING FROM ±V TO V SLEW RATE V/µs HARMONIC DISTORTION dbc HARMONIC DISTORTION dbc COMMON-MODE REJECTION db POWER SUPPLY REJECTION db AD Typical Characteristics 9 R F = A V = + V S = CURVES ARE FOR WORST CASE CONDITION WHERE ONE SUPPLY IS VARIED WHILE THE OTHER IS HELD CONSTANT k k M M M Figure. Common-Mode Rejection vs. Frequency k k M M M Figure. Power Supply Rejection vs. Frequency = V p-p R L = Ω = + V S = ±V SUPPLIES = + R L = Ω nd HARMONIC rd HARMONIC UT = V p-p nd HARMONIC nd rd rd HARMONIC nd rd UT = V p-p k k k M M Figure. Harmonic Distortion vs. Frequency (R L = Ω) k k k M M Figure. Harmonic Distortion vs. Frequency (R L = Ω).% R L = Ω.% R F = R G = kω R L = Ω = = +.%.% = + SETTLING TIME ns Figure. Output Swing and Error vs. Settling Time Figure. Slew Rate vs. Supply Voltage
db BANDWIDTH MHz db BANDWIDTH MHz CLOSED-LOOP db CLOSED-LOOP db SHIFT Degrees SHIFT Degrees Typical Characteristics, Noninverting Connection AD R F V ns R G.µF TO TEKTRONIX P FET PROBE 9 AD HP PULSE GENERATOR Ω.µF R L % V Figure 9. Noninverting Amplifier Connection Figure. Small Signal Pulse Response, Gain = +, R F = kω, R L = Ω, V S = ± V = + R L = Ω 9 = + R L = kω 9 ±.V ±.V Figure. Closed-Loop Gain and Phase vs. Frequency, G= +. R F = kω for ± V, 9 Ω for ± V and ±. V ±.V ±.V Figure. Closed-Loop Gain and Phase vs. Frequency, G= +, R F = kω for ± V, 9 Ω for ± V and ±. V 9 G = + R L = Ω = mv p-p R F = PEAKING db G = + R L = kω = mv p-p PEAKING db R F = kω PEAKING. db R F = R F = kω PEAKING.dB R F =.kω R F =.kω Figure. Bandwidth vs. Supply Voltage, Gain = +, R L = Ω Figure. db Bandwidth vs. Supply Voltage G = +, R L = kω
db BANDWIDTH MHz db BANDWIDTH MHz CLOSED-LOOP db CLOSED-LOOP db SHIFT Degrees SHIFT Degrees AD Typical Characteristics, Noninverting Connection mv ns V ns 9 9 % % V V Figure. Small Signal Pulse Response, Gain = +, R F = Ω, R L = Ω, V S = ± V Figure. Large Signal Pulse Response, Gain = +, R F = Ω, R L = Ω, V S = ± V = + R F = Ω R L = Ω 9 = + R F = Ω R L = kω 9 9 ±.V ±.V Figure. Closed-Loop Gain and Phase vs. Frequency, G = +, R L = Ω 9 ±.V ±.V Figure. Closed-Loop Gain and Phase vs. Frequency, G = +, R L = kω 9 G = + R L = Ω = mv p-p 9 G = + R L = kω = m V p-p PEAKING.dB PEAKING.dB R F = Ω R F = Ω R F = Ω R F = kω PEAKING.dB R F = Ω R F = kω PEAKING.dB Figure 9. db Bandwidth vs. Supply Voltage, Gain = +, R L = Ω Figure. db Bandwidth vs. Supply Voltage, Gain = +, R L = kω
db BANDWIDTH MHz db BANDWIDTH MHz CLOSED-LOOP db CLOSED-LOOP db SHIFT Degrees SHIFT Degrees Typical Characteristics, Inverting Connection AD R F V ns.µf R G HP AD PULSE GENERATOR.µF TO TEKTRONIX P FET PROBE R L 9 % V Figure. Inverting Amplifier Connection Figure. Small Signal Pulse Response, Gain =, R F = Ω, R L = Ω, V S = ± V = R L = Ω 9 = R L = kω 9 ±.V 9 ±.V 9 ±.V ±.V Figure. Closed-Loop Gain and Phase vs. Frequency G =, R L = Ω, R F = Ω for ± V, Ω for ± V and ±. V Figure. Closed-Loop Gain and Phase vs. Frequency, G =, R L = kω, R F = Ω for V S = ± V, Ω for ± V and ±. V 9 G = R L = = mv p-p PEAKING.dB G = R L = kω = mv p-p R F = Ω PEAKING.dB R F = Ω PEAKING.dB R F = Ω R F = kω R F = 9Ω R F = kω PEAKING.dB Figure. db Bandwidth vs. Supply Voltage, Gain =, R L = Ω Figure. db Bandwidth vs. Supply Voltage, Gain =, R L = kω 9
db BANDWIDTH MHz db BANDWIDTH MHz CLOSED-LOOP db CLOSED-LOOP db SHIFT Degrees SHIFT Degrees AD Typical Characteristics, Inverting Connection mv ns V ns 9 9 % % V V Figure. Small Signal Pulse Response, Gain =, R F = Ω, R L = Ω, V S = ± V Figure. Large Signal Pulse Response, Gain =, R F = Ω, R L = Ω, V S = ± V = R F = 9Ω R L = Ω 9 = R F = 9Ω R L = kω 9 9 ±.V ±.V 9 Figure 9. Closed-Loop Gain and Phase vs. Frequency, G =, R L = Ω 9 ±.V ±.V Figure. Closed-Loop Gain and Phase vs. Frequency, G =, R L = kω 9 9 G = R L = Ω = mv p- p NO PEAKING 9 G = R L = kω = mv p- p NO PEAKING R F = 9Ω R F = 9Ω R F = R F = Ω R F = Ω R F = Figure. db Bandwidth vs. Supply Voltage, G =, R L = Ω Figure. db Bandwidth vs. Supply Voltage, G =, R L = kω
Applications AD GENERAL DESIGN CONSIDERATIONS The AD is a current feedback amplifier optimized for use in high performance video and data acquisition systems. Since it uses a current feedback architecture, its closed-loop bandwidth depends on the value of the feedback resistor. Table I below contains recommended resistor values for some useful closedloop gains and supply voltages. As you can see in the table, the closed-loop bandwidth is not a strong function of gain, as it would be for a voltage feedback amp. The recommended resistor values will result in maximum bandwidths with less than. db of peaking in the gain vs. frequency response. The db bandwidth is also somewhat dependent on the power supply voltage. Lowering the supplies increases the values of internal capacitances, reducing the bandwidth. To compensate for this, smaller values of feedback resistor are sometimes used at lower supply voltages. The characteristic curves illustrate that bandwidths of over MHz on V total and over MHz on V total supplies can be achieved. Table I. db Bandwidth vs. Closed-Loop Gain and Resistance Values (R L = ) V S = V Closed-Loop db BW Gain R FB R G (MHz) + kω + Ω Ω + Ω Ω Ω Ω 9 Ω.9 Ω V S = V Closed-Loop db BW Gain R FB R G (MHz) + 9 Ω + Ω Ω + Ω Ω Ω Ω 9 Ω.9 Ω ACHIEVING VERY FLAT RESPONSE AT HIGH FREQUENCY Achieving and maintaining gain flatness of better than. db above MHz is not difficult if the recommended resistor values are used. The following issues should be considered to ensure consistently excellent results. CHOICE OF FEEDBACK AND RESISTOR Because the db bandwidth depends on the feedback resistor, the fine scale flatness will, to some extent, vary with feedback resistor tolerance. It is recommended that resistors with a % tolerance be used if it is desired to maintain exceptional flatness over a wide range of production lots. PRINTED CIRCUIT BOARD LAYOUT As with all wideband amplifiers, PC board parasitics can affect the overall closed-loop performance. Most important are stray capacitances at the output and inverting input nodes. (An added capacitance of pf between the inverting input and ground will add about. db of peaking in the gain of response, and increase the bandwidth to MHz.) A space (/" is plenty) should be left around the signal lines to minimize coupling. Also, signal lines connecting the feedback and gain resistors should be short enough so that their associated inductance does not cause high frequency gain errors. Line lengths less than /" are recommended. QUALITY OF COAX CABLE Optimum flatness when driving a coax cable is possible only when the driven cable is terminated at each end with a resistor matching its characteristic impedance. If coax were ideal, then the resulting flatness would not be affected by the length of the cable. While outstanding results can be achieved using inexpensive cables, some variation in flatness due to varying cable lengths is to be expected. POWER SUPPLY BYPASSING Adequate power supply bypassing can be critical when optimizing the performance of a high frequency circuit. Inductance in the power supply leads can contribute to resonant circuits that produce peaking in the amplifier's response. In addition, if large current transients must be delivered to the load, then bypass capacitors (typically greater than µf) will be required to provide the best settling time and lowest distortion. Although the recommended. µf power supply bypass capacitors will be sufficient in most applications, more elaborate bypassing (such as using two paralleled capacitors) may be required in some cases. POWER SUPPLY OPERATING RANGE The AD will operate with supplies from ± V down to about ±. V. On ±. V the low distortion output voltage swing will be better than V peak to peak. Single supply operation can be realized with excellent results by arranging for the input common-mode voltage to be biased at the supply midpoint. OFFSET NULLING A kω pot connected between Pins and, with its wiper connected to V+, can be used to trim out the inverting input current (with about ± µa of range). For closed-loop gains above about, this may not be sufficient to trim the output offset voltage to zero. Tie the pot's wiper to ground through a large value resistor ( kω for ± V supplies, kω for ± V supplies) to trim the output to zero at high closed-loop gains.
CLOSED-LOOP db LOAD CAPACITANCE pf AD CAPACITIVE LOADS When used with the appropriate feedback resistor, the AD can drive capacitive loads exceeding pf directly without oscillation. By using the curves in Figure to chose the resistor value, less than db of peaking can easily be achieved without sacrificing much bandwidth. Note that the curves were generated for the case of a kω load resistor, for smaller load resistances, the peaking will be less than indicated by Figure. Another method of compensating for large load capacitances is to insert a resistor in series with the loop output as shown in Figure. In most cases, less than Ω is all that is needed to achieve an extremely flat gain response. Figures to illustrate the outstanding performance that can be achieved when driving a pf capacitor. k V S = k k FEEDBACK RESISTOR Ω = + R L = kω k R F.µF Figure. Max Load Capacitance for Less than db of Peaking vs. Feedback Resistor.µF R G AD.µF R S (OPTIONAL) C L R L 9 V ns R T.µF UT Figure. Circuit Options for Driving a Large Capacitive Load % V 9 G = + R L = kω C L = pf Figure. AD Driving a pf Load, Gain = +, R F = Ω, R S = Ω, R L = kω 9 R F =.kω R S = R F = R S = Ω Figure. Performance Comparison of Two Methods for Driving a Large Capacitive Load DISABLE MODE By pulling the voltage on Pin to common ( V), the AD can be put into a disabled state. In this condition, the supply current drops to less than. ma, the output becomes a high impedance, and there is a high level of isolation from input to output. In the case of a line driver for example, the output impedance will be about the same as for a. kω resistor (the feedback plus gain resistors) in parallel with a pf capacitor (due to the output) and the input to output isolation will be better than db at MHz. Leaving the disable pin disconnected (floating) will leave the AD operational in the enabled state. In cases where the amplifier is driving a high impedance load, the input to output isolation will decrease significantly if the input signal is greater than about. V peak to peak. The isolation can be restored back to the db level by adding a dummy load (say Ω) at the amplifier output. This will attenuate the feedthrough signal. (This is not an issue for multiplexer applications where the outputs of multiple ADs are tied together as long as at least one channel is in the ON state.) The input impedance of the disable pin is about kω in parallel with a few pf. When grounded, about µa flows out
CLOSED-LOOP db SHIFT Degrees db BANDWIDTH MHz NORMALIZED db DIFFERENTIAL % DIFFERENTIAL Degrees AD of the disable the disable pin for ± V supplies. If driven by complementary output CMOS logic (such as the HC), the disable time (until the output goes high impedance) is about ns and the enable time (to low impedance output) is about ns on ± V supplies. The enable time can be extended to about ns by using open drain logic such as the HC. When operated on ± V supplies, the AD disable pin may be driven by open drain logic such as the C9. In this case, adding a kω pull-up resistor from the disable pin to the plus supply will decrease the enable time to about ns. If there is a nonzero voltage present on the amplifier's output at the time it is switched to the disabled state, some additional decay time will be required for the output voltage to relax to zero. The total time for the output to go to zero will generally be about ns and is somewhat dependent on the load impedance...9........ 9 = + R F = R L = Ω f C =.MHz IRE MODULATED RAMP SUPPLY VOLTAGE ± Volts.......... OPERATION AS A VIDEO LINE DRIVER The AD is designed to offer outstanding performance at closed-loop gains of one or greater. At a gain of, the AD makes an excellent video line driver. The low differential gain and phase errors and wide. db bandwidth are nearly independent of supply voltage and load (as seen in Figures 9 and ). Figure 9. Differential Gain and Phase vs. Supply Voltage +. R L = Ω ±V. ±. CABLE AD.µF.µF CABLE UT Figure. A Video Line Driver Operating at a Gain of + = + R L = Ω 9 +.. R L = k ±. ±V k M M M Figure. Fine-Scale Gain (Normalized) vs. Frequency for Various Supply Voltages, Gain = +, R F = Ω 9 G = + R L = Ω = mv p-p R F = PEAKING.dB ±.V ±.V R F = PEAKING.dB R F = k SUPPLY VOLTAGE - ±Volts Figure. Closed-Loop Gain and Phase vs. Frequency, G = +, R L =, R F = Ω Figure. db Bandwidth vs. Supply Voltage, Gain = +, R L = Ω
FEEDTHROUGH db CLOSED-LOOP db SHIFT Degrees AD : VIDEO MULTIPLEXER The outputs of two ADs can be wired together to form a : mux without degrading the flatness of the gain response. Figure shows a recommended configuration which results in. db bandwidth of MHz and OFF channel isolation of db at MHz on ± V supplies. The time to switch between channels is about. µs when the disable pins are driven by open drain output logic. Adding pull-up resistors to the logic outputs or using complementary output logic (such as the HC) reduces the switching time to about ns. The switching time is only slightly affected by the signal level. A +V.µF AD.µF V +V.µF CABLE UT 9 mv ns B AD.µF V V SW % HC V Figure. A Fast Switching : Video Mux Figure. Channel Switching Time for the : Mux. 9.... V S =.. 9 Figure. : Mux OFF Channel Feedthrough vs. Frequency Figure. : Mux ON Channel Gain and Phase vs. Frequency
FEEDTHROUGH db CLOSED-LOOP db SHIFT Degrees AD N: MULTIPLEXER A multiplexer of arbitrary size can be formed by combining the desired number of ADs together with the appropriate selection logic. The schematic in Figure shows a recommendation for a : mux which may be useful for driving a high impedance such as the input to a video A/D converter (such as the AD). The output series resistors effectively compensate for the combined output capacitance of the OFF channels plus the input capacitance of the A/D while maintaining wide bandwidth. In the case illustrated, the. db bandwidth is about MHz with no peaking. Switching time and OFF channel isolation (for the : mux) are about ns and db at MHz, respectively., A kω.µf Ω AD.µF SELECT A kω.µf. 9, B AD.µF Ω SELECT B... R L = kω kω.µf R L UT C L.. C L = pf., C AD Ω.µF SELECT C Figure. : Mux ON Channel Gain and Phase vs. Frequency kω, D.µF Ω AD.µF SELECT D Figure. A : Multiplexer Driving a High Impedance Figure. : Mux OFF Channel Feedthrough vs. Frequency
AD OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Plastic Mini-DIP (N) Package PIN. ±. (.9 ±.).9 (9.9) MAX. (.). (.). ±. (.9 ±.). (.) REF C /9. (.) MIN. ±. (. ±.). (.) BSC. (.) NOM. ±. (. ±.) SEATING PLANE. ±. (. ±.) Cerdip (Q) Package. (.) MIN. (.) MAX PIN. (.) MAX. (.). (.). (.). (.). (.9) MAX. (.) BSC. (.). (.). (.). (.9). (.). (.). (.) MIN SEATING PLANE. (.).9 (.). (.). (.) -Pin SOIC (R) Package. (.). (.). (.9) PIN. (.99). (.). (.). (.).9 (.).9 (.). (.) BSC.9 (.). (.). (.9).9 (.9).9 (.). (.9). (.) x CHAMF.9 (.). (.).9 (.9). (.). (.) All brand or product names mentioned are trademarks or registered trademarks of their respective holders. PRINTED IN U.S.A.