Performance Comparison for A4WP Class-3 Wireless Power Compliance between egan FET and MOSFET in a ZVS Class D Amplifier

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The egan FET Journey Continues Performance Comparison for A4WP Class-3 Wireless Power Compliance between egan FET and MOSFET in a ZVS Class D Amplifier EPC - The leader in GaN Technology www.epc-co.com 1

Agenda Introduction to the A4WP Class-3 Specifications ZVS Class D Amplifier egan FET versus MOSFET Comparison Synchronous Bootstrap FET Gate Driver Experimental Results Summary egan is a registered trademark of Efficient Power Conversion Corporation EPC - The leader in GaN Technology www.epc-co.com 2

Introduction Wireless power transfer solutions must address convenience-of-use such as: device orientation and distance, multiple device capability, user simplicity, and power. Only the Alliance for Wireless Power (A4WP / Rezence) standard does: Highly resonant (6.78 MHz ISM band) Loosely coupled coils Operation off-resonance ZVS Class D amplifier will be tested to the Class-3 requirements EPC - The leader in GaN Technology www.epc-co.com 3

Load Variation Arcs 1 +10j Ω On Resonance Matched Coil A4WP Class-3 Impedance Requirements 50 Ω Smith Chart 55 +10j Ω 55-150j Ω Increasing Coil Inductance Full Load Arc Impedance Rotation permissible Unloaded Coil Arc 1-150j Ω Decreasing Coil Inductance EPC - The leader in GaN Technology www.epc-co.com 4

ZVS Class D Amplifier Switch voltage rating = Supply (V DD ). C OSS Voltage is transitioned by the ZVS tank ZVS tank circuit does not carry load current Coil Voltage + V DS Q 1 V DD Q 2 = 2 π V DD V RMS ZVS tank L ZVS C ZVS C s V / I V DS I LZVS EPC - The leader in GaN Technology www.epc-co.com 5 V DD Z load 50% I D Ideal Waveforms time

Ultra High Frequency egan FETs Proven in various wireless power transfer amplifiers Low C ISS Low C OSS Zero Q RR Full dv/dt immunity Gate 2.05 x 0.85 mm Source Solder side View Substrate (Connect to Source on PWB) Gate Return R DS(on) @5 V (mω) Q G @5 V Typ. (pc) Drain Q GS Typ. (pc) Q GD Typ. (pc) R G Typ. (Ω) V th Typ. (V) Part Number Package (mm) V DS (V) V GS (V) Q RR (nc) I D (A) EPC8004 LGA 2.05x0.85 40 6 125 358 110 31 0.34 1.4 0 2.7 150 EPC8009 LGA 2.05x0.85 65 6 138 380 116 36 0.3 1.4 0 2.7 150 EPC8010 LGA 2.05x0.85 100 6 160 354 109 32 0.3 1.4 0 2.7 150 T J Max. ( C) EPC - The leader in GaN Technology www.epc-co.com 6

Wireless Power Transfer Figure of Merit Best-In-Class MOSFET comparison All topologies are ZVS: Q G Q GD C OSS is absorbed in matching but is important as it: Drives off resonance losses Determines design-ability Q RR ignored poorly defined, amplifier is soft switching, BUT, transition time < t RR : egan FET Q RR = 0 nc MOSFET 2 Q RR = 18.1 nc! (FoM = 1900 nc mω) WPT FoM WPT [nc mω] 700 600 500 400 300 200 100 EPC - The leader in GaN Technology www.epc-co.com 7 0 DS(on) Q OSS 2.8x EPC8010 MOSFET 2 ( Q Q Q ) FOM = R + G 3.4x GD Q OSS OSS

Gate Driver Induced Losses Gate drivers with internal bootstrap diodes always have Q RR (schottky diode is very difficult to implement in IC form) Bootstrap diode Q RR induces losses in the high side device Q RR losses proportional to frequency Present even with ZVS as t ZVS (Switch-node voltage transition time) is shorter than t RR EPC - The leader in GaN Technology www.epc-co.com 8

Synchronous FET Bootstrap Q BTST Bootstrap FET for main switch (Q 1 ) zero Q RR Q BTST Switches synchronously with Q 2 No additional active gate driver circuitry needed C ENH Used for level shifting D ENH Bootstrap diode for C ENH (Low voltage < 20V zero Q RR ) V Drvr + D ENH Q BTST Gate Driver + level shift Q 1 + V DD C BTST Gate Driver C ENH Q 2 EPC - The leader in GaN Technology www.epc-co.com 9

Power [W] Load Variation (jω) Results Total Amplifier Losses 3.5 3 42% lower 2.5 2 1.5 1 38 % lower 24 % lower 0.5 0 Effect of Q BTST C OSS -35-30 -25-20 -15-10 -5 0 5 10 15 20 25 30 35 Imaginary Impedance [jω] EPC8010 10 Ω 7 W MOSFET 10 Ω 7 W EPC8010 36 Ω 16 W MOSFET 36 Ω 16 W EPC8010 55 Ω 16 W MOSFET 55 Ω 16 W EPC - The leader in GaN Technology www.epc-co.com 10

Power [W] 4 3.5 3 2.5 2 1.5 1 0.5 0 Load Variation (Ω) Results 15% - 48% lower 13% higher Total Amplifier Losses ~40% lower 0 10 20 30 40 Real Reflected Resistance [Ω] 50 60 EPC8010-30j Ω MOSFET -30j Ω EPC8010 +20j Ω MOSFET +20j Ω EPC8010 0j Ω MOSFET 0j Ω EPC - The leader in GaN Technology www.epc-co.com 11 18 16 14 12 10 8 6 4 2 0 P out Output Power [W]

Waveform Improvements V DD = 45 V, No load Q RR effect Δt = 4.2 ns No Q RR effect Δt = 4.2 ns Lower dv/dt Δt = 6.6 ns HF Output Equal dv/dt Δt = 4.2 ns Oscillator reference Original Internal Bootstrap Diode egan FET Synchronous Bootstrap FET EPC - The leader in GaN Technology www.epc-co.com 12

Summary egan FETs in a ZVS Class D amplifier were tested to the A4WP Class-3 specifications : egan FETs always yield higher efficiency than best-in-class MOSFETs Gate driver and egan FET temperature remain below 100 C egan FET s lower C OSS reduces the ZVS current needed, resulting in lower power dissipation for both FET and L ZVS egan FETs reduce board space by 40 % egan FETs enable a wider impedance drive range than MOSFETs EPC - The leader in GaN Technology www.epc-co.com 13

Wireless Power Handbook Handbook on wireless power that covers this work and much more available at Digi-Key (917-1098-ND) EPC - The leader in GaN Technology www.epc-co.com 14

Thank You EPC - The leader in GaN Technology www.epc-co.com 15