EE247 Lecture 27 Today:

EE247 Lecture 27 Today: ΣΔ Modulator (continued) Examples of systems utilizing analog-digital interface circuitry Acknowledgements EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 1 Oversampled Converters Cont d Higher order ΣΔ modulators Single-loop single-quantizer modulators with multi-order filtering in the forward path Example: 5 th order ΣΔ Modeling Noise shaping Complex loop filters Stability Voltage scaling, input range scaling Tones, Dither, kt/c noise Interference via V ref Effect of component nonlinearities on ΣΔ performance EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 2

Recap Dither successfully removes in-band tones that would corrupt the signal The high-frequency tones in the quantization noise spectrum will be removed by the digital filter following the modulator What if some of these strong tones are demodulated to the base-band prior to digital filtering? Why would this happen? Vref Interference EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 3 Modulation via DAC V ref y(t) DAC v(t) ( ) yt= D =± 1 ref out V = 2.5V + 1mV f /2 square wave ( ) ( ) vt = yt V ref s EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 4

Modulation via DAC D OUT spectrum V ref spectrum interferer convolution yields sum of red and green, mirrored tones and noise appear in band 0 f s /2 f s EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 5 V ref Interference via Modulation Output Spectrum [dbwn] 50 0-50 -100 60dB (1 db/db) 0V 1μV 1mV Key Point: In high resolution ΣΔ modulators Vref interference via modulation can significantly limit the maximum dynamic range -150 0 10 20 30 40 50 Frequency [khz] EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 6

V ref Interference via Modulation Output Spectrum [dbwn] 50 0-50 -100 0V 1e-006V 0.001V -150 0 1 2 3 4 5 Frequency [Hz] x 10 4 Output Spectrum [dbwn] 50 0-50 -100 0V 1e-006V 0.001V -150 1.47 1.48 1.49 1.5 Frequency [Hz] x 10 6 Symmetry of the spectra at f s /2 and DC confirm that this is modulation EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 7 V ref Spurious Tone Velocity vs. Native Tone Velocity Output Spectrum [dbwn] 50 0-50 -100 V in V ref 0.6kHz/mV = 6mV / 12mV 0.006V DC = 2.5V DC 0.012V & 1mV f s /2 40dB shift for readability Aliased -150 tone 0 10 20 30 40 50 Frequency [khz] Native tone velocity 1.2kHz/mV Aliased tone velocity 0.6kHz/mV EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 8

V ref Interference via Modulation Simulations performed to verify the effect of the DAC reference contamination via output signal interference particularly in the vicinity of f s /2 Interference modulates the high-frequency tones Since the high frequency tones are strong, a small amount (1μV) of interference suffice to create audible base-band tones Stronger interference (1mV) not only aliases spurious tones but elevate noise floor by aliasing high frequency quantization noise Amplitude of modulated tones is proportional to interference The velocity of modulated tones is half that of the native tones Such differences help debugging of silicon How clean does the reference have to be? EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 9 V ref Interference Output Spectrum [dbwn] / Int. Noise [dbv] 50 0-50 -100 Output Spectrum (1μV interference on V ref ) Integrated Noise (30 averages) Tone dominates noise floor w/o thermal noise -150 0 10 20 30 40 50 Frequency [khz] EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 10

Summary Our stage 2 model can drive almost all capacitor sizing decisions Gain scaling kt/c noise Dither Dither quite effective in the elimination of native in-band tones Extremely clean & well-isolated V ref is required for high-dynamic range applications e.g. digital audio Next we will add relevant component imperfections: Effect of component nonlinearities on ΣΔ performance EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 11 Modeling ΣΔ Nonlinearities Many component nonlinearities contribute errors Important to identify the ones which incur significant errors and analyze those only Unnecessarily complex models reduce the chance to find relevant problems, and perhaps, solutions As with all nonidealities, model one at a time Expect errors from the 2 nd integrator to be reduced by the gain of the 1 st integrator Errors further downstream are even less significant EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 12

Effect of Component Non-Linearity b1 b2 X K1 z -1 1 - z -1-1 K2 z 1 - z -1-1 K3 z 1 - z -1-1 K4 z -1 K5 z 1 - z 1 - z a1 a2 a3 a4 a5 Q DAC Gain g Comparator Y 1 st Integrator nonlinearity most significant impact on ΣΔ linearity/noise performance EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 13 1 st Integrator φ 1D C IN φ 2 V IN φ 2 φ 1 V REF φ 2 φ 1 C R1 C R2 φ 1 v CM φ 2 D φ 1 v CM φ 2 D C FB Key non-linear component effects to be analyzed: C IN Since not enclosed in feedback loop high impact Opamp closed-loop transfer characteristic C FB not quite obviousshould analyze φ 2 φ 1 v CM V 1OUT Switch charge injection V REF v CM EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 14

Capacitor Voltage Coefficient Ideal capacitor Q = CV Practical capacitor (1 st order model) ( ) Q = C V V with Q( V ) = C ( 1+ αv + K)V o Typical voltage coefficients Poly-poly capacitors ~20 ppm/v Metal-metal capacitors 1 10 ppm/v EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 15 C IN Voltage Coefficient Charge conservation dictates: (V CM =0, C R1 =C R2 =C R ): 1OUT ( ) = 1OUT ( ) V k V k 1 1442443 integration CIN C + V IN 2 IN ( k 1) + α VIN ( k 1) CFB C 14444444244444443 FB converter input C D R VREF C 1442443 FB 1-bit feedback EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 16

C IN Voltage Coefficient Output Spectrum [dbfs] / Int. Noise [dbv] 0-50 -100-150 Output Spectrum Integrated Noise -200 0 10 20 30 40 50 Frequency [khz] V in = V FS = 1V Spectrum scaled for V FS 0dB (window lowers peak) Noise integral excludes DC, fundamental α = 10 ppm/v 2 nd harmonic at 105dB dominates noise! Let s characterize it EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 17 C IN Voltage Coefficient Output Spectrum [dbfs] 0-50 -100-150 20dB α =10 ppm/v α =1 ppm/v 2 nd harmonic increases 1dB per 1dB increase of α -200 0 10 20 30 40 50 Frequency [khz] EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 18

Effect of Circuit Non-Idealities In principle, the digital filter removes out-of-band tones Except their distortion components falling in the baseband, caused by nonlinearities in the modulator loop filter Except components that are mixed down to baseband due to noise in the DAC reference Nonlinearities in the 1 st integrator amplifier are important Other source of nonlinearity Feedback capacitor non-linearity Switch induced distortion Including those in the model is left as an exercise Effect of 3 rd order non-linearities good exercise! Maintaining extremely high levels of linearity in H(z) is the most significant transistor-level design challenge of high resolution ΣΔ modulators EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 19 Summary Oversampled ADCs Noise shaping utilized to reduce baseband quantization noise power Reduced precision requirement for analog building blocks compared to Nyquist rate converters Relaxed transition band requirements for analog antialiasing filters Utilizes low cost, low power digital filtering Speed is traded for resolution EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 20

Material Covered in EE247 Filters Continuous-time filters Biquads & ladder type filters Opamp-RC, Opamp-MOSFET-C, gm-c filters Automatic frequency tuning Switched capacitor (SC) filters Data Converters D/A converter architectures A/D converter Nyquist rate ADC- Flash, Interpolating & Folding, Pipeline ADCs,. Self-calibration techniques Oversampled converters EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 21 Systems Including Analog-Digital Interface Circuitry (Not Included in Final Exam) Wireline communications Telephone related (DSL, ISDN, CODEC) Television circuitry (Cable modems, TV tuners ) Ethernet (Gigabit, 10/100BaseT ) Wireless Cellular telephone (CDMA, Analog, GSM.) Wireless LAN (Blue tooth, 802.11a/b/g..) Radio (analog & digital), Television Disk drives Fiber-optic systems EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 22

E.E. Circuit Course vs. Frequency Range 500kHz IF Band RF Band 10GHz 455kHz 10.7MHz 80MHz 100MHz AM Radio FM Radio Cellular Phone DC Baseband 10MHz EE240, EE247 EE242 EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 23 Wireline Communications Telephone Based EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 24

Data Transmission Over Existing Twisted-Pair Phone Lines Central Office Customer Backbone Digital Network Xmitter Receiver Twisted Pair 3 to 5km Xmitter Receiver POTS Data transmitted over existing phone lines covering distances close to 3.5miles Voice-band MODEMs ISDN HDSL, SDSL, ADSL EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 25 Data Transmission Over Twisted-Pair Phone Lines ISDN (U-Interface) Transceiver Central Office Customer Backbone Digital Network Xmitter Receiver Twisted Pair 3 to 5km Xmitter Receiver POTS Full duplex transmission (RX & TX signals sent simultaneously) 160kbit/sec baseband data (80kHz signal bandwidth) Standardized line code 2B1Q (4 level code 3:1:-1:-3) Max. desired loop coverage 18kft (~36dB signal attenuation) Final required BER (bit-error-rate) 10-7 (min. SNDR=27dB) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 26

Analog Front-End Transmit Pulse Shape Standard mandates a pulse mask Ensure min. high-frequency content on the line to avoid spurious coupling into other lines EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 27 Central Office ISDN (U-Interface) Transceiver Echo Problem Customer Xmitter Xmitter Receiver Receiver Transformer coupling to line For a perfectly matched system no leakage of TX signal into RX path Unfortunately, system has poor matching + complicating factor of bridgedtaps Bridged Tap Problem Open Line EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 28

Central Office ISDN (U-Interface) Transceiver Echo Problem Customer Xmitter Xmitter Receiver Receiver System full duplex transmission RX & TX signals sent simultaneous (& at the same frequency band) Leakage of TX signal to RX path (echo) Worst case echo could be 30dB higher compared to the received signal!! EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 29 ISDN (U-Interface) Transceiver Echo Cancellation Echo cancellation performed in the digital domain Typically echo cancellation performed by transversal adaptive digital filter Any non-linearity incurred by the analog circuitry makes echo canceller significantly more complex Desirable to have high linearity analog circuitry (75dB range) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 30

Simplified Transceiver Block Diagram CMA Control, maintenance & access unit DFE Decision feedback equalizer DEC Decimation filter REC Reconstruction filter LEC & NEC Linear/non-linear echo-canceller Ref: H. Khorramabadi, et. al"an ANSI standard ISDN transceiver chip set, " IEEE International Solid-State Circuits Conference, vol. XXXII, pp. 256-257, February 1989 EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 31 Analog Front-End 2b S.C. DAC 2 nd order Butterworth S.C. Filter Class A/B Line Driver 13bit Double-Loop To avoid stringent requirements for nonlinear echo canceller: high linearity analog circuitry needed (~ 75dB) Peak signal frequency 80kHz EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 32

Chip Photo EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 33 Data Transmission Over Twisted-Pair Phone Lines DSL (Digital Subscriber Loop) Central Office Customer Backbone Digital Network Xmitter Receiver Twisted Pair 3 to 5km Xmitter Receiver POTS HDSL &SDSL more like ISDN @ higher frequencies Full duplex transmission with RX & TX signals on the same frequency band EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 34

Data Transmission Over Twisted-Pair Phone Lines ADSL (Digital Subscriber Loop) Central Office Customer Backbone Digital Network Xmitter Receiver Xmitter Receiver POTS In USA mostly ADSL FDM (frequency division multiplex) Signal from CO to customer on a different band compared to customer to CO Echo cancellation can be performed by simple filtering Data rates up to 8Mbps (much higher compared to ISDN) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 35 ADSL Signal Characteristics Main difference compared to ISDN: TX & RX signals on different frequency bands Downstream (fast, from CO to customer) 138kHz to 1.1MHz Upstream (slow, from customer to CO) 30kHz to 138kHz Echo cancellation much easier More severe signal attenuation at high frequencies (1MHz DSL v.s. 80kHz ISDN) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 36

Typical ADSL Analog Front-End Central Office Customer Premise ADC 16/14b with 14bit linearity, pipeline with auto. calibration @ 4.4Ms/s DAC 16/14b with 14bit linearity, S.C. with auto. calibration On-chip filters 3 rd to 4 th order LPF with f c 1.1MHz for downstream and 138kHz upstream (typically continuous-time type filters with on-chip frequency tuning) Ref: D.S. Langford, et al, A BiCMOS Analog Front-End Circuit for an FDM-Based ADSL System, IEEE Journal of Solid State Circuits, Vol. 33, No. 9, pp. 1383-1393, Dec. 1998. EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 37 Typical ADSL Analog Front-End Note: Band selection filters are off-chip due to stringent noise requirements (3nV/rtHz) Discrete LC type Line driver on a separate bipolar chip to achieve required high output signal levels with high power efficiency EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 38

Wireless Communication Circuits EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 39 Wireless Circuits Differ from wired comm. circuits Includes RF circuitry+if circuitry+baseband circuits (three different frequency ranges) Signal scenarios in wireless receivers more challenging Requirement for received signal BER in the order of 10-3 (min. SNR~9dB) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 40

Typical Cellular Phone Block Diagram RF Amp Image Reject Filter IF Filter 90 ο A/D Duplexer PA AGC Frequency Synthesizer AGC 90 ο A/D D/A Digital Signal Processor (DSP) AGC D/A EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 41 Superheterodyne Receiver RF Amp Image Reject Filter f 2 -f 1 f 2 + f 1 f c = f 2 -f 1 AGC f 1 Frequency Synthesizer f 2 f 2 -f 1 f 2 + f 1 One or more intermediate frequency (IF) Periodic signal at a frequency equal to the desired RX signal + or IF frequency is provided by a Local Oscillator RX signal is frequency shifted to a fixed frequency (IF filter center frequency) EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 42

RF Superheterodyne Receiver Example: CDMA Receiver RF Amp Image Reject Filter fc =85.38MHz BW=1.25MHz 870M 880MHz RX Band 893.3MHz AGC 965.38MHz Frequency Synthesizer 85.38MHZ AGC Received frequency is mixed down to a fixed IF frequency and then filtered with a bandpass filter EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 43 Why Image Reject Filter? RF Amp f 2 -f 1 f 3 f 2 f 2 + f 1 f IF = f 2 -f 1 f1 f 2 f 3 f IF f IF f 2 Frequency Synthesizer f 2 -f 1 f 2 + f 1 Any signal @ the image frequency of the RX signal with respect to Osc. frequency will fall on the desired RX signal and cause impairment EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 44

Why Image Reject Filter? RF Amp Image Reject Filter f 1 f 3 f osc -f 1 f IF = f osc -f 1 f1 f osc f 3 f IF f IF f osc Frequency Synthesizer Image reject filter attenuate signals out of the RX band Typically, image reject filters are ceramic or LC type filters EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 45 Quadrature Downconversion A/D RF Amp AGC cosω C t sinω C t In-phase & Quadrature Channel Select Filters -f IF 0 f IF A/D In systems with phase or freq. modulation, since signal is not symmetric around f IF, directly converting down to baseband corrupts the sidebands Quadrature downconversion overcomes this problem EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 46

Effect of Adjacent Channels Relative Signal Amplitude [db] 1st Adjacent Channel 60 30 0 Desired Channel f RX f n1 2nd Adjacent Channel f n2 RF Amp Relative Signal Amplitude [db] 60 30 0 RF Amp f n1 2f n1 f n2 f n2 2f n2 f n1 Adjacent channels can be as much as 60dB higher compared to the desired RX signal! Linearity of stages prior and including channel selection filters extremely important EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 47 Effect of Adjacent Channels Due to existence of large unwanted signals & limited dynamic range for the front-end circuitry: Can not amplify the signal up front due to linearity issues Need to allocate amplification/filtering numbers to RX blocks carefully Can only amplify when unwanted signals are filtered adequately System design critical with respect to tradeoffs affecting: Gain Linearity Power dissipation Chip area EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 48

Wireless Communications Linearity Most critical contributor to non-linearity in wireless communications circuits 3 rd order intermod.: Two forms of linearity measurements: 1dB compression point Useful for the cases where the desired received channel is strong 3 rd order intercept point Good measure for when interferers much larger compared to the desired channel EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 49 Wireless Communications Measure of Linearity 1dB Compression Point 1dB Output Power (dbm) 20log( α Vin) 1 Vout = α Vin + α Vin + α Vin + Input Power (dbm) 2 3 1 2 3... P 1 db EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 50

Wireless Communications Measure of Linearity Third Order Intercept Point ω 1 ω 2 ω ω1 ω 2 ω 2ω 1 ω 2 2ω 2 ω 1 2 3 Vout = α1vin + α2vin + α3vin +... 3rd IM 3 = 1st 3α3 2 25α5 4 = Vin + Vin +... 4α1 8 α1 = 1@ IP3 Typically: IIP 3 P 1dB = 9.6 db OIP3 Output Power (dbm) 20log( α Vin) Most common measure of linearity for wireless circuits: OIP3 & IIP3, Third order output/input intercept point 1 Fundamental 3 rd order IM Input Power (dbm) 3 3 20log α3vin 4 IIP3 EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 51 Homodyne (Direct to Baseband) Receivers RF Amp AGC 90 ο A/D A/D f IF =0 f 1 f osc = f 1 Frequency Synthesizer No intermediate frequency, signal mixed down to baseband Almost all of the filtering performed at baseband Higher levels of integration possible Issue to be aware of: Requirements for the baseband filters extremely stringent Since the local oscillator frequency is exactly at the same freq. as the RX signal freq. can cause major DC offsets & drive the receiver front-end into non-linear region EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 52

Example: Wireless LAN 802.11b & Bluetooth Ref: H. Darabi, et al, A Dual Mode 802.11b/Bluetooth Radio in 0.35um CMOS, IEEE ISSCC, 2003 pp. 86-87. EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 53 Digital IF Receiver (IF sampling) RF Amp AGC A/D cosω C t Digital Multiplier sinω C t Digital LPF Digital Sinewave Generator Digital Multiplier Digital LPF IF signal is converted to digital most of signal processing performed in the digital domain Performance requirement for ADC extremely demanding in terms of noise, linearity, and dynamic range! With advancements of ADCs could be the architecture of choice in the future EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 54

Typical Wireless Transmitter Frequency Synthesizer PA 90 ο D/A D S P AGC D/A Transmit signal shipped from DSP to the analog front-end in the form of I& Q signals Signal converted to analog form by D/A Lowpass filter provides pulse shaping In-phase & Quad. Components combined and then mixed up to RF Power amplifier amplifies and provides the low-impedance output EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 55 Analog Filters in Super-Heterodyne Wireless Transceivers RF Amp Image Reject Filter IF Filter 90 ο A/D Duplexer PA AGC Frequency Synthesizer AGC 90 ο A/D D/A Digital Signal Processor (DSP) AGC D/A Filters Function Type RF Filter Image Rejection Ceramic or LC IF Filter Channel selection SAW Base-band Filters Channel Selection Integrated Cont.-Time & Anti-aliasing for ADC or S.C. EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 56

Example: Dual Mode CDMA (IS95)& Analog Cellular Phone EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 57 Example: Dual Mode CDMA (IS95)& Analog Cellular Phone Baseband analog circuitry includes: CDMA 4bit flash type ADC clock rate 10MHz 8bit segmented TX DAC clock rate 10MHz (shared with FM) 7 th order elliptic RX lowpass filter corner freq. 650kHz 3 rd order chebyshev TX lowpass filter corner freq. 650kHz FM (analog) 8bit successive approximation ADCs clock rate 360kHz 5 th order chebyshev RX lowpass filter corner frequency 14kHz 3 rd order butterworth TX lowpass filter corner frequency 27kHz EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 58

Summary Examples of systems utilizing challenging analog to digital interface circuitry- in the area of wireline & wireless systems discussed Analog circuits still remain the interface connecting the digital world to the real world! EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 59 Acknowledgements The course notes are based on numerous sources including: Prof. P.R. Gray s EE290 course Prof. B. Boser s EE247 course notes Prof. B. Murmann s Nyquist ADC notes Fall 2004 EE247 class feedback Last but not least, Fall 2005 EE247 class The instructor would like to thank the class of 2005 for their enthusiastic & active participation! EECS 247 Lecture 27: Oversampled ADCs Cont'd & Final Remarks 2005 H. K. Page 60