9-2632; Rev ; /2 4.5Ω Dual SPST Analog Switches in UCSP General Description The MAX472/MAX4722/ low-voltage, low onresistance (R ON ), dual single-pole/single throw (SPST) analog switches operate from a single +.8V to +5.5V supply. These devices are designed for USB. and audio switching applications. The MAX472/MAX4722/ feature 4.5Ω R ON (max) with.2ω flatness and.3ω matching between channels. These new switches feature guaranteed operation from +.8V to +5.5V and are fully specified at 3V and 5V. These switches offer break-before-make switching (ns) with t ON <8ns and t <4ns at +2.7V. The digital logic inputs are +.8V logic compatible with a +2.7V to +3.6V supply. These switches are packaged in a chip-scale package (UCSP ), significantly reducing the required PC board area. The chip occupies only a.52mm.52mm area and has a 3 3 bump array with a bump pitch of.5mm. These switches are also available in an 8-pin µmax package. Applications Battery-Operated Equipment Audio/Video-Signal Routing Low-Voltage Data-Acquisition Systems Sample-and-Hold Circuits Communications Circuits Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. UCSP is a trademark of Maxim Integrated Products, Inc. Features USB. Signal Switching <2ns Differential Skew -3dB Bandwidth: >3MHz Low 5pF On-Channel Capacitance Low R ON (max) Switches 4.5Ω (max) (+3V Supply) 3Ω (max) (+5V Supply).3Ω (max) R ON Match (+3V Supply).2Ω (max) R ON Flatness (+3V Supply) <.5nA Leakage Current at TA = +25 C High Off-Isolation: -55dB (MHz) Low Crosstalk: -8dB (MHz) Low Distortion:.3% +.8V CMOS-Logic Compatible Single-Supply Operation from +.8V to +5.5V Rail-to-Rail Signal Handling PART Ordering Information TEMP RANGE PIN/BUMP- PACKAGE TOP MARK MAX472EUA -4 C to +85 C 8 µmax MAX472EBL-T* -4 C to +85 C 9 UCSP-9 ABP MAX4722EUA -4 C to +85 C 8 µmax MAX4722EBL-T* -4 C to +85 C 9 UCSP-9 ABQ EUA -4 C to +85 C 8 µmax EBL-T* -4 C to +85 C 9 UCSP-9 ABR Note: UCSP package requires special solder temperature profile described in the Absolute Maximum Ratings section. *UCSP reliability is integrally linked to the user s assembly methods, circuit board material, and environment. See the UCSP reliability notice in the UCSP Reliability section of this data sheet for more information. Pin Configurations/Functional Diagrams/Truth Tables MAX472/MAX4722/ TOP VIEW (BUMP SIDE DOWN) A B MAX472 2 3 IN2 NO2 COM COM2 A B MAX4722 2 3 IN2 NC2 COM COM2 A B 2 3 IN2 NC2 COM COM2 IN_ LOW HIGH NO_ ON NC_ ON C NO IN C NC IN C NO IN UCSP UCSP UCSP Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at -888-629-4642, or visit Maxim s website at www.maxim-ic.com.
MAX472/MAX4722/ ABSOLUTE MAXIMUM RATINGS (All Voltages Referenced to, Unless Otherwise Noted.), IN_...-.3V to +6.V COM_, NO_, NC_ (Note )...-.3V to ( +.3V) Continuous Current COM_, NO_, NC_...±mA Peak Current COM_, NO_, NC_ (pulsed at ms, % duty cycle)...±2ma Continuous Power Dissipation (T A = +7 C) 8-Pin µmax (derate 4.5mW/ C above +7 C)...362mW 9-Bump UCSP (derate 4.7mW/ C above +7 C)...379mW ELECTRICAL CHARACTERISTICS Single +3V Supply ESD Method 35.7...>2kV Operating Temperature Range...-4 C to +85 C Junction Temperature...+5 C Storage Temperature Range...-65 C to +5 C Lead Temperature (soldering, s)...+3 C Bump Temperature (soldering) (Note 2) Infrared (5s)...+22 C Vapor Phase (6s)...+25 C Note : Signals on COM_, NO_, or NC_ exceeding or are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 2A, paragraph 7.6, table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not allowed. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ( = +2.7V to +3.6V, V IH = +.4V, V IL = +.5V, T A =, unless otherwise noted. Typical values are at = +3.V, T A = +25 C, unless otherwise noted.) (Notes 3, 4) PARAMETER SYMBOL CONDITIONS T A MIN TYP MAX UNITS Analog Signal Range ANALOG SWITCH V COM_, V NO_, V NC_ V On-Resistance (Note 5) R ON = 2.7V, I COM_ = ma; V NO_ or V NC_ =.5V On-Resistance Match Between Channels (Notes 5, 6) R ON = 2.7V, I COM_ = ma; V NO_ or V NC_ =.5V On-Resistance Flatness (Note 7) R FLAT(ON) = 2.7V, I COM_ = ma; V NO_ or V NC_ =.V,.5V, 2.V NO_, NC_ Off-Leakage Current (Note 8) COM_ Off-Leakage Current (Note 8) COM_ On-Leakage Current (Note 8) I NO_(), I NC_() = 3.6V, V COM_ =.3V, 3.3V; V NO_ or V NC_ = 3.3V,.3V I C OM _ (OF F), = 3.6V, V COM_ =.3V, 3.3V; I C OM _ (OF F) V NO_ or V NC_ = 3.3V,.3V I COM_(ON) = 3.6V, V COM_ =.3V, 3.3V; V NO_ or V NC_ =.3V, 3.3V, or floating Turn-On Time t ON V NO_, V NC_ =.5V; R L = 3Ω, C L = 35pF, Figure +25 C 3. 4.5 5 +25 C..3.4 +25 C.6.2.5 +25 C -.5 +. +.5 -.5 +.5 +25 C -.5 +. +.5 -.5 +.5 +25 C - +. + -2 +2 +25 C 4 8 Ω Ω Ω na na na ns 2
ELECTRICAL CHARACTERISTICS Single +3V Supply (continued) ( = +2.7V to +3.6V, V IH = +.4V, V IL = +.5V, T A =, unless otherwise noted. Typical values are at = +3.V, T A = +25 C, unless otherwise noted.) (Notes 3, 4) PARAMETER SYMBOL CONDITIONS T A MIN TYP MAX UNITS DYNAMIC CHARACTERISTICS Turn-Off Time t V NO_, V NC_ =.5V; R L = 3Ω, C L = 35pF, Figure Break-Before-Make Time Delay ( Only) (Note 8) t BBM V NO_, V NC_ =.5V; R L = 3Ω, C L = 35pF, Figure 2 Skew (Note 8) t SKEW R S = 39Ω, C L = 5pF, Figure 3 Charge Injection Q V GEN = 2V, R GEN = Ω, C L =.nf, Figure 4 f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5a Off-Isolation (Note 9) V ISO f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5a f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5b Crosstalk (Note ) V CT f = MHz; V NO_, V NC_ = V P-P ; R L = 5Ω, C L = 5pF, Figure 5b On-Channel -3dB Bandwidth BW Signal = dbm, C L = 5pF, R L = 5Ω, Figure 5a +25 C 2 4 5 +25 C 8 ns ns.5.2 ns +25 C 5 pc +25 C +25 C -55-8 -8 - db db +25 C >3 MHz Total Harmonic Distortion THD R L = 6Ω +25 C.3 % MAX472/MAX4722/ NO_, NC_ Off-Capacitance C NO_() C NC_() f = MHz, Figure 6 +25 C 9 pf Switch On-Capacitance C (ON) f = MHz, Figure 6 +25 C 5 pf DIGITAL I/O Input Logic High Voltage V IH.4 V Input Logic Low Voltage V IL.5 V Input Leakage Current I IN = +3.6V, V IN_ = or 5.5V SUPPLY Supply Voltage Range Positive Supply Current I+ = 5.5V, V IN_ = V or -. +. µa.8 5.5 V µa 3
MAX472/MAX4722/ ELECTRICAL CHARACTERISTICS Single +5V Supply ( = +4.2V to +5.5V, V IH = +2.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +5.V, T A = +25 C, unless otherwise noted.) (Notes 3, 4) PARAMETER SYMBOL CONDITIONS T A MIN TYP MAX UNITS Analog Signal Range ANALOG SWITCH V COM_, V NO_, V NC_ On-Resistance (Note 5) R ON = 4.2V, I COM_ = ma; V NO_ or V NC_ = 3.5V On-Resistance Match Between Channels (Notes 5, 6) R ON = 4.2V, I COM_ = ma; V NO_ or V NC_ = 3.5V On-Resistance Flatness (Note 7) R FLAT(ON) = 4.2V, I COM_ = ma; V NO_ or V NC_ =.V, 2.V, 3.5V NO_, NC_ Off-Leakage Current (Note 8) COM _ Off-Leakage Current (Note 8) COM_ On-Leakage Current (Note 8) DYNAMIC CHARACTERISTICS I NO_(), I NC_() = 5.5V, V COM_ =.V, 4.5V; V NO_ or V NC_ = 4.5V,.V I C OM _( OF F ) = 5.5V, V COM_ = V, 4.5V; V NO_ or V NC_ = 4.5V, V I COM_(ON) = 5.5V, V COM_ =.V, 4.5V; V NO_ or V NC_ =.V, 4.5V, or floating Turn-On Time t ON V NO_, V NC_ = 3.V; R L = 3Ω, C L = 35pF, Figure Turn-Off Time t V NO_, V NC_ = 3.V; R L = 3Ω, C L = 35pF, Figure Break-Before-Make Time Delay ( Only) (Note 8) t BBM V NO_, V NC_ = 3.V; R L = 3Ω, C L = 35pF, Figure 2 V +25 C.7 3. 3.5 +25 C..3.4 +25 C.4.2.5 +25 C -.5 +. +.5 -.5 +.5 +25 C -.5 +. +.5 -.5 +.5 +25 C - +. + -2 +2 +25 C 3 8 9 +25 C 2 4 5 +25 C 8 Ω Ω Ω na na na ns ns ns Skew (Note 8) t SKEW R S = 39Ω, C L = 5pF, Figure 3 DIGITAL I/O.5 2 ns Input Logic High Voltage V IH 2. V Input Logic Low Voltage V IL.8 V 4
ELECTRICAL CHARACTERISTICS Single +5V Supply (continued) ( = +4.2V to +5.5V, V IH = +2.V, V IL = +.8V, T A =, unless otherwise noted. Typical values are at = +5.V, T A = +25 C, unless otherwise noted.) (Notes 3, 4) PARAMETER SYMBOL CONDITIONS T A MIN TYP MAX UNITS Input Leakage Current I IN = 5.5V, V IN _ = V or POWER SUPPLY Power-Supply Range Positive Supply Current I+ = 5.5V, V IN_ = V or -. +. µa.8 5.5 V µa Note 3: UCSP parts are % tested at +25 C only, and guaranteed by design over the specified temperature range. µmax parts are % tested at and guaranteed by design over the specified temperature range. Note 4: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value is a maximum. Note 5: Guaranteed by design for UCSP parts. Note 6: R ON = R ON(MAX) - R ON(MIN). Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 8: Guaranteed by design. Note 9: Off-Isolation = 2log (V COM / V NO ), V COM = output, V NO = input to off switch. Note : Between any two switches. (T A = +25 C, unless otherwise noted.) Typical Operating Characteristics MAX472/MAX4722/ 8 ON-RESISTANCE vs. V COM =.8V MAX472/22/23 toc 6 5 = 3V ON-RESISTANCE vs. V COM MAX472/22/23 toc2 5 4 = 5V ON-RESISTANCE vs. V COM MAX472/22/23 toc3 RON (Ω) 6 4 = 2.5V = 3V = 4.2V RON (Ω) 4 3 T A = +25 C T A = +85 C RON (Ω) 3 2 T A = +85 C 2 = 5V 2 3 4 5 V COM (V) 2 T A = -4 C.5..5 2. 2.5 3. V COM (V) T A = -4 C T A = +25 C 2 3 4 5 V COM (V) 5
MAX472/MAX4722/ (T A = +25 C, unless otherwise noted.) LEAKAGE CURRENT vs. TEMPERATURE 5 = 3V SUPPLY CURRENT (na) LEAKAGE CURRENT (pa) 4 3 COM ON-LEAKAGE COM -LEAKAGE 2-4 -5 35 6 85 TEMPERATURE ( C) SUPPLY CURRENT vs. TEMPERATURE 6 5 4 = 5V 3 2 = 3V MAX472/22/23 toc4a MAX472/22/23 toc6 LEAKAGE CURRENT (pa) SUPPLY CURRENT (µa) Typical Operating Characteristics (continued) 8 6 4 2 LEAKAGE CURRENT vs. TEMPERATURE = 5V COM ON-LEAKAGE COM -LEAKAGE -4-5 35 6 85 8 6 4 2 TEMPERATURE ( C) SUPPLY CURRENT vs. LOGIC LEVEL = 3V = 5V MAX472/22/23 toc4b MAX472/22/23 toc7 CHARGE INJECTION (pc) ton/t (ns) 5 4 3 2 CHARGE INJECTION vs. V COM C L = nf = 3V 2 3 4 5 8 6 4 2 V COM (V) C L = nf = 5V TURN-ON/ TIME vs. SUPPLY VOLTAGE t ON t MAX472/22/23 toc5 MAX472/22/23 toc8-4 -5 35 6 85 TEMPERATURE ( C) 2 3 4 5 LOGIC LEVEL (V).5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V) ton/t (ns) 6 5 4 3 2 t ON, = 3.V TURN-ON/ TIME vs. TEMPERATURE t ON, = 5.V t, = 3.V t, = 5.V MAX472/22/23 toc9 OUTPUT RISE/FALL-TIME DELAY (ps) 3. 2.5 2..5..5 RISE/FALL-TIME DELAY vs. SUPPLY VOLTAGE INPUT RISE/FALL TIME = 5ns FIGURE 3, C L = 5pF RISE DELAY FALL DELAY MAX472/22/23 toc OUTPUT RISE/FALL-TIME DELAY (ns) 2..5..5 RISE/FALL-TIME DELAY vs. TEMPERATURE INPUT RISE/FALL TIME = 5ns FIGURE 3, C L = 5pF = 4.2V RISE DELAY FALL DELAY MAX472/22/23 toc -4-5 35 6 85 TEMPERATURE ( C).5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V) -4-5 35 6 85 TEMPERATURE ( C) 6
(T A = +25 C, unless otherwise noted.) MISMATCH (ps) 4 3 2 RISE TIME TO FALL TIME MISMATCH vs. SUPPLY VOLTAGE INPUT RISE/FALL TIME = 5ns FIGURE 3, C L = 5pF.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V) SKEW (ps) 2 5 MAX472/22/23 toc2 SKEW vs. TEMPERATURE INPUT RISE/FALL TIME = 5ns FIGURE 3, C L = 5pF = 4.2V MISMATCH (ps) Typical Operating Characteristics (continued) 2 5 5 MAX472/22/23 toc5 RISE TIME TO FALL TIME MISMATCH vs. TEMPERATURE INPUT RISE/FALL TIME = 5ns FIGURE 3, C L = 5pF = 4.2V -4-5 35 6 85 TEMPERATURE ( C) ON-LOSS (db) 2-2 -4-6 -8 MAX472/22/23 toc3 SKEW (ps) = 3V/5V 4 3 2 SKEW vs. SUPPLY VOLTAGE INPUT RISE/FALL TIME = 5ns FIGURE 3, C L = 5pF.5 2.5 3.5 4.5 5.5 SUPPLY VOLTAGE (V) FREQUENCY RESPONSE ON-LOSS -ISOLATION MAX472/22/23 toc6 MAX472/22/23 toc4 MAX472/MAX4722/ 5 - -2 CROSSTALK -4-5 35 6 85 TEMPERATURE ( C) -4.. FREQUENCY (MHz) THD (%). TOTAL HARMONIC DISTORTION vs. FREQUENCY = 3V R L = 6Ω MAX472/22/23 toc7 LOGIC THRESHOLD (V) LOGIC THRESHOLD vs. SUPPLY VOLTAGE 2..6 V TH+.2 V TH-.8 MAX472/22/23 toc8.4. k k k FREQUENCY (Hz).5 2. 2.5 3. 3.5 4. 4.5 5. 5.5 SUPPLY VOLTAGE (V) 7
MAX472/MAX4722/ PIN MAX472 MAX4722 UCSP µmax UCSP µmax UCSP µmax Detailed Description The MAX472/MAX4722/ dual SPST analog switches operate from a single +.8V to +5.5V supply. The MAX472/MAX4722/ offer excellent AC characteristics, <.5nA leakage current, less than 2ms differential skew, and 5pF on-channel capacitance. All of these devices are CMOS-logic compatible with railto-rail signal handling capability. The MAX472/MAX4722/ are USB-compliant switches that provide 4.5Ω (max) on-resistance, and 5pF on-channel capacitance to maintain signal integrity. At 2Mbps (USB full-speed data rate specification) the MAX472/MAX4722/ introduce less than 2ns propagation delay between input and output signals and less than.5ns change in skew for the output signals (see Figure 3 for more details). The MAX472 has two normally open (NO) switches, the MAX4722 has two normally closed (NC) switches, and the has one NO switch and one NC switch. NAME FUNCTION A 3 A 3 A 3 IN2 Logic-Control Digital Input A2 4 A2 4 A2 4 Ground. Connect to digital ground. A3 5 NO2 Analog-Switch Normally Open Terminal B 2 B 2 B 2 COM Analog-Switch Common Terminal B3 6 B3 6 B3 6 COM2 Analog-Switch Common Terminal C C NO Analog-Switch Normally Open Terminal C2 8 C2 8 C2 8 Positive Analog Supply C3 7 C3 7 C3 7 IN Logic-Control Digital Input Pin Description C NC Analog-Switch Normally Closed Terminal A3 5 A3 5 NC2 Analog-Switch Normally Closed Terminal Applications Information Digital Control Inputs The MAX472/MAX4722/ logic inputs accept up to +5.5V regardless of supply voltage. For example, with a +3.3V supply, IN_ can be driven low to and high to +5.5V allowing for mixing of logic levels in a system. Driving the control logic inputs rail-to-rail minimizes power consumption. For a +3.V supply voltage, the logic thresholds are.5v (low) and.4v (high); for a +5V supply voltage, the logic thresholds are.8v (low) and 2.V (high). Analog Signal Levels Analog signals that range over the entire supply voltage ( to ) are passed with very little change in on-resistance (see the Typical Operating Characteristics). The switches are bidirectional, so the NO_, NC_, and COM_ pins can be either inputs or outputs. 8
MAX472/ MAX4722/ LOGIC INPUT V N_ Figure. Switching Time V COM V COM2 LOGIC INPUT COM COM2 IN_ NO_ OR NC_ IN_ COM_ C L INCLUDES FIXTURE AND STRAY CAPACITANCE. R V OUT = V COM ( L R L - R ON ) NO_ NC_ R L2 R L V OUT2 C L2 C L R L V OUT V OUT C L INCLUDES FIXTURE AND STRAY CAPACITANCE. CL LOGIC INPUT SWITCH OUTPUT Test Circuits/Timing Diagrams LOGIC INPUT SWITCH OUTPUT (V OUT ) SWITCH OUTPUT 2 (V OUT2 ) V IH V IL V V IH V IL V V 5% V OUT t ON t.9 x V UT.9 x V OUT LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. 5% t D.9 x V UT t D.9 x V OUT2 MAX472/MAX4722/ Figure 2. Break-Before-Make Interval Power-Supply Bypassing Power-supply bypassing improves noise margin and prevents switching noise from propagating from the supply to other components. A.µF capacitor connected from to is adequate for most applications. Power-Supply Sequencing and Overvoltage Protection Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to the device. UCSP Package Considerations For general UCSP package information and PC layout considerations, please refer to the Maxim Application Note (Wafer-Level Chip-Scale Package). UCSP Reliability The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the user s assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering use of a UCSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process. Mechanical stress performance is a greater consideration for a UCSP package. UCSPs are attached through direct solder contact to the user s PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be considered. Information on Maxim s qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim s website at www.maxim-ic.com. 9
MAX472/MAX4722/ TxD+ TxD- t ro - t ri t fo - t fi R s R s R s = 39Ω C L = 5pF A A- INPUT A INPUT A- OUTPUT B OUTPUT B- DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS. DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS. Test Circuits/Timing Diagrams (continued) B B- C L C L % 9% % 9% t ri t fi t ro 5% 5% 5% t fo 5% 9% t skew_i % 9% t skew_o % t skew_o t skew_i CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS. CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS. Figure 3. Input/Output Skew Timing Diagram
MAX472/ MAX4722/ V GEN R GEN Figure 4. Charge Injection SIGNAL GENERATOR dbm ANALYZER 5Ω* C =.µf NC_ OR NO_ NC_ or NO_ COM_ IN_ COM_ V IL TO V IH MAX472/ MAX4722/ IN_ Test Circuits/Timing Diagrams (continued) C L V OR V OUT V OUT IN IN SIGNAL GENERATOR dbm ANALYZER V TO ON ON Q = ( V OUT )(C L ) V OUT LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. C =.µf COM IN NO2 MAX472/ MAX4722/ NO IN2 COM2 5Ω V OR N.C. MAX472/MAX4722/ *USED ONLY FOR -ISOLATION TEST. Figure 5a. On-Loss, Off-Isolation, and Crosstalk Figure 5b. Crosstalk Test Circuit CAPACITANCE METER f = MHz C =.µf NC_ or NO_ COM_ MAX472/ MAX4722/ IN_ V OR TRANSISTOR COUNT: 8 PROCESS: BiCMOS Chip Information Figure 6. Channel Off/On-Capacitance
MAX472/MAX4722/ TOP VIEW Pin Configurations/Functional Diagrams/Truth Tables (continued) NO COM IN2 2 3 4 LOGIC MAX472 µmax SWITCH ON 8 7 6 5 IN COM2 NO2 NC COM IN2 2 3 4 LOGIC MAX4722 µmax SWITCH ON 8 7 6 5 IN COM2 NC2 SWITCHES SHOWN FOR LOGIC "" INPUT NO COM IN2 2 3 4 µmax LOGIC SWITCH ON 8 7 6 5 SWITCH2 ON IN COM2 NC2 2
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) MAX472/MAX4722/ 3
MAX472/MAX4722/ Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.).6±..6±. A2 8 e ÿ.5±. D TOP VIEW b E A H A c 4X S L BOTTOM VIEW 8 α DIM A A INCHES MIN MAX -.43.2.6.37..4.5.7.6.2.256 BSC A2.3 b c D e E.6 H.88 L.6 α S.27 BSC.2.98.26 6 MILLIMETERS MIN MAX -..5.5.75.95.25.36.3.8 2.95 3.5.65 BSC 2.95 3.5 4.78 5.3.4.66 6.525 BSC 8LUMAXD.EPS FRONT VIEW SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, 8L umax/usop APPROVAL DOCUMENT CONTROL NO. REV. 2-36 J Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 4 Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, CA 9486 48-737-76 22 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.