19-218; Rev 1; 9/8 1Ω, Quad, SPST, +3V Logic-Compatible General Description Maxim s analog switches feature low on-resistance (1Ω max) and 1.5Ω onresistance matching between channels. These switches are +3V logic compatible when powered from ±15V or +12V supplies. The switches conduct equally well in either direction, and offer low leakage over temperature (2.5nA at +85 C). The are quad, singlepole/single-throw (SPST) analog switches. The is normally closed (NC), and the is normally open (NO). The has two NC switches and two NO switches. All three devices operate from a single +.5V to +36V supply or from dual ±.5V to ±2V, and are available in 16-pin TSSOP, SO, and DIP packages. Test Equipment Communication Systems PBX, PABX Systems Audio Signal Routing Avionics Sample-and-Hold Circuits Data-Acquisition Systems xdsl Modems Applications Features +3V Logic-Compatible Digital Inputs V IH = 2.V V IL =.8V Pin Compatible with MAX312/MAX313/MAX31 and DG11/DG12/DG13 Low On-Resistance (1Ω max) Guaranteed R Match Between Channels (1.5Ω max) Guaranteed R Flatness over Specified Signal Range (2Ω max) Crosstalk > 96dB at 2kHz Single-Supply Operation: +.5V to +36V Dual-Supply Operation: ±.5V to ±2V Rail-to-Rail Signal Handling Ordering Information PART TEMP RANGE PIN-PACKAGE CUE C to +7 C 16 TSSOP CSE C to +7 C 16 Narrow SO CPE C to +7 C 16 Plastic DIP EUE - C to +85 C 16 TSSOP ESE - C to +85 C 16 Narrow SO EPE - C to +85 C 16 Plastic DIP ETP - C to +85 C 2 Thin QFN-EP* *EP = Exposed pad. Ordering Information continued at end of data sheet. Pin Configurations TOP VIEW IN1 1 16 IN2 IN1 1 16 IN2 IN1 1 16 IN2 COM1 2 15 COM2 COM1 2 15 COM2 COM1 2 15 COM2 NC1 3 1 NC2 NO1 3 1 NO2 NO1 3 1 NC2 13 13 13 5 12 5 12 5 12 NC 6 11 NC3 NO 6 11 NO3 NO 6 11 NC3 COM 7 1 COM3 COM 7 1 COM3 COM 7 1 COM3 IN 8 9 IN3 IN 8 9 IN3 IN 8 9 IN3 DIP/SO/TSSOP DIP/SO/TSSOP DIP/SO/TSSOP LOGIC SWITCH 1 LOGIC SWITCH 1 SWITCHES SHOWN FOR LOGIC "" INPUT LOGIC 1 SWITCHES 1, SWITCHES 2, 3 Pin Configurations continued at end of data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-62, or visit Maxim s website at www.maxim-ic.com.
1Ω, Quad, SPST, +3V Logic-Compatible ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to )...-.3V to +V...+.3V to -V to...-.3v to +V V to...-.3v to +V All Other Pins (Note 1)...( -.3V) to ( +.3V) Continuous Current (,, NC_)...±1mA Peak Current (,, NC_) (pulsed at 1ms, 1% duty cycle max)...±3ma Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Dual Supplies Continuous Power Dissipation (T A = +7 C) TSSOP (derate 6.7mW/ C above +7 C)...57mW Narrow SO (derate 8.7mW/ C above +7 C)...696mW Plastic DIP (derate 1.53mW/ C above +7 C)...82mW Thin QFN (derate 21.3mW/ C above +7 C)...172.1mW Operating Temperature Ranges MAX31_LC_E... C to +7 C MAX31_LE_E...- C to +85 C Storage Temperature Range...-65 C to +15 C Junction Temperature...+15 C Lead Temperature (soldering, 1s)...+3 C Note 1: Signals on,, or NC_ exceeding or are clamped by internal diodes. Limit forward-diode current to maximum current rating. ( = +15V, = -15V, =, V IH = 2.V, V IL =.8V, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Notes 2, 3) PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS ANALOG SWITCH Analog Signal Range V COM _, V NO _, V V NC_ I +25 C 6.5 1 On-Resistance R = 1mA, V or V NC_ = ±1V T MIN to T MAX 15 On-Resistance Match Between Channels (Note ) On-Resistance Flatness (Note 5) Off-Leakage Current ( or NC_) (Note 6) COM Off-Leakage Current (Note 6) COM On-Leakage Current (Note 6) DYNAMIC ΔR R FLAT() I NO I NC I COM() I COM() I = 1mA, +25 C.3 1.5 V or V NC_ = ±1V T MIN to T MAX 3 I = 1mA, +25 C.2 2 V or V NC_ = -5V,, 5V T MIN to T MAX V = +1V, +25 C -.5 -.2.5 V or V NC_ = ±1V T MIN to T MAX -2.5 2.5 V = ±1V, +25 C -.5 -.2.5 V or V NC_ = + 1V T MIN to T MAX -2.5 2.5 V or V NC_ = ±1V, +25 C -1 -. 1 V = ±1V T MIN to T MAX -5 5 V +25 C 115 225 Turn-On Time t = ±1V, R L = 3Ω, C L = 35pF, Figure 1 T MIN to T MAX 275 V +25 C 1 185 Turn-Off Time t = ±1V, R L = 3Ω, C L = 35pF, Figure 1 T MIN to T MAX 235 Ω Ω Ω na na na ns ns Break-Before-Make Time Delay ( only, Note 7) t D R L = 3Ω, C L = 35pF, Figure 2 +25 C 1 1 ns Charge Injection (Note 7) Q V GEN =, R GEN =, C L = 1.nF, Figure 3 +25 C -3 2 3 pc 2
1Ω, Quad, SPST, +3V Logic-Compatible ELECTRICAL CHARACTERISTICS Dual Supplies (continued) ( = +15V, = -15V, =, V IH = 2.V, V IL =.8V, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Notes 2, 3) PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS Off-Isolation (Note 8) V ISO f = 1MHz, R L = 5Ω, C L = 5pF, Figure Crosstalk (Note 9) V CT f = 1MHz, R L = 5Ω, C L = 5pF, Figure 5 +25 C -75 db +25 C -85 db NC_ or Off-Capacitance C f = 1MHz, Figure 6 +25 C 15 pf Off-Capacitance C () f = 1MHz, Figure 6 +25 C 15 pf On-Capacitance C f = 1MHz, Figure 6 +25 C 7 pf LOGIC INPUT Input Logic High V IH 2. V Input Logic Low V IL.8 V Input Current with Input Logic High Input Current with Input Logic Low POWER SUPPLY I INH = 2.V -.5.5.5 µa I INL =.8V -.5.5.5 µa Power-Supply Range, ±.5 ±2. V Positive Supply Current I+ Negative Supply Current I- = +16.5V, = -16.5V, +25 C.1 1 V IN = or T MIN to T MAX 5 = +16.5V, = -16.5V, +25 C 13 2 V IN = 5V T MIN to T MAX 3 = +16.5V, = -16.5V, +25 C 1 V IN = or 5V T MIN to T MAX 5 = +16.5V, = -16.5V, +25 C.1 1 V IN = or T MIN to T MAX 5 Ground Current I = +16.5V, = -16.5V, +25 C 13 2 V IN = 5V T MIN to T MAX 3 µa µa µa ELECTRICAL CHARACTERISTICS Single Supply ( = +12V, =, =, V IH = 2.V, V IL =.8V, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Notes 2, 3) PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS ANALOG SWITCH Analog Signal Range V COM _, V NO _, V V NC_ I +25 C 12.5 25 On-Resistance R = 1mA, V NC_ or V = +1V T MIN to T MAX 35 Ω 3
1Ω, Quad, SPST, +3V Logic-Compatible ELECTRICAL CHARACTERISTICS Single Supply (continued) ( = +12V, =, =, V IH = 2.V, V IL =.8V, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) (Notes 2, 3) PARAMETER SYMBOL CDITIS T A MIN TYP MAX UNITS On-Resistance Match Between Channels (Note ) On-Resistance Flatness (Note 5) DYNAMIC ΔR R FLAT() I = 1mA, +25 C.3 2 V or V NC_ = +1V T MIN to T MAX 2.5 I = 1mA, +25 C 1.7 3.5 V or V NC_ = +2V, +6V, +1V T MIN to T MAX.5 V +25 C 165 325 Turn-On Time t = 8V, R L = 3Ω, C L = 35pF, Figure 1 T MIN to T MAX 25 V +25 C 117 175 Turn-Off Time t = 8V, R L = 3Ω, C L = 35pF, Figure 1 T MIN to T MAX 225 Break-Before-Make Time Delay ( only, Note 7) Charge Injection LOGIC INPUT t D Q R L = 3Ω, C L = 35pF, Figure 2 Figure 3, C L = 1.nF, V GEN =, R GEN = +25 C 1 5 ns +25 C -1 pc Input Logic High V IH 2. V Input Logic Low V IL.8 V Input Current with Input Logic High Input Current with Input Logic Low POWER SUPPLY I INH = 2.V -.5.5.5 µa I INL =.8V -.5.5.5 µa Power-Supply Range +.5 +36 V Positive Supply Current I+ = +13.2V, V IN = or = +13.2V, V IN = 5V +25 C.1 1 T MIN to T MAX 5 +25 C 25 125 T MIN to T MAX 175 Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: - C specifications are guaranteed by design. Note : ΔR = ΔR max - ΔR min. Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal range. Note 6: Leakage parameters are 1% tested at maximum-rated hot temperature and guaranteed by correlation at +25 C. Note 7: Guaranteed by design. Note 8: Off-isolation = 2log 1 [V COM /(V NC or V NO )], V COM = output, V NC or V NO = input to off switch. Note 9: Between any two switches. Ω Ω ns ns µa
1Ω, Quad, SPST, +3V Logic-Compatible (T A = +25 C, unless otherwise noted.) R (Ω) R (Ω) 16 1 12 1 8 6 = +5V, = -5V -RESISTANCE vs. V COM (DUAL SUPPLIES) = +1V, = -1V = +15V, = -15V = +2V, = -2V 2-2 -1 1 2 V COM (V) 2 16 12 8 -RESISTANCE vs. V COM AND TEMPERATURE (SINGLE SUPPLY) T A = +25 C = +12V, = T A = +85 C T A = +7 C T A = - C 3 6 9 12 V COM (V) MAX312/3/L toc1 MAX312/3/L toc R (Ω) LEAKAGE CURRENT (na) 3 2 1 1 1.1.1.1.1 -RESISTANCE vs. V COM (SINGLE SUPPLY) = +5V = +1V = +12V 5 1 15 2 V COM (V) = = +15V = +2V - AND -LEAKAGE CURRENT vs. TEMPERATURE = +15V, = -15V, V COM = +1V -LEAKAGE - -15 1 35 6 85 TEMPERATURE ( C) Typical Operating Characteristics -LEAKAGE MAX312/3/L toc2 MAX312/3/L toc5 R (Ω) Q (pc) 1 9 8 7 6 5 -RESISTANCE vs. V COM AND TEMPERATURE (DUAL SUPPLIES) T A = +85 C T A = +25 C T A = +7 C 3 = +15V, = -15V T A = - C 2-15 -5 5 15 V COM (V) 8 6 2-2 - -6 CHARGE INJECTI vs. V COM = +15V, = -15V = +12V, = -15-1 -5 5 1 15 V COM (V) MAX312/3/L toc3 MAX312/3/L toc6.1.1 = +16.5V = -16.5V V IN = +16.5V SUPPLY CURRENT vs. TEMPERATURE MAX312/3/L toc7.1 TOTAL HARMIC DISTORTI vs. FREQUENCY = +15V, = -15V, 5V RMS SIGNAL 22kHz BANDWIDTH MAX312/3/L toc8-2 FREQUENCY RESPSE -RESPSE MAX312/3/L toc9 I+, I-, IL (μa).1.1.1 I+ I- I THD (%).1.1 R L = 6Ω R L = 1kΩ LOSS (db) - -6 -ISOLATI.1 - -15 1 35 6 85 TEMPERATURE ( C).1 MEASUREMENT LIMIT 1 1 1k 1k 1k FREQUENCY (Hz) -8.1 1 1 1 1 FREQUENCY (MHz) 5
1Ω, Quad, SPST, +3V Logic-Compatible (T A = +25 C, unless otherwise noted.) SUPPLY CURRENT (μa) TURN-/TURN- TIME (ns) 5 3 2 1-1 -2-3 - -5 16 1 12 1 8 SUPPLY CURRENT vs. LOGIC INPUT VOLTAGE I I+ = +16.5V, = -16.5V, ALL CHANNELS 3 6 9 12 15 LOGIC INPUT VOLTAGE (V) = +15V, = -15V TURN-/TURN- TIME vs. TEMPERATURE t t MAX312/3/L toc1 MAX312/3/L toc13 TURN-/TURN- TIME (ns) LOGIC THRESHOLD (V) Typical Operating Characteristics (continued) 115 15 95 85 2. 1.8 1.6 1. 1.2 1. TURN-/TURN- TIME vs. V COM (DUAL SUPPLIES) t t = +15V, = -15V -15-1 -5 5 1 15 V COM (V) LOGIC THRESHOLD vs. SUPPLY VOLTAGE SINGLE SUPPLY DUAL SUPPLIES MAX312/3/L toc11 MAX312/3/L toc1 TURN-/TURN- TIME (ns) TURN-/TURN- TIME (ns) 18 16 1 12 1 7 6 5 3 2 TURN-/TURN- TIME vs. V COM (SINGLE SUPPLY) t t = +12V, = 3 6 9 12 V COM (V) t TURN-/TURN- TIME vs. SUPPLY VOLTAGE t MAX312/3/L toc12 MAX312/3/L toc15 6-5 -25 25 5 75 1 TEMPERATURE ( C).8 8 12 16 2 SUPPLY VOLTAGE (V) 1 ±3 ±6 ±9 ±12 ±15 SUPPLY VOLTAGE (V) 6
1Ω, Quad, SPST, +3V Logic-Compatible PIN (TSSOP, SO, DIP) 1, 8, 9, 16 1, 8, 9, 16 1, 8, 9, 16 2, 7, 1, 15 2, 7, 1, 15 2, 7, 1, 15 3, 6, 11, 1 3, 6, 11, 1 NAME IN1, IN, IN3, IN2 COM1, COM, COM3, COM2 NC1, NC, NC3, NC2 NO1, NO, NO3, NO2 Logic Inputs FUNCTI Analog Signal Common Terminals Analog Signal Normally Closed Terminals Analog Signal Normally Open Terminals 3, 6 NO1, NO Analog Signal Normally Open Terminals 11, 1 NC3, NC2 Analog Signal Normally Closed Terminals 5 5 5 Ground Pin Descriptions Negative Analog Supply Input (connect to for singlesupply operation) 12 12 12 No Connection. Not internally connected. 13 13 13 Positive Analog Supply Input 7
1Ω, Quad, SPST, +3V Logic-Compatible PIN (TQFN) 7, 9, 17, 19 7, 9, 17, 19 7, 9, 17, 19 6, 1, 16, 2 6, 1, 16, 2 6, 1, 16, 2 1, 5, 11, 15 1, 5, 11, 15 NAME IN, IN3, IN2, IN1 COM, COM3, COM2, COM1 NC1, NC, NC3, NC2 NO1, NO, NO3, NO2 Applications Information Low-Distortion Audio The, having very low R and very low R variation with signal amplitude, are well suited for low-distortion audio applications. The Typical Operating Characteristics show Total Harmonic Distortion (THD) vs. Frequency graphs for several signal amplitudes and impedances. Higher source and load impedances improve THD, but reduce off-isolation. Off-Isolation at High Frequencies In 5Ω systems, the high-frequency on-response of these parts extends from DC to above 1MHz with a typical loss of -2dB. When the switch is turned off, however, it behaves like a capacitor, and off-isolation decreases with increasing frequency. (Above 3MHz, the switch actually passes more signal turned off than turned on.) This effect is more pronounced with higher source-and-load impedances. Above 5MHz, circuit board layout becomes critical, and it becomes difficult to characterize the response of the switch independent of the circuit. The graphs shown in the Typical Operating Characteristics were taken using a 5Ω source and load connected with BNC connectors. Logic Inputs Analog Signal Common Terminals FUNCTI Analog Signal Normally Closed Terminals Analog Signal Normally Open Terminals 1, 5 NO1, NO Analog Signal Normally Open Terminals 11, 15 NC3, NC2 Analog Signal Normally Closed Terminals 2 2 2 Negative Analog Supply Input (connect to for single-supply operation) Ground 3, 8, 12, 13, 18 3, 8, 12, 13, 18 3, 8, 12, 13, 18 No Connection. Not internally connected. 1 1 1 Positive Analog Supply Input EP Exposed Pad. Connect EP to. Pin Descriptions (continued) Power-Supply Sequencing-Free Operation Most CMOS switches require specific power-supply sequencing in order to prevent the devices from latching up. The older MAX312/MAX313/MAX31 devices require a proper power-supply sequence of, V L,, and so forth. Otherwise, it becomes necessary to add signal diodes to the circuit in order to protect it from potential latchups. The new devices eliminate the need for a V L pin and permit the user to utilize any power-up sequence that is required. It is, however, important not to exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to the devices. TRANSISTOR COUNT: 92 PROCESS: CMOS Chip Information 8
1Ω, Quad, SPST, +3V Logic-Compatible LOGIC INPUT SWITCH OUTPUT V V O 5% t.9v O LOGIC INPUT WAVEFORMS INVERTED FOR NORMALLY CLOSED SWITCHES. Figure 1. Switching-Time Test Circuit LOGIC INPUT SWITCH OUTPUT 1 (V 1 ) SWITCH OUTPUT 2 (V 2 ) V V O1 V O2 t D 5%.9V 1 t r < 2ns t f < 2ns t t D.9V 2 SWITCH INPUT V LOGIC INPUT V COM1 = +1V V COM2 = +1V LOGIC INPUT Test Circuits/Timing Diagrams OR NC_ REPEAT TEST FOR EACH SWITCH. FOR LOAD CDITIS, SEE ELECTRICAL CHARACTERISTICS. C L INCLUDES FIXTURES AND STRAY CAPACITANCE. V O = V COM x R L R L + R NC_ R L2 V 2 SWITCH OUTPUT C L2 R L 3Ω R L1 V O C L 35pF V 1 C L1 C L INCLUDES FIXTURES AND STRAY CAPACITANCE. Figure 2. Break-Before-Make Test Circuit ( Only) 9
1Ω, Quad, SPST, +3V Logic-Compatible R GEN V GEN Figure 3. Charge Injection Test Circuit SIGNAL GENERATOR dbm C V NC_ OR Test Circuits/Timing Diagrams (continued) V C L V V V Q = (DV )(C L ) V IN DEPENDS SWITCH CFIGURATI; INPUT POLARITY DETERMINED BY TRUTH TABLE SIGNAL GENERATOR dbm C DV 5Ω IN1 IN2 ANALYZER NC_ OR C ANALYZER R L R L C Figure. Off-Isolation Test Circuit Figure 5. Crosstalk Test Circuit 1
1Ω, Quad, SPST, +3V Logic-Compatible CAPACITANCE METER f = 1MHz C NC_ OR Figure 6. Channel Off-Capacitance Test Circuit Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE CUE C to +7 C 16 TSSOP CSE C to +7 C 16 Narrow SO CPE C to +7 C 16 Plastic DIP EUE - C to +85 C 16 TSSOP ESE - C to +85 C 16 Narrow SO EPE - C to +85 C 16 Plastic DIP ETP - C to +85 C 2 Thin QFN-EP* CUE C to +7 C 16 TSSOP CSE C to +7 C 16 Narrow SO CPE C to +7 C 16 Plastic DIP EUE - C to +85 C 16 TSSOP ESE - C to +85 C 16 Narrow SO EPE - C to +85 C 16 Plastic DIP ETP - C to +85 C 2 Thin QFN-EP* *EP = Exposed pad. Test Circuits/Timing Diagrams (continued) C CAPACITANCE METER f = 1MHz C NC_ OR Figure 7. Channel On-Capacitance Test Circuit C 11
1Ω, Quad, SPST, +3V Logic-Compatible COM2 IN2 IN1 COM1 16 17 18 19 2 *EP 1 COM3 9 IN3 8 7 IN 6 COM COM2 16 IN2 17 18 IN1 19 COM1 2 15 1 13 12 11 *EP Pin Configurations (continued) COM2 16 IN2 17 18 IN1 19 COM1 2 1 COM3 9 IN3 8 7 IN 6 COM NC2 NO3 NC1 NC THIN QFN NO1 1 2 3 5 NC2 NC3 NO NC1 1 15 NC2 NC3 1 13 12 11 NC THIN QFN 2 3 5 15 1 13 12 11 1 COM3 9 IN3 8 7 IN *EP 6 COM 1 2 3 5 *EP = EXPOSED PAD. CNECT TO. THIN QFN 12
1Ω, Quad, SPST, +3V Logic-Compatible Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 16 TSSOP U16-1 21-66 16 Narrow SO S16-8 21-1 16 Plastic DIP P16-2 21-3 2 TQFN T255-5 21-1 13
1Ω, Quad, SPST, +3V Logic-Compatible REVISI NUMBER REVISI DATE DESCRIPTI Revision History PAGES CHANGED 1/1 Initial release. 1 9/8 Added the TQFN package. 1, 2, 8, 11, 12, 13 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 1 Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA 986 8-737-76 28 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.