SP7 Series pf 4kV Diode Array RoHS Pb GREEN Description The SP7 is an array of SR/Diode bipolar structures for ESD and over-voltage protection to sensitive input circuits. The SP7 has protection SR/Diode device structures per input. A total of 4 available inputs can be used to protect up to 4 external signal or bus lines. Over-voltage protection is from the (pins -7 and 9-5) to V+ or V-. Pinout The SR structures are designed for fast triggering at a threshold of one +V BE diode threshold above V+ (Pin 6) or a -V BE diode threshold below V- (Pin 8). From an input, a clamp to V+ is activated if a transient pulse causes the input to be increased to a voltage level greater than one V BE above V+. A similar clamp to V- is activated if a negative pulse, one V BE less than V-, is applied to an input. Standard ESD Human Body Model (HBM) apability is: 6 V+ 5 4 Features SP7 (PDIP, SOI) TOP VIEW 4 5 6 ESD Interface apability for HBM Standards - MIL STD 5.7... 5kV - IE 6-4-, Direct Discharge, 7 - Single Input... 4kV (Level ) V- 8 9 - Two Inputs in Parallel... 8kV (Level 4) - IE 6-4-, Air Discharge...5kV (Level 4) Functional Block Diagram High Peak urrent apability - IE 6-4-5 (8/µs)... ±A V+ 6 - Single Pulse, µs Pulse Width... ±A - Single Pulse, 4µs Pulse Width... ±5A Designed to Provide Over-Voltage Protection - Single-Ended Voltage Range to... +V - 7 9-5 - Differential Voltage Range to... ±5V Fast Switching...ns Risetime Low Input Leakages...nA at 5º (Typ) Low Input apacitance... pf (Typ) An Array of 4 SR/Diode Pairs Operating Temperature Range...-4º to 5º V- 8 Applications Additional Information Microprocessor/Logic Input Protection Data Bus Protection Analog Device Input Protection Voltage lamp Datasheet Resources Samples Life Support Note: Not Intended for Use in Life Support or Life Saving Applications The products shown herein are not designed for use in life sustaining or life saving applications unless otherwise expressly indicated. 7 Littelfuse, Inc. Revised: //7
Absolute Maximum Ratings Parameter Rating Units ontinuous Supply Voltage, (V+) - (V-) +5 V Forward Peak urrent, I to V, I to GND (Refer to Figure 5) ±, µs A AUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Note: ESD Ratings and apability - See Figure, Table Load Dump and Reverse Battery (Note ) Thermal Information Parameter Rating Units Thermal Resistance (Typical, Note ) θ JA o /W PDIP Package 9 o /W SOI Package o /W Maximum Storage Temperature Range -65 to 5 o Maximum Junction Temperature (Plastic Package) 5 o Maximum Lead Temperature (Soldering -4s) (SOI Lead Tips Only) 6 o. θ JA is measured with the component mounted on an evaluation P board in free air. Electrical haracteristics T A = -4 o to 5 o, V =.5V, Unless Otherwise Specified Parameter Symbol Test onditions Min Typ Max Units Operating Voltage Range, V SUPPLY - to - V V SUPPLY = [(V+) - (V-)] Forward Voltage Drop: I = A (Peak Pulse) to V- V FWDL - - V to V+ V FWDH - - V Input Leakage urrent I - 5 na Quiescent Supply urrent I QUIESENT - 5 na Equivalent SR ON Threshold Note -. - V Equivalent SR ON Resistance V FWD /I FWD ; Note - - Ω Input apacitance - - pf Input Switching Speed t ON - - ns. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and everse battery V+ and V- pins are connected to the same supply voltage source as the device or control line under protection, a current limiting resistor should be connected in series between the external supply and the SP7 supply pins to limit reverse battery current to within the rated maximum limits. Bypass capacitors of typically.µf or larger from the V+ and V- pins to ground are recommended.. Refer to the Figure graph for definitions of equivalent SR ON Threshold and SR ON Resistance. These characteristics are given here for thumb-rule nformation to determine peak current and dissipation under EOS conditions. Typical Application of the SP7 (Application as an Input lamp for Over-voltage, greater than V BE Above V+ or less than -V BE below V-) +V +V PUT DRIVERS OR SIGNAL SOURES LEAR OR DIGITAL I TERFAE -7 9-5 TO +V V+ SP7 V- SP7 PUT PROTETION IRUIT ( OF 4 ON HIP) FIGURE 4. TYPIAL APPLIATION OF THE SP7 AS AN PUT LAMP FOR OVER-VOLTAGE, GREATER THAN V BE ABOVE V+ OR LESS THAN -V BE BELOW V- 7 Littelfuse, Inc. Revised: //7
ESD apability ESD capability is dependent on the application and defined test standard. The evaluation results for various test standards and methods based on Figure are shown in Table. For the Modified MIL-STD-5.7 condition that is defined as an in-circuit method of ESD testing, the V+ and V- pins have a return path to ground and the SP7 ESD capability is typically greater than 5kV from pf through.5kω. By strict definition of MIL-STD-5.7 using pin-to-pin device testing, the ESD voltage capability is greater than 6kV. The MIL-STD-5.7 results were determined from AT&T ESD Test Lab measurements. The HBM capability to the IE 6-4- standard is greater than 5kV for air discharge (Level 4) and greater than 4kV for direct discharge (Level ). Dual pin capability ( adjacent pins in parallel) is well in excess of 8kV (Level 4). For ESD testing of the SP7 to EIAJ I Machine Model (MM) standard, the results are typically better than kv from pf with no series resistance. Figure : Electrostatic Discharge Test H.V. SUPPLY V D HARGE SWITH R DUT Standard Type/Mode R D D ±V D Modified HBM.5kΩ pf 5kV MIL STD 5.7 Standard HBM.5kΩ pf 6kV HBM, Air Discharge Ω 5pF 5kV IE 6-4- HBM, Direct Discharge Ω 5pF 4kV HBM, Direct Discharge, Two Parallel Input Pins Ω 5pF 8kV EIAJ I Machine Model kω pf kv D R D IE -4-: R 5 to M MIL STD 5.7: R to M DISHARGE SWITH FIGURE. ELETR OSTATI DISHARGE TEST Table : ESD Test onditions Figure : Low urrent SR Forward Voltage Drop urve Figure : High urrent SR Forward Voltage Drop urve T A = 5 SGLE PULSE.5 T A = 5 SGLE PULSE FORWARD SR URRENT (ma) 8 6 4 FORWARD SR URRENT (A).5.5 EQUIV. SAT. ON THRESHOLD ~.V V FWD IFWD 6 8 FORWARD SR VOLTAGE DROP (mv) FORWARD SR VOLTAGE DROP (V) 7 Littelfuse, Inc. Revised: //7
Peak Transient urrent apability for Long Duration Surges The peak transient current capability rises sharply as the width of the current pulse narrows. Destructive testing was done to fully evaluate the SP7 s ability to withstand a wide range of transient current pulses. The circuit used to generate current pulses is shown in Figure 4. The test circuit of Figure 4 is shown with a positive pulse input. For a negative pulse input, the (-) current pulse input goes to an SP7 input pin and the (+) current pulse input goes to the SP7 V- pin. The V+ to V- supply of the SP7 must be allowed to float. (i.e., It is not tied to the ground reference of the current pulse generator.) Figure 5 shows the point of overstress as defined by increased leakage in excess of the data sheet published limits. The maximum peak input current capability is dependent on the V+ to V- voltage supply level, improving as the supply voltage is reduced. Values of, 5, 5 and voltages are shown. The safe operating range of the transient peak current should be limited to no more than 75% of the measured overstress level for any given pulse width as shown in Figure 5. When adjacent input pins are paralleled, the sustained peak current capability is increased to nearly twice that of a single pin. For comparison, tests were run using dual pin combinations +, +4, 5+6, 7+9, +, + and 4+5. The overstress curve is shown in Figure 5 for a 5V supply condition. The dual pins are capable of A peak current for a µs pulse and 4A peak current for a ms pulse. The complete for single pulse peak current vs. pulse width time ranging up to second are shown in Figure 5. PEAK URRENT (A) Figure 4: Typical SP7 Peak urrent Test ircuit with a Variable Pulse Width Input 7 6 5 4 + V G - R VOLTAGE PROBE R ~ TYPIAL V G ADJ. V/A TYPIAL ~ µf (+) VARIABLE TIME DURATION URRENT PULSE GENERATOR URRENT SENSE 4 V+ 6 5 4 SP7 5 6 7 8 V- 9 FIGURE 5. TYPIAL SP7 PEAK URRENT TEST IRUIT WITH A VARIABLE PULSE WIDTH PUT Figure 5: SP7 Typical Nonrepetitive Peak urrent Pulse apability Showing the Measured Point of Overstress in Amperes vs pulse width time in milliseconds (T A = 5 o ) 9 8 V 5V V V+ TOV-SUPPLY... PULSE WIDTH TIME (ms) (-) AUTION: SAFE OPERATG ONDITIONS LIMIT THE MAXIMUM PEAK URRENT FOR A GIVEN PULSE WIDTH TO BE NO GREATER THAN 75% OF THE VALUES SHOWN ON EAH URVE. SGLE P STRESS URVES DUAL P STRESS URVE + - 5V 5V 7 Littelfuse, Inc. Revised: //7
Temperature Soldering Parameters Reflow ondition - Temperature Min (T s(min) ) 5 Pb Free assembly T P Ramp-up t P ritical Zone TL to TP Pre Heat - Temperature Max (T s(max) ) - Time (min to max) (t s ) 6 8 secs Average ramp up rate (Liquidus) Temp (T L ) to peak T S(max) to T L - Ramp-up Rate 5 /second max 5 /second max T L T S(max) T S(min) t S Preheat t L Ramp-down Reflow - Temperature (T L ) (Liquidus) 7 - Temperature (t L ) 6 5 seconds 5 time to peak temperature Time Peak Temperature (T P ) 6 +/-5 Time within 5 of actual peak Temperature (t p ) 4 seconds Ramp-down Rate 5 /second max Time 5 to peak Temperature (T P ) 8 minutes Max. Do not exceed 6 Package Dimensions Dual-In-Line Plastic Packages (PDIP) DEX AREA -- -A- BASE PLANE SEATG PLANE D B N N/ B D A D e e. (.5) M A B S NOTES:. ontrolling Dimensions: H. In case of conflict between English and. ontrolling Dimensions: H. in case of conflict between English and Metric dimensions, Metric the dimensions, inch dimensions the inch control. dimensions control.. Dimensioning. Dimensioning and tolerancing and tolerancing per ANSI per Y4.5M-98. ANSI Y4.5M-98.. Symbols. Symbols are defined are defined the MO in the Series MO Symbol Series List Symbol in Section List in. Section of Publication. of No. 95. Publication No. 95. 4. Dimensions 4. Dimensions A, A and A, A L are and measured L are measured with the package with the seated package in JE-DE seated seating JEplane gauge DE seating GS-. plane gauge GS-. 5. D, D, 5. D, and D, E and dimensions E dimensions do not include do not mold include flash mold or protrusions. flash or protrusions. Mold flash or protrusions Mold shall flash not or exceed protrusions. shall inch (.5mm). not exceed. inch (.5mm). 6. E and 6. E e A and are measured e A are measured with the leads with constrained the leads constrained to be perpendicular to be perpendicular e to datum --. 7. e B and are to measured datum -- at the. lead tips with the leads unconstrained. e must be zero or greater. 7. e B and e are measured at the lead tips with the leads unconstrained. 8. B maximum e must dimensions be zero or do greater. not include dambar protrusions. Dambar protrusions shall not exceed. inch (.5mm). 8. B maximum dimensions do not include dambar protrusions. Dambar 9. N is the protrusions maximum number shall not of exceed terminal. positions. inch (.5mm).. orner 9. N leads is the (, maximum N, N/ and number N/ + ) of for terminal E8., E6., positions. E8., E8., E4.6 will have a B dimension of. -.45 inch (.76 -.4mm).. orner leads (, N, N/ and N/ + ) for E8., E6., E8., E8., E4.6 will have a B dimension of. -.45 inch (.76 -.4mm). E -B- A L A E L e A e B Package PDIP Pins 6 Lead Dual-in-Line JEDE MS- Millimeters Inches Min Max Min Max Notes A - 5. -. 4 A.9 -.5-4 A.9 4.95.5.95 - B.56.558.4. - B.5.77.45.7 8,.4.55.8.4 - D 8.66 9.68.75.775 5 D. -.5-5 E 7.6 8.5..5 6 E 6. 7..4.8 5 e.54 BS. BS - e A 7.6 BS. BS 6 e B -.9 -.4 7 L.9.8.5.5 4 N 6 6 9 7 Littelfuse, Inc. Revised: //7
Package Dimensions Small Outline Plastic Packages (SOI) N DEX AREA e D B.5(.) M A. Symbols are defined in the MO Series Symbol List in Section. of Publication Number 95.. Dimensioning NOTES: and tolerancing per ANSI Y4.5M-98.. Dimension. Symbols D does are defined not include in the mold MO flash, Series protrusions Symbol or List gate in burrs. Section Mold. flash, of protrusion Publication and gate Number burrs shall 95. not exceed.5mm (.6 inch) per side. 4. Dimension. Dimensioning E does not and include tolerancing interlead per flash ANSI or Y4.5M-98. protrusions. Interlead flash and protrusions. Dimension shall not D exceed does not.5mm include (. mold inch) flash, per protrusions side. or gate burrs. 5. The chamfer Mold flash, on the protrusion body is optional. and gate If it burrs is not shall present, not exceed a visual index.5mm feature (.6 must be located inch) within per the side. crosshatched area. 6. L 4. is the Dimension length of E terminal does not for include soldering interlead to a substrate. flash or protrusions. Interlead 7. N is flash the number and protrusions of terminal shall positions. not exceed.5mm (. inch) per side. 8. Terminal 5. The numbers chamfer are on shown the body for reference is optional. only. If it is not present, a visual index feature must be located within the crosshatched area. 9. The lead width B, as measured.6mm (.4 inch) or greater above the seating plane, 6. L shall is not the exceed length a of maximum terminal for value soldering of.6mm to a (.4 substrate. inch).. ontrolling 7. N is dimension:millimeter. the number of terminal onverted positions. inch dimensions are not necessarily exact. 8. Terminal numbers are shown for reference only. 9. The lead width B, as measured.6mm (.4 inch) or greater above the seating plane, shall not exceed a maximum value of.6mm Part Numbering (.4 inch). System. ontrolling dimension:millimeter. onverted inch dimensions are not necessarily exact. TVS Diode Arrays (SPA Diodes) Series E SEATG PLANE M -B- -A- -- A B S A SP7 ** ** H.5(.) M B µ.(.4) L M h x 45 o P=Lead Free G=Green TG= Tape and Reel / Green Package AB = 6 Ld SOI AP = 6 Ld PDIP Package SOI Pins 6 JEDE MS- Millimeters Inches Min Max Min Max Notes A.5.75.5.688 - A..5.4.98 - B..5.. 9.9.5.75.98 - D 9.8..859.97 E.8 4..497.574 4 e.7 BS.5 BS - H 5.8 6..84.44 - h.5.5.99.96 5 L.4.7.6.5 6 N 6 6 7 µ º 8º º 8º - Product haracteristics Lead Plating Lead Material Lead oplanarity Substitute Material Body Material Matte Tin opper Alloy.4 inches (.mm) Silicon Molded Epoxy Flammability UL 94 V- See Ordering Information section for specific options available Ordering Information Part Number Temp. Range (º) Package Environmental Informaton Marking Min. Order SP7APP -4 to 5 6 Ld PDIP Lead-free SP7AP(P) 5 SP7ABG -4 to 5 6 Ld SOI Green SP7A(B)G 9 SP7ABTG -4 to 5 6 Ld SOI Tape and Reel. SP7AP(P) means device marking either SP7AP or SP7APP.. SP7A(B)G means device marking either SP7AG or SP7ABG which are good for types SP7ABG and SP7ABTG. Green SP7A(B)G 5 Disclaimer Notice - Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics. 7 Littelfuse, Inc. Revised: //7