Daashee V4.5, Jan 2004 CoolSET F2 ICE2A0565/165/265/365 ICE2B0565/165/265/365 ICE2A0565Z ICE2A180Z/280Z ICE2A765I/2B765I ICE2A765P2/ICE2B765P2 OffLine SMPS Curren Mode Conroller wih inegraed 650V/800V CoolMOS Power Managemen & Supply Never sop hinking.
Revision Hisory: 20040128 Daashee V4.5 Previous Version: Page Subjecs (major changes since las revision) For quesions on echnology, delivery and prices please conac he Infineon Technologies Offices in Germany or he Infineon Technologies Companies and Represenaives worldwide: see our webpage a hp:// www.infineon.com. CoolMOS, CoolSET are rademarks of Infineon Technologies AG. Ediion 20040128 Published by Infineon Technologies AG, S.MarinSrasse 53, D81541 München Infineon Technologies AG 1999. All Righs Reserved. Aenion please! The informaion herein is given o describe cerain componens and shall no be considered as warraned characerisics. Terms of delivery and righs o echnical change reserved. We hereby disclaim any and all warranies, including bu no limied o warranies of noninfringemen, regarding circuis, descripions and chars saed herein. Infineon Technologies is an approved CECC manufacurer. Informaion For furher informaion on echnology, delivery erms and condiions and prices please conac your neares Infineon Technologies Office in Germany or our Infineon Technologies Represenaives worldwide (see address lis). Warnings Due o echnical requiremens componens may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares Infineon Technologies Office. Infineon Technologies Componens may only be used in lifesuppor devices or sysems wih he express wrien approval of Infineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha lifesuppor device or sysem, or o affec he safey or effeciveness of ha device or sysem. Life suppor devices or sysems are inended o be implaned in he human body, or o suppor and/or mainain and susain and/or proec human life. If hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered.
OffLine SMPS Curren Mode Conroller wih inegraed 650V/800V Produc Highlighs Bes in class in DIP8, DIP7, TO220 packages No heasink required for DIP8, DIP7 Lowes sandby power dissipaion Enhanced proecion funcions all wih Auo Resar Mode Isolaed drain package for TO220 Increased creepage disance for TO220 packages PDIP71 PDIP71 PTO220646 PTO220646 PDIP86 PDIP84, 6 PTO220647 PTO220647 Feaures 650V/800V avalanche rugged CoolMOS Only few exernal componens required Inpu Vcc Undervolage Lockou Descripion The second generaion CoolSET F2 provides several special enhancemens o saisfy he needs for low power sandby and proecion feaures. In sandby mode 67kHz/100kHz swiching frequency frequency reducion is used o lower he power Max duy cycle 72% Low Power Sandby Mode o mee European Commission Requiremens Thermal Shu Down wih Auo Resar Overload and Open Loop Proecion Overvolage Proecion during Auo Resar Adjusable Peak Curren Limiaion via exernal resisor Overall olerance of Curren Limiing < ±5% consumpion and suppor a sable oupu volage in his mode. The frequency reducion is limied o 20kHz/21.5 khz o avoid audible noise. In case of failure modes like open loop, overvolage or overload due o shor circui he device swiches in Auo Resar Mode which is conrolled by he inernal proecion uni. By means of he inernal precise peak curren limiaion he dimension of he ransformer and he secondary diode can be lower which leads o more cos efficiency. Inernal Leading Edge Blanking User defined Sof Sar Sof Swiching for low EMI Typical Applicaion + 85... 270 VAC R Sarup Snubber Converer DC Oupu VCC C VCC Drain Low Power SandBy Power Managemen CoolMOS Feedback C Sof Sar SofS SofSar Conrol PWM Conroller Curren Mode Precise Low Tolerance Peak Curren Limiaion Isense FB PWMConroller Proecion Uni GND R Sense Feedback CoolSET F2 Daashee V4.5 3 Jan 2004
Ordering Codes Type Ordering Code Package V DS F OSC 1) R DSon 230VAC ±15% 2) 85265 VAC 2) ICE2A0565 Q67040S4542 PDIP86 650V 100kHz 4.7 23W 13W ICE2A165 Q67040S4426 PDIP86 650V 100kHz 3.0 31W 18W ICE2A265 Q67040S4414 PDIP86 650V 100kHz 0.9 52W 32W ICE2A365 Q67040S4415 PDIP86 650V 100kHz 0.45 67W 45W ICE2B0565 Q67040S4540 PDIP86 650V 67kHz 4.7 23W 13W ICE2B165 Q67040S4489 PDIP86 650V 67kHz 3.0 31W 18W ICE2B265 Q67040S4478 PDIP86 650V 67kHz 0.9 52W 32W ICE2B365 Q67040S4490 PDIP86 650V 67kHz 0.45 67W 45W ICE2A0565Z Q67040S4541 PDIP71 650V 100kHz 4.7 23W 13W ICE2A180Z Q67040S4546 PDIP71 800V 100kHz 3.0 29W 17W ICE2A280Z Q6704084547 PDIP71 800V 100KHz 0.8 50W 31W 1) yp @ T=25 C 2) Maximum power raing a Ta=75 C, Tj=125 C and wih copper area on PCB = 6cm² Type Ordering Code Package V DS F OSC 1) R DSon 230VAC ±15% 2) 85265 VAC 2) ICE2A765I Q67040S4609 PTO220646 650V 100kHz 0.45 240W 130W ICE2B765I Q67040S4607 PTO220646 650V 67kHz 0.45 240W 130W ICE2A765P2 Q67040S4610 PTO220647 650V 100kHz 0.45 240W 130W ICE2B765P2 Q67040S4608 PTO220647 650V 67kHz 0.45 240W 130W 1) yp @ T=25 C 2) Maximum pracical coninuous power in an open frame design a Ta=75 C, Tj=125 C and Rh=2.7K/W Daashee V4.5 4 Jan 2004
Table of Conens Page 1 Pin Configuraion and Funcionaliy.............................6 1.1 Pin Configuraion wih PDIP86..................................6 1.2 Pin Configuraion wih PDIP71..................................6 1.3 Pin Configuraion wih PTO220646/47............................7 1.4 Pin Funcionaliy..............................................7 2 Represenaive Blockdiagram..................................8 3 Funcional Descripion........................................9 3.1 Power Managemen............................................9 3.2 Improved Curren Mode.........................................9 3.2.1 PWMOP.................................................10 3.2.2 PWMComparaor..........................................10 3.3 SofSar...................................................11 3.4 Oscillaor and Frequency Reducion..............................12 3.4.1 Oscillaor.................................................12 3.4.2 Frequency Reducion........................................12 3.5 Curren Limiing..............................................12 3.5.1 Leading Edge Blanking......................................12 3.5.2 Propagaion Delay Compensaion..............................13 3.6 PWMLach.................................................13 3.7 Driver......................................................13 3.8 Proecion Uni (Auo Resar Mode)..............................14 3.8.1 Overload / Open Loop wih Normal Load........................14 3.8.2 Overvolage due o Open Loop wih No Load.....................15 3.8.3 Thermal Shu Down.........................................15 4 Elecrical Characerisics.....................................16 4.1 Absolue Maximum Raings.....................................16 4.2 Thermal Impedance (ICE2X765I and ICE2X765P2)..................18 4.3 Operaing Range.............................................18 4.4 Characerisics...............................................19 4.4.1 Supply Secion.............................................19 4.4.2 Inernal Volage Reference...................................20 4.4.3 Conrol Secion............................................20 4.4.4 Proecion Uni.............................................21 4.4.5 Curren Limiing............................................21 4.4.6 CoolMOS Secion.........................................22 5 Typical Performance Characerisics...........................24 6 Layou Recommendaion for C 18...............................30 7 Ouline Dimension...........................................31 Daashee V4.5 5 Jan 2004
1 Pin Configuraion and Funcionaliy Pin Configuraion and Funcionaliy 1.1 Pin Configuraion wih PDIP86 1.2 Pin Configuraion wih PDIP71 Pin Symbol Funcion 1 SofS SofSar 2 FB Feedback 3 Isense Conroller Curren Sense Inpu, CoolMOS Source Oupu 4 Drain 650V 1) /800V 2) CoolMOS Drain 5 Drain 650V 1) /800V 2) CoolMOS Drain 6 N.C No conneced 7 VCC Conroller Supply Volage 1) a T j = 110 C 2) 8 GND Conroller Ground a T j = 25 C Pin Symbol Funcion 1 SofS SofSar 2 FB Feedback 3 Isense Conroller Curren Sense Inpu, CoolMOS Source Oupu 4 N.C. No conneced 5 Drain 650V 1) /800V 2) CoolMOS Drain 1) 2) 7 VCC Conroller Supply Volage 8 GND Conroller Ground a T j = 110 C a T j = 25 C Package PDIP86 Package PDIP71 SofS 1 8 GND SofS 1 8 GND FB 2 7 VCC FB 2 7 VCC Isense 3 6 N.C Isense 3 Drain 4 5 Drain n.c. 4 5 Drain Figure 1 Pin Configuraion (op view) Figure 2 Pin Configuraion (op view) Daashee V4.5 6 Jan 2004
Pin Configuraion and Funcionaliy 1.3 Pin Conuraion wih PTO220646/47 1.4 Pin Funcionaliy Pin Symbol Funcion 1 Drain 650V 1) CoolMOS Drain 3 Isense 650V 1) CoolMOS Source 4 GND Conroller Ground 5 VCC Conroller Supply Volage 6 SofS SofSar 7 FB Feedback 1) a T j = 110 C Package PTO220646/47 SofS (Sof Sar & Auo Resar Conrol) This pin combines he funcion of Sof Sar in case of Sar Up and Auo Resar Mode and he conrolling of he Auo Resar Mode in case of an error deecion. FB (Feedback) The informaion abou he regulaion is provided by he FB Pin o he inernal Proecion Uni and o he inernal PWMComparaor o conrol he duy cycle. Isense (Curren Sense) The Curren Sense pin senses he volage developed on he series resisor insered in he source of he inegraed CoolMOS. When Isense reaches he inernal hreshold of he Curren Limi Comparaor, he Driver oupu is disabled. By his means he Over Curren Deecion is realized. Furhermore he curren informaion is provided for he PWMComparaor o realize he Curren Mode. Drain (Drain of inegraed CoolMOS ) Pin Drain is he connecion o he Drain of he inernal CoolMOS TM. 1 2 3 4 5 6 7 VCC (Power supply) This pin is he posiiv supply of he IC. The operaing range is beween 8.5V and 21V. To provide overvolage proecion he driver ges disabled when he volage becomes higher han 16.5V during Sar Up Phase. GND (Ground) This pin is he ground of he primary side of he SMPS. Drain Isense GND VCC SofS FB Figure 3 Pin Configuraion (op view) Daashee V4.5 7 Jan 2004
2 Represenaive Blockdiagram Represenaive Blockdiagram 85... 270 VAC SofS C SofSar FB T1 R Sarup VCC 16.5V C1 6.5V 4.0V C2 R SofSar 5.6V 6.5V 5.3V C4 R FB 4.8V C3 Thermal Shudown T j >140 C Proecion Uni CoolSET F2 GND G1 G2 G3 C Line C VCC Power Managemen Undervolage Lockou Inernal Bias 13.5V 8.5V PowerDown 6.5V Rese 5.3V Volage 4.8V Reference PowerUp 4.0V Rese Sof Sar SofSar Comparaor Spike S Q Blanking 5 s ErrorLach PWM Comparaor 0.3V C5 f osc f norm f sandby 0.8V U FB Sandby Uni PWM OP x3.65 Improved Curren Mode f norm f sandby Duy Cycle Max Oscillaor 0.72 Duy Cycle max Clock f sandby f norm PWMLach G4 CurrenLimi Comparaor V csh PropagaionDelay Compensaion Curren Limiing ICE2Axxxx ICE2Bxxxx 100kHz 67kHz 21.5kHz 20kHz Snubber Drain CoolMOS Gae Driver 10k Leading Edge Blanking 220ns D1 R Sense Isense Opocoupler Converer DC Oupu V OUT R Q S R Q Q + Figure 4 Represenaive Blockdiagram Daashee V4.5 8 Jan 2004
3 Funcional Descripion 3.1 Power Managemen Funcional Descripion 3.2 Improved Curren Mode Main Line (100V380V) SofSar Comparaor R SarUp Primary Winding C VCC VCC Power Managemen Undervolage Lockou Inernal Bias 13.5V 8.5V PowerDown Rese 6.5V 5.3V Volage 4.8V Reference PowerUp 4.0V Rese R Q PWMLach 6.5V S Q R SofSar SofS ErrorLach SofSar Comparaor C SofSar T1 ErrorDeecion FB 0.8V PWM Comparaor PWM OP x3.65 Improved Curren Mode PWMLach Figure 6 Curren Mode Curren Mode means ha he duy cycle is conrolled by he slope of he primary curren. This is done by comparison he FB signal wih he amplified curren sense signal. R S Q Q Isense Driver Amplified Curren Signal Figure 5 Power Managemen The Undervolage Lockou moniors he exernal supply volage V VCC. In case he IC is inacive he curren consumpion is max. 55µA. When he SMPS is plugged o he main line he curren hrough R Sarup charges he exernal Capacior C VCC. When V VCC exceeds he onhreshold V CCon =13.5V he inernal bias circui and he volage reference are swiched on. Afer ha he inernal bandgap generaes a reference volage V REF =6.5V o supply he inernal circuis. To avoid unconrolled ringing a swichon a hyseresis is implemened which means ha swichoff is only afer acive mode when Vcc falls below 8.5V. In case of swichon a Power Up Rese is done by reseing he inernal errorlach in he proecion uni. When V VCC falls below he offhreshold V CCoff =8.5V he inernal reference is swiched off and he Power Down rese le T1 discharging he sofsar capacior C SofSar a pin SofS. Thus i is ensured ha a every swichon he volage ramp a pin SofS sars a zero. FB 0.8V Driver T on Figure 7 Pulse Widh Modulaion In case he amplified curren sense signal exceeds he FB signal he onime T on of he driver is finished by reseing he PWMLach (see Figure 7). Daashee V4.5 9 Jan 2004
Funcional Descripion The primary curren is sensed by he exernal series resisor R Sense insered in he source of he inegraed CoolMOS. By means of Curren Mode he regulaion of he secondary volage is insensiive on line variaions. Line variaion causes variion of he increasing curren slope which conrols he duy cycle. The exernal R Sense allows an individual adjusmen of he maximum source curren of he inegraed CoolMOS. SofSar Comparaor PWM Comparaor FB O scillaor V OSC 0.3V C5 PWMLach Gae Driver V OSC Volage Ramp 0.8V FB 0.3V Gae Driver max. Duy Cycle T 2 R 1 C 1 0.8V 10k 20pF V 1 x3.65 PWM OP Figure 9 Ligh Load Condiions Volage Ramp Figure 8 Improved Curren Mode To improve he Curren Mode during ligh load condiions he amplified curren ramp of he PWMOP is superimposed on a volage ramp, which is buil by he swich T 2, he volage source V 1 and he 1s order low pass filer composed of R 1 and C 1 (see Figure 8, Figure 9). Every ime he oscillaor shus down for max. duy cycle limiaion he swich T2 is closed by V OSC. When he oscillaor riggers he Gae Driver T2 is opened so ha he volage ramp can sar. In case of ligh load he amplified curren ramp is o small o ensure a sable regulaion. In ha case he Volage Ramp is a well defined signal for he comparison wih he FBsignal. The duy cycle is hen conrolled by he slope of he Volage Ramp. By means of he Comparaor C5, he Gae Driver is swichedoff unil he volage ramp exceeds 0.3V. I allows he duy cycle o be reduced coninously ill 0% by decreasing V FB below ha hreshold. 3.2.1 PWMOP The inpu of he PWMOP is applied over he inernal leading edge blanking o he exernal sense resisor R Sense conneced o pin ISense. R Sense convers he source curren ino a sense volage. The sense volage is amplified wih a gain of 3.65 by PWM OP. The oupu of he PWMOP is conneced o he volage source V1. The volage ramp wih he superimposed amplified curren singal is fed ino he posiive inpus of he PWM Comparaor, C5 and he SofSarComparaor. 3.2.2 PWMComparaor The PWMComparaor compares he sensed curren signal of he inegraed CoolMOS TM wih he feedback signal V FB (see Figure 10). V FB is creaed by an exernal opocoupler or exernal ransisor in combinaion wih he inernal pullup resisor R FB and provides he load informaion of he feedback circuiry. When he amplified curren signal of he inegraed CoolMOS exceeds he signal V FB he PWM Comparaor swiches off he Gae Driver. Daashee V4.5 10 Jan 2004
R FB FB Opocoupler 6.5V SofSar Comparaor PWMLach PWM Comparaor 0.8V PWM OP Isense x3.65 Funcional Descripion pullup resisor R SofSar. The SofSarComparaor compares he volage a pin SofS a he negaive inpu wih he ramp signal of he PWMOP a he posiive inpu. When SofSar volage V SofS is less han Feedback volage V FB he SofSarComparaor limis he pulse widh by reseing he PWMLach (see Figure 11). In addiion o SarUp, SofSar is also acivaed a each resar aemp during Auo Resar. By means of he above menioned C SofSar he SofSar can be defined by he user. The SofSar is finished when V SofS exceeds 5.3V. A ha ime he Proecion Uni is acivaed by Comparaor C4 and senses he FB by Comparaor C3 weher he volage is below 4.8V which means ha he volage on he secondary side of he SMPS is seled. The inernal Zener Diode a SofS wih breakrough volage of 5.6V is o preven he inernal circui from sauraion (see Figure 12). 5.6V 6.5V PowerUp Rese Improved Curren Mode SofS R SofSar ErrorLach R Q Figure 10 PWM Conrolling 3.3 SofSar V SofS 6.5V 5.3V FB 4.8V R FB C4 C3 Clock G2 S R S Q Q Q PWMLach Gae Driver 5.6V 5.3V T SofSar Figure 12 Acivaion of Proecion Uni The SarUp ime T SarUp wihin he converer oupu volage V OUT is seled mus be shorer han he Sof Sar Phase T SofSar (see Figure 13). Gae Driver T C Sof Sar Sof Sar = R Sof Sar 1.69 By means of SofSar here is an effecive minimizaion of curren and volage sresses on he inegraed CoolMOS, he clamp circui and he oupu overshoo and prevens sauraion of he ransformer during SarUp. Figure 11 SofSar Phase The SofSar is realized by he inernal pullup resisor R SofSar and he exernal Capacior C SofSar (see Figure 2). The SofSar volage V SofS is generaed by charging he exernal capacior C SofSar by he inernal Daashee V4.5 11 Jan 2004
Funcional Descripion V SofS khz 100 5.3V f OSC 65 T SofSar 21.5 V FB 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 V 4.8V f norm f sandby ICE2Axxxx 100kHz 21.5kHz ICE2Bxxxx 67kHz 20kHz V FB Figure 14 Frequency Dependence V OUT Figure 13 V OUT T SarUp Sar Up Phase 3.4 Oscillaor and Frequency Reducion 3.4.1 Oscillaor The oscillaor generaes a frequency f swich = 67kHz/ 100kHz. A resisor, a capacior and a curren source and curren sink which deermine he frequency are inegraed. The charging and discharging curren of he implemened oscillaor capacior are inernally rimmed, in order o achieve a very accurae swiching frequency. The raio of conrolled charge o discharge curren is adjused o reach a max. duy cycle limiaion of D max =0.72. 3.4.2 Frequency Reducion The frequency of he oscillaor is depending on he volage a pin FB. The dependence is shown in Figure 14. This feaure allows a power supply o operae a lower frequency a ligh loads hus lowering he swiching losses while mainaining good cross regulaion performance and low oupu ripple. In case of low power he power consumpion of he whole SMPS can now be reduced very effecive. The minimal reachable frequency is limied o 20kHz/21.5 khz o avoid audible noise in any case. 3.5 Curren Limiing There is a cycle by cycle curren limiing realised by he CurrenLimi Comparaor o provide an overcurren deecion. The source curren of he inegraed CoolMOS TM is sensed via an exernal sense resisor R Sense. By means of R Sense he source curren is ransformed o a sense volage V Sense. When he volage V Sense exceeds he inernal hreshold volage V csh he CurrenLimiComparaor immediaely urns off he gae drive. To preven he Curren Limiing from disorions caused by leading edge spikes a Leading Edge Blanking is inegraed a he Curren Sense. Furhermore a Propagaion Delay Compensaion is added o suppor he immedeae shu down of he CoolMOS in case of overcurren. 3.5.1 Leading Edge Blanking V csh V Sense LEB = 220ns Figure 15 Leading Edge Blanking Each ime when CoolMOS is swiched on a leading spike is generaed due o he primaryside capaciances and secondaryside recifier reverse recovery ime. To avoid a premaure erminaion of he swiching pulse his spike is blanked ou wih a ime consan of LEB = 220ns. During ha ime he oupu of Daashee V4.5 12 Jan 2004
Funcional Descripion he CurrenLimi Comparaor canno swich off he gae drive. 3.5.2 Propagaion Delay Compensaion In case of overcurren deecion by I Limi he shu down of CoolMOS is delayed due o he propagaion delay of he circui. This delay causes an overshoo of he peak curren I peak which depends on he raio of di/d of he peak curren (see Figure 16).. I peak2 I peak1 I Limi I Sense Figure 16 Signal1 I Overshoo2 Curren Limiing Signal2 Propagaion Delay I Overshoo1 The overshoo of Signal2 is bigger han of Signal1 due o he seeper rising waveform. A propagaion delay compensaion is inegraed o bound he overshoo dependen on di/d of he rising primary curren. Tha means he propagaion delay ime beween exceeding he curren sense hreshold V csh and he swich off of CoolMOS is compensaed over emperaure wihin a range of a leas. di 0 R peak Sense d dv Sense d So curren limiing is now capable in a very accurae way (see Figure 18). The propagaion delay compensaion is done by means of a dynamic hreshold volage V csh (see Figure 17). In case of a seeper slope he swich off of he driver is earlier o compensae he delay. E.g. I peak = 0.5A wih R Sense = 2. Wihou propagaion delay compensaion he curren sense hreshold is se o a saic volage level V csh =1V. A curren ramp of di/d = 0.4A/µs, ha means dv Sense /d = 0.8V/µs, and a propagaion delay ime of i.e. Propagaion Delay =180ns leads hen o a I peak overshoo of 12%. By means of propagaion delay compensaion he overshoo is only abou 2% (see Figure 18). V Sense V 1.3 1.25 1.2 1.15 1.1 1.05 1 0.95 Figure 18 wih compensaion 0.9 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 Overcurren Shudown 3.6 PWMLach dv Sense d wihou compensaion V/us The oscillaor clock oupu applies a se pulse o he PWMLach when iniiaing CoolMOS conducion. Afer seing he PWMLach can be rese by he PWM OP, he SofSarComparaor, he CurrenLimi Comparaor, Comparaor C3 or he ErrorLach of he Proecion Uni. In case of reseing he driver is shu down immediaely. V OSC max. Duy Cycle 3.7 Driver V Sense V csh Signal1 off ime Propagaion Delay Signal2 The driversage drives he gae of he CoolMOS and is opimized o minimize EMI and o provide high circui efficiency. This is done by reducing he swich on slope when reaching he CoolMOS hreshold. This is achieved by a slope conrol of he rising edge a he driver s oupu (see Figure 19). Thus he leading swich on spike is minimized. When CoolMOS is swiched off, he falling shape of he driver is slowed down when reaching 2V o preven an overshoo below ground. Furhermore he driver circui is designed o eliminae cross conducion of he oupu sage. A volages below he undervolage lockou hreshold V VCCoff he gae drive is acive low. Figure 17 Dynamic Volage Threshold V csh Daashee V4.5 13 Jan 2004
Funcional Descripion V Gae ca. = 130ns FB Overload / Open Loop wih Normal Load 5µs Blanking 4.8V Failure Deecion 5V Figure 19 Gae Rising Slope SofS 5.3V SofSar Phase 3.8 Proecion Uni (Auo Resar Mode) An overload, open loop and overvolage deecion is inegraed wihin he Proecion Uni. These hree failure modes are lached by an ErrorLach. Addiional hermal shudown is lached by he ErrorLach. In case of hose failure modes he ErrorLach is se afer a blanking ime of 5µs and he CoolMOS is shu down. Tha blanking prevens he ErrorLach from disorions caused by spikes during operaion mode. Driver T Burs1 T Resar 3.8.1 Overload / Open Loop wih Normal Load Figure 20 shows he Auo Resar Mode in case of overload or open loop wih normal load. The deecion of open loop or overload is provided by he Comparaor C3, C4 and he ANDgae G2 (see Figure 21). The deecion is acivaed by C4 when he volage a pin SofS exceeds 5.3V. Till his ime he IC operaes in he SofSar Phase. Afer his phase he comparaor C3 can se he ErrorLach in case of open loop or overload which leads he feedback volage V FB o exceed he hreshold of 4.8V. Afer laching VCC decreases ill 8.5V and inacivaes he IC. A his ime he exernal SofSar capacior is discharged by he inernal ransisor T1 due o Power Down Rese. When he IC is inacive V VCC increases ill V CCon = 13.5V by charging he Capacior C VCC by means of he SarUp Resisor R SarUp. Then he ErrorLach is rese by Power Up Rese and he exernal SofSar capacior C SofSar is charged by he inernal pullup resisor R SofSar. During he SofSar Phase which ends when he volage a pin SofS exceeds 5.3V he deecion of overload and open loop by C3 and G2 is inacive. In his way he Sar Up Phase is no deeced as an overload. VCC 13.5V 8.5V Figure 20 Auo Resar Mode 6.5V Power Up Rese SofS C SofSar T1 FB R SofSar C4 5.3V 4.8V C3 G2 ErrorLach R FB 6.5V Figure 21 FBDeecion Daashee V4.5 14 Jan 2004
Funcional Descripion Bu he SofSar Phase mus be finished wihin he Sar Up Phase o force he volage a pin FB below he failure deecion hreshold of 4.8V. 3.8.2 Overvolage due o Open Loop wih No Load normal operaion mode is prevened from overvolage deecion due o varying of VCC concerning he regulaion of he converer oupu. When he volage V SofS is above 4.0V he overvolage deecion by C1 is deacivaed. VCC Open loop & no load condiion FB 4.8V 5µs Blanking 6.5V 16.5V C1 G1 Error Lach Failure Deecion SofS R SofSar 4.0V C2 SofS 5.3V SofSar Phase C SofSar T1 Power Up Rese 4.0V Overvolage Deecion Phase Driver T Burs2 T Resar Figure 23 Overvolage Deecion 3.8.3 Thermal Shu Down Thermal Shu Down is lached by he ErrorLach when juncion emperaure T j of he pwm conroller is exceeding an inernal hreshold of 140 C. In ha case he IC swiches in Auo Resar Mode. VCC 16.5V 13.5V Overvolage Deecion 8.5V Figure 22 Auo Resar Mode Figure 22 shows he Auo Resar Mode for open loop and no load condiion. In case of his failure mode he converer oupu volage increases and also VCC. An addiional proecion by he comparaors C1, C2 and he ANDgae G1 is implemened o consider his failure mode (see Figure 23).The overvolage deecion is provided by Comparaor C1 only in he firs ime during he SofSar Phase ill he SofSar volage exceeds he hreshold of he Comparaor C2 a 4.0V and he volage a pin FB is above 4.8V. When VCC exceeds 16.5V during he overvolage deecion phase C1 can se he ErrorLach and he Burs Phase during Auo Resar Mode is finished earlier. In ha case T Burs2 is shorer han T SofSar. By means of C2 he Noe: All he values which are menioned in he funcional descripion are ypical. Please refer o Elecrical Characerisics for min/max limi values. Daashee V4.5 15 Jan 2004
4 Elecrical Characerisics Elecrical Characerisics 4.1 Absolue Maximum Raings Noe: Absolue maximum raings are defined as raings, which when being exceeded may lead o desrucion of he inegraed circui. For he same reason make sure, ha any capacior ha will be conneced o pin 6 (VCC) is discharged before assembling he applicaion circui. Parameer Symbol Limi Values Uni Remarks Drain Source Volage ICE2A0565/165/265/365/765I/765P2 ICE2B0565/165/265/365/765I/765P2 ICE2A0565Z Drain Source Volage ICE2A180Z/280Z Avalanche energy, repeiive AR limied by max. T j =150 C 1) min. max. V DS 650 V Tj = 110 C V DS 800 V Tj = 25 C ICE2A0565 E AR1 0.01 mj ICE2A165 E AR2 0.07 mj ICE2A265 E AR3 0.40 mj ICE2A365 E AR4 0.50 mj ICE2B0565 E AR5 0.01 mj ICE2B165 E AR6 0.07 mj ICE2B265 E AR7 0.40 mj ICE2B365 E AR8 0.50 mj ICE2A0565Z E AR9 0.01 mj ICE2A180Z E AR10 0.07 mj ICE2A280Z E AR11 0.40 mj ICE2A765I E AR12 0.50 mj ICE2B765I E AR13 0.50 mj ICE2A765P2 E AR14 0.50 mj ICE2B765P2 E AR15 0.50 mj 1) Repeiive avalanche causes addiional power losses ha can be calculaed as P AV =E AR * f Daashee V4.5 16 Jan 2004
Elecrical Characerisics Parameer Symbol Limi Values Uni Remarks Avalanche curren, repeiive AR limied by max. T j =150 C min. max. ICE2A0565 I AR1 0.5 A ICE2A165 I AR2 1 A ICE2A265 I AR3 2 A ICE2A365 I AR4 3 A ICE2B0565 I AR5 0.5 A ICE2B165 I AR6 1 A ICE2B265 I AR7 2 A ICE2B365 I AR8 3 A ICE2A0565Z I AR9 0.5 A ICE2A180Z I AR10 1 A ICE2A280Z I AR11 2 A ICE2A765I I AR12 7 A ICE2B765I I AR13 7 A ICE2A765P2 I AR14 7 A ICE2B765P2 I AR15 7 A V CC Supply Volage V CC 0.3 22 V FB Volage V FB 0.3 6.5 V SofS Volage V SofS 0.3 6.5 V I Sense I Sense 0.3 3 V Juncion Temperaure T j 40 150 C Conroller & CoolMOS Sorage Temperaure T S 50 150 C Thermal Resisance JuncionAmbien ESD Robusness 1) R hja1 90 K/W PDIP86 R hja2 96 K/W PDIP71 V ESD 2 2) kv Human Body Model 1) Equivalen o discharging a 100pF capacior hrough a 1.5 k series resisor 2) 1kV a pin drain of ICE2x0565, ICE2A0565Z Daashee V4.5 17 Jan 2004
Elecrical Characerisics 4.2 Thermal Impedance (ICE2X765I and ICE2X765P2) Parameer Symbol Limi Values Uni Remarks Thermal Resisance JuncionAmbien JuncionCase ICE2A765I ICE2B765I ICE2A765P2 ICE2B765P2 ICE2A765I ICE2B765I ICE2A765P2 ICE2B765P2 min. max. R hja3 74 K/W Free sanding wih no heasink R hjc 2.5 K/W 4.3 Operaing Range Noe: Wihin he operaing range he IC operaes as described in he funcional descripion. Parameer Symbol Limi Values Uni Remarks min. max. V CC Supply Volage V CC V CCoff 21 V Juncion Temperaure of Conroller Juncion Temperaure of CoolMOS T JCon 25 130 C Limied due o hermal shu down of conroller T JCoolMOS 25 150 C Daashee V4.5 18 Jan 2004
4.4 Characerisics Noe: Elecrical Characerisics The elecrical characerisics involve he spread of values given wihin he specified supply volage and juncion emperaure range T J from 25 C o 125 C.Typical values represen he median values, which are relaed o 25 C. If no oherwise saed, a supply volage of V CC = 15 V is assumed. 4.4.1 Supply Secion Parameer Symbol Limi Values Uni Tes Condiion min. yp. max. Sar Up Curren I VCC1 27 55 µa V CC =V CCon 0.1V Supply Curren wih Inacive Gae Supply Curren wih Acive Gae Supply Curren wih Aciv Gae VCC TurnOn Threshold VCC TurnOff Threshold VCC TurnOn/Off Hyseresis I VCC2 5.0 6.6 ma V SofS = 0 I FB = 0 ICE2A0565 I VCC3 5.3 6.7 ma V SofS = 5V I FB = 0 ICE2A165 I VCC4 6.5 7.8 ma V SofS = 5V I FB = 0 ICE2A265 I VCC5 6.7 8.0 ma V SofS = 5V I FB = 0 ICE2A365 I VCC6 8.5 9.8 ma V SofS = 5V I FB = 0 ICE2B0565 I VCC7 5.2 6.7 ma V SofS = 5V I FB = 0 ICE2B165 I VCC8 5.5 7.0 ma V SofS = 5V I FB = 0 ICE2B265 I VCC9 6.1 7.3 ma V SofS = 5V I FB = 0 ICE2B365 I VCC10 7.1 8.3 ma V SofS = 5V I FB = 0 ICE2A0565Z I VCC11 5.3 6.7 ma V SofS = 5V I FB = 0 ICE2A180Z I VCC12 6.5 7.8 ma V SofS = 5V I FB = 0 ICE2A280Z I VCC13 7.7 9.0 ma V SofS = 5V I FB = 0 ICE2A765I I VCC14 8.5 9.8 ma V SofS = 5V I FB = 0 ICE2B765I I VCC15 7.1 8.3 ma V SofS = 5V I FB = 0 ICE2A765P2 I VCC16 8.5 9.8 ma V SofS = 5V I FB = 0 ICE2B765P2 I VCC17 7.1 8.3 ma V SofS = 5V I FB = 0 VCCon VCCoff VCCHY 13 4.5 13.5 8.5 5 14 5.5 V V V Daashee V4.5 19 Jan 2004
Elecrical Characerisics 4.4.2 Inernal Volage Reference Parameer Symbol Limi Values Uni Tes Condiion min. yp. max. Trimmed Reference Volage V REF 6.37 6.50 6.63 V measured a pin FB 4.4.3 Conrol Secion Parameer Symbol Limi Values Uni Tes Condiion Oscillaor Frequency ICE2A0565/165/265/365/765I/765P2 ICE2A0565Z/180Z/280Z Oscillaor Frequency ICE2B0565/165/265/365/765I/765P2 Reduced Osc. Frequency ICE2A0565/165/265/365/765I/765P2 ICE2A0565Z/180Z/280Z Reduced Osc. Frequency ICE2B0565/165/265/365/765I/765P2 Frequency Raio f osc1 /f osc2 ICE2A0565/165/265/365/765I/765P2 ICE2A0565Z/180Z/280Z Frequency Raio f osc3 /f osc4 ICE2B0565/165/265/365/765I/765P2 min. yp. max. f OSC1 93 100 107 khz V FB = 4V f OSC3 62 67 72 khz V FB = 4V f OSC2 21.5 khz V FB = 1V f OSC4 20 khz V FB = 1V 4.5 4.65 4.9 3.18 3.35 3.53 Max Duy Cycle D max 0.67 0.72 0.77 Min Duy Cycle D min 0 V FB < 0.3V PWMOP Gain A V 3.45 3.65 3.85 V FB Operaing Range Min Level V FBmin 0.3 V V FB Operaing Range Max level V FBmax 4.6 V Feedback Resisance R FB 3.0 3.7 4.9 k SofSar Resisance R SofSar 42 50 62 k Daashee V4.5 20 Jan 2004
Elecrical Characerisics 4.4.4 Proecion Uni Parameer Symbol Limi Values Uni Tes Condiion Over Load & Open Loop Deecion Limi Acivaion Limi of Overload & Open Loop Deecion Deacivaion Limi of Overvolage Deecion min. yp. max. V FB2 4.65 4.8 4.95 V V SofS > 5.5V V SofS1 5.15 5.3 5.46 V V FB > 5V V SofS2 3.88 4.0 4.12 V V FB > 5V V CC > 17.5V Overvolage Deecion Limi V VCC1 16 16.5 17.2 V V SofS < 3.8V V FB > 5V Lached Thermal Shudown T jsd 130 140 150 C 1) Spike Blanking Spike 5 µs 1) The parameer is no subjec o producion es varified by design/characerizaion 4.4.5 Curren Limiing Parameer Symbol Limi Values Uni Tes Condiion Peak Curren Limiaion (incl. Propagaion Delay Time) min. yp. max. V csh 0.95 1.0 1.05 V dv sense / d = 0.6V/µs Leading Edge Blanking LEB 220 ns Daashee V4.5 21 Jan 2004
Elecrical Characerisics 4.4.6 CoolMOS Secion Parameer Symbol Limi Values Uni Tes Condiion Drain Source Breakdown Volage ICE2A0565/165/265/365/765I/765P2 ICE2B0565/165/265/365/765I/765P2 ICE2A0565Z Drain Source Breakdown Volage ICE2A180Z/280Z Drain Source OnResisance V (BR)DSS 600 650 V (BR)DSS 800 870 ICE2A0565 R DSon1 ICE2A165 R DSon2 ICE2A265 R DSon3 ICE2A365 R DSon4 ICE2B0565 R DSon5 ICE2B165 R DSon6 ICE2B265 R DSon7 ICE2B365 R DSon8 ICE2A0565Z R DSon9 ICE2A180Z R DSon10 ICE2A280Z R DSon11 ICE2A765I R DSon12 ICE2B765I R DSon13 ICE2A765P2 R DSon14 ICE2B765P2 R DSon15 min. yp. max. 4.7 10.0 3 6.6 0.9 1.9 0.45 0.95 4.7 10.0 3 6.6 0.9 1.9 0.45 0.95 4.7 10.0 3 6.6 0.8 1.7 0.45 0.95 0.45 0.95 0.45 0.95 0.45 0.95 5.5 12.5 3.3 7.3 1.08 2.28 0.54 1.14 5.5 12.5 3.3 7.3 1.08 2.28 0.54 1.14 5.5 12.5 3.3 7.3 1.06 2.04 0.54 1.14 0.54 1.14 0.54 1.14 0.54 1.14 V V V V T j =25 C T j =110 C T j =25 C T j =110 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C T j =25 C T j =125 C Daashee V4.5 22 Jan 2004
Elecrical Characerisics Parameer Symbol Limi Values Uni Tes Condiion Effecive oupu capaciance, energy relaed min. yp. max. ICE2A0565 C o(er)1 4.751 pf V DS =0V o 480V ICE2A165 C o(er)2 7 pf V DS =0V o 480V ICE2A265 C o(er)3 21 pf V DS =0V o 480V ICE2A365 C o(er)4 30 pf V DS =0V o 480V ICE2B0565 C o(er)5 4.751 pf V DS =0V o 480V ICE2B165 C o(er)6 7 pf V DS =0V o 480V ICE2B265 C o(er)7 21 pf V DS =0V o 480V ICE2B365 C o(er)8 30 pf V DS =0V o 480V ICE2A0565Z C o(er)9 4.751 pf V DS =0V o 480V ICE2A180Z C o(er)10 7 pf V DS =0V o 480V ICE2A280Z C o(er)11 22 pf V DS =0V o 480V ICE2A765I C o(er)12 30 pf V DS =0V o 480V ICE2B765I C o(er)13 30 pf V DS =0V o 480V ICE2A765P2 C o(er)14 30 pf V DS =0V o 480V ICE2B765P2 C o(er)15 30 pf V DS =0V o 480V Zero Gae Volage Drain Curren I DSS 0.5 µa V VCC =0V Rise Time rise 30 1) ns Fall Time fall 30 1) ns 1) Measured in a Typical Flyback Converer Applicaion Daashee V4.5 23 Jan 2004
5 Typical Performance Characerisics Typical Performance Characerisics Sar Up Curren I VCC1 [µa] 40 38 36 34 32 30 28 26 24 22 Figure 24 Sar Up Curren I VCC1 vs. T j PI001190101 Supply Curren I VCCi [ma] 7,1 ICE2B365 6,9 6,7 6,5 6,3 ICE2B265 6,1 5,9 5,7 ICE2B165 5,5 5,3 5,1 ICE2B0565 4,9 4,7 4,5 Figure 27 Supply Curren I VCCI vs. T j PI002190101 Supply Curren I VCC2 [ma] 5,9 5,7 5,5 5,3 5,1 4,9 4,7 4,5 Figure 25 Saic Supply Curren I VCC2 vs. T j PI003190101 Supply Curren I VCCi [ma] 8,5 8,3 8,1 7,9 7,7 ICE2A280Z 7,5 7,3 7,1 6,9 6,7 6,5 ICE2A180Z 6,3 6,1 5,9 5,7 5,5 Figure 28 Supply Curren I VCCI vs. T j PI002190101 Supply Curren I VCCi [ma] 8,8 ICE2A365 8,4 8,0 7,6 7,2 6,8 ICE2A265 6,4 ICE2A165 6,0 5,6 5,2 ICE2A0565 /Z 4,8 4,4 4,0 Figure 26 Supply Curren I VCCI vs. T j PI002190101 Supply Curren I VCCi [ma] 9,0 8,8 8,6 8,4 ICE2A765P2 8,2 8,0 7,8 7,6 7,4 7,2 ICE2B765P2 7,0 6,8 6,6 6,4 6,2 Figure 29 Supply Curren I VCCI vs. T j PI002190101 Daashee V4.5 24 Jan 2004
Typical Performance Characerisics VCC TurnOn Threshold V CCon [V] 13,58 13,56 13,54 13,52 13,50 13,48 13,46 13,44 13,42 Figure 30 VCC TurnOn Threshold V VCCon vs. T j PI004190101 Trimmed Reference Volage V REF [V] 6,510 6,505 6,500 6,495 6,490 6,485 6,480 6,475 6,470 Figure 33 Trimmed Reference V REF vs. T j PI007190101 VCC TurnOff Threshold V VCCoff [V] 8,67 8,64 8,61 8,58 8,55 8,52 8,49 8,46 8,43 8,40 Figure 31 VCC TurnOff Threshold V VCCoff vs. T j PI005190101 Oscillaor Frequency f OSC1 [khz] 102,0 101,5 101,0 100,5 ICE2A0565 /Z 100,0 ICE2A165 ICE2A265 99,5 ICE2A365 ICE2A180Z ICE2A280Z 99,0 ICE2A765P2 98,5 98,0 97,5 97,0 Figure 34 Oscillaor Frequency f OSC1 vs. T j PI008190101 VCC TurnOn/Off Hyseresis V CCHY [V] 5,10 5,07 5,04 5,01 4,98 4,95 4,92 4,89 4,86 4,83 Figure 32 VCC TurnOn/Off HyseresisV VCCHY vs. T j PI006190101 Oscillaor Frequency f OSC3 [khz] 70,0 69,5 69,0 68,5 68,0 67,5 67,0 ICE2B0565 ICE2B165 66,5 ICE2B265 ICE2B365 66,0 ICE2B765P2 65,5 65,0 64,5 64,0 Figure 35 Oscillaor Frequency f OSC3 vs. T j PI008a190101 Daashee V4.5 25 Jan 2004
Typical Performance Characerisics Reduced Osc. Frequency f OSC2 [khz] 22,0 21,8 21,6 ICE2A0565/Z ICE2A165 21,4 ICE2A265 ICE2A365 21,2 ICE2A180Z ICE2A280Z ICE2A765P2 21,0 20,8 20,6 20,4 20,2 20,0 Figure 36 Reduced Osc. Frequency f OSC2 vs. T j PI009190101 Frequency Raio f OSC3 /f OSC4 3,45 3,43 3,41 3,39 ICE2B0565 3,37 ICE2B165 ICE2B265 3,35 ICE2B365 ICE2B765P2 3,33 3,31 3,29 3,27 3,25 Figure 39 Frequency Raio f OSC3 / f OSC4 vs. T j PI010a190101 Reduced Osc. Frequency f OSC4 [khz] 21,0 20,8 20,6 ICE2B0565 ICE2B165 20,4 ICE2B265 ICE2B365 20,2 ICE2B765P2 20,0 19,8 19,6 19,4 19,2 19,0 Figure 37 Reduced Osc. Frequency f OSC4 vs. T j PI009a190101 Max. Duy Cycle 0,730 0,728 0,726 0,724 0,722 0,720 0,718 0,716 0,714 0,712 0,710 Figure 40 Max. Duy Cycle vs. T j PI011190101 4,75 4,73 3,70 3,69 Frequency Raio f OSC1 /f OSC2 4,71 4,69 4,67 4,65 4,63 4,61 4,59 4,57 ICE2A0565 /Z ICE2A165 ICE2A265 ICE2A365 ICE2A180Z ICE2A280Z ICE2A765P2 PI010190101 PWMOP Gain A V 3,68 3,67 3,66 3,65 3,64 3,63 3,62 3,61 PI012190101 4,55 Figure 38 Frequency Raio f OSC1 / f OSC2 vs. T j 3,60 Figure 41 PWMOP Gain A V vs. T j Daashee V4.5 26 Jan 2004
Typical Performance Characerisics Feedback Resisance R FB [kohm] 4,00 3,95 3,90 3,85 3,80 3,75 3,70 3,65 3,60 3,55 3,50 Figure 42 Feedback Resisance R FB vs. T j PI013190101 Deecion Limi V SofSar1 [V] 5,320 5,315 5,310 5,305 5,300 5,295 5,290 5,285 5,280 5,275 5,270 Figure 45 Deecion Limi V SofSar1 vs. T j PI016190101 SofSar Resisance R SofSar [kohm] 58 56 54 52 50 48 46 44 42 40 Figure 43 SofSar Resisance R SofSar vs. T j PI014190101 Deecion Limi V SofSar2 [V] 4,05 4,04 4,03 4,02 4,01 4,00 3,99 3,98 3,97 3,96 3,95 Figure 46 Deecion Limi V SofSar2 vs. T j PI017190101 Deecion Limi V FB2 [V] 4,810 4,805 4,800 4,795 4,790 4,785 4,780 Figure 44 Deecion Limi V FB2 vs. T j PI015190101 Overvolage Deecion Limi V VCC1 [V] 16,80 16,75 16,70 16,65 16,60 16,55 16,50 16,45 16,40 16,35 16,30 16,25 16,20 Figure 47 Overvolage Deecion Limi V VCC1 vs. T j PI018190101 Daashee V4.5 27 Jan 2004
Typical Performance Characerisics Peak Curren Limiaion V csh [V] 1,010 1,008 1,006 1,004 1,002 1,000 0,998 0,996 0,994 0,992 0,990 Figure 48 Peak Curren Limiaion V csh vs. T j PI019190101 OnResisance R dson [Ohm] 2,2 2,0 1,8 1,6 1,4 ICE2A265 1,2 ICE2B265 1,0 ICE2A280Z 0,8 0,6 0,4 Figure 51 Drain Source OnResisance R DSon vs. T j PI022190101 Leading Edge Blanking LEB [ns] 280 270 260 250 240 230 220 210 200 190 180 Figure 49 Leading Edge Blanking V VCC1 vs. T j PI020190101 OnResisance R dson [Ohm] 9,5 8,5 7,5 6,5 ICE2A0565 /Z ICE2B0565 5,5 4,5 ICE2A165 3,5 ICE2B165 ICE2A180Z 2,5 1,5 Figure 52 Drain Source OnResisance R DSon vs. T j PI022190101 1,0 1,0 0,9 0,9 OnResisance R dson [Ohm] 0,8 0,7 0,6 0,5 0,4 0,3 ICE2A365 ICE2B365 PI022190101 OnResisance R dson [Ohm] 0,8 0,7 0,6 0,5 0,4 0,3 ICE2A765P2 ICE2B765P2 PI022190101 0,2 Figure 50 Drain Source OnResisance R DSon vs. T j 0,2 Figure 53 Drain Source OnResisance R DSon vs. T j Daashee V4.5 28 Jan 2004
Typical Performance Characerisics 720 Breakdown Volage V (BR)DSS [V] 700 680 660 640 620 600 580 ICE2A0565 /Z ICE2A165 ICE2A265 ICE2A365 ICE2B0565 ICE2B165 ICE2B265 ICE2B365 ICE2A765P2 ICE2B765P2 PI025190101 560 Figure 54 Breakdown Volage V BR(DSS) vs. T j 940 Breakdown Volage V (BR)DSS [V] 920 900 880 860 840 820 800 ICE2A180Z ICE2A280Z PI025190101 780 Figure 55 Breakdown Volage V BR(DSS) vs. T j Daashee V4.5 29 Jan 2004
Layou Recommendaion for C 18 6 Layou Recommendaion for C 18 Noe: Only for ICE2A765I/P2 and ICE2B765I/P2 Sof Sar Capacior Layou Recommendaion in Deail Deail X Figure 56B Deail X, Sof Sar Capacior C18 Layou Recommendaion Place Sof Sar capacior C 18 in he same way as shown in Deail X (blue mark). Figure 56A Layou of Board EVALSF2_ICE2B765P2 To improve he sarup behavior of he IC during sarup or auo resar mode, place he sof sar capacior C 18 (red secion Deail X in Figure 56A) as close as possible o he sof sar PIN 6 and GND PIN 4. More deails see Deail X in Figure 56B. Figure 56 Layou Recommendaion for ICE2A765I/P2 and ICE2B765I/P2 Daashee V4.5 30 Jan 2004
7 Ouline Dimension Ouline Dimension PDIP86 (Plasic Dual Inline Package) Figure 57 PDIP86 (Plasic Dual Inline Package) PDIP71 (Plasic Dual Inline Package) 1.7 MAX. 0.38 MIN. 4.37 MAX. 7.87 ±0.38 0.46 ±0.1 2.54 0.35 7x 3.25 MIN. 8.9 ±1 +0.1 0.25 6.35 ±0.25 1) 7 5 1 4 9.52 ±0.25 1) Index Marking 1) Does no include plasic or meal prorusion of 0.25 max. per side Figure 58 PDIP71 (Plasic Dual Inline Package) Dimensions in mm Daashee V4.5 31 Jan 2004
Ouline Dimension PTO220646 Isodrain Package 9.9 7.5 6.6 (0.8) A +0.1 1.3 0.02 B 4.4 12.1 ±0.3 10.2 ±0.3 8 0.05 1) 9.2 ±0.2 8.6 ±0.3 0...0.15 4 x 1.27 7.62 6 x 0.6 ±0.1 0.25 M A B 2.4 5.3 ±0.3 8.4 ±0.3 0.5 ±0.1 1) Shear and punch direcion no burrs his surface Back side, heasink conour All meal surfaces in plaed, excep area of cu. Figure 59 PTO220646 (Isodrain Package) PTO220647 Isodrain Package 9.9 ±0.2 9.5 ±0.2 7.5 6.6 2.8 ±0.2 A 4.4 +0.1 1.3 0.02 B 17.5 ±0.3 15.6 ±0.3 13 0.15 3.7 0.05 1) 9.2 ±0.2 8.6 ±0.3 0...0.15 7.62 0.25 M A B 2.4 0.5 ±0.1 4 x 1.27 6 x 0.6 ±0.1 5.3 ±0.3 8.4 ±0.3 Figure 60 PTO220647 (Isodrain Package) 1) Shear and punch direcion no burrs his surface Back side, heasink conour All meal surfaces in plaed, excep area of cu. Dimensions in mm Daashee V4.5 32 Jan 2004
Toal Qualiy Managemen Qualiä ha für uns eine umfassende Bedeuung. Wir wollen allen Ihren Ansprüchen in der besmöglichen Weise gerech werden. Es geh uns also nich nur um die Produkqualiä unsere Ansrengungen gelen gleichermaßen der Lieferqualiä und Logisik, dem Service und Suppor sowie allen sonsigen Beraungs und Bereuungsleisungen. Dazu gehör eine besimme Geiseshalung unserer Miarbeier. Toal Qualiy im Denken und Handeln gegenüber Kollegen, Lieferanen und Ihnen, unserem Kunden. Unsere Leilinie is jede Aufgabe mi Null Fehlern zu lösen in offener Sichweise auch über den eigenen Arbeisplaz hinaus und uns sändig zu verbessern. Unernehmenswei orienieren wir uns dabei auch an op (Time Opimized Processes), um Ihnen durch größere Schnelligkei den enscheidenden Webewerbsvorsprung zu verschaffen. Geben Sie uns die Chance, hohe Leisung durch umfassende Qualiä zu beweisen. Wir werden Sie überzeugen. Qualiy akes on an allencompassing significance a Semiconducor Group. For us i means living up o each and every one of your demands in he bes possible way. So we are no only concerned wih produc qualiy. We direc our effors equally a qualiy of supply and logisics, service and suppor, as well as all he oher ways in which we advise and aend o you. Par of his is he very special aiude of our saff. Toal Qualiy in hough and deed, owards coworkers, suppliers and you, our cusomer. Our guideline is do everyhing wih zero defecs, in an open manner ha is demonsraed beyond your immediae workplace, and o consanly improve. Throughou he corporaion we also hink in erms of Time Opimized Processes (op), greaer speed on our par o give you ha decisive compeiive edge. Give us he chance o prove he bes of performance hrough he bes of qualiy you will be convinced. hp://www.infineon.com Published by Infineon Technologies AG
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