Multilevel Inverter For Solar Power Applications

Transcription

1 2017 IJDR Volue 5, Issue 1 ISSN: Multilevel Inverter For Solar Power Applications 1 L.Pattathurani, 2 Rajat Kuar Dwibedi, 3 Dr.S.S.Dash 1 (Assistant Professor, Departent of lectrical and lectronics nineerin, Jeppiaar Institute of Technoloy ) 2 (Assistant Professor, Departent of lectronics and ounication nineerin, Jeppiaar SRR nineerin ollee) 3 (Professor, Departent of lectrical and lectronics nineerin, SRM University ) Abstract- Multilevel voltae source inverters offer several advantaes copared to their conventional counterparts. Synthesizin the A output terinal voltae fro several levels of voltaes, staircase wavefors can be produced, which approach the sinusoidal wavefor with low haronic distortion, thus reducin the filter requireents. By increasin the level of the inverter we can et several advantaes: et a ood voltae wave for, Very low THD, reduced volue and cost. The need of several sources on the D side of the converter akes ultilevel technoloy attractive for photovoltaic applications. This paper provides an overview of a ultilevel inverter topoloy and investiates their suitability for sinlephase photovoltaic systes. A siulation odel is based on MATLAB/SIMULINK is developed. An experiental 40W prototype inverter is built and tested. The results experientally validate the proposed PWM based three H-bride 27 level cascaded ultilevel inverter. Index Ters ascaded H-bride ultilevel inverter, Dc link voltae, Total Haronic distortion, Metal Oxide Seiconductor Field ffect Transistor, Insulated Gate Bipolar Transistor, Flexible A Transission Syste. I. INTRODUTI Multilevel converter technoloy is based on the synthesis of the A voltae fro several different voltae levels on the D bus. As the nuber of voltae levels on the D side increases, the synthesized output wavefor adds ore steps, producin a staircase wave which approaches the sinusoidal wave with iniu haronic distortion [9]. Multilevel converters are particularly interestin for hih power applications such as FATS since the need of filters is reduced and the efficiency is hih because all devices switch at fundaental frequency [ 10], [ 11]. In low power applications where switchin frequencies are not as restricted as in hih power applications various control ethods such as ulticarrier pulse width odulation or ultiple hysteresis band control ethods can be used to further reduce haronics in the stepped wavefors [12], [ 13]. Multilevel converter topoloies are especially suitable for PV applications since due to the odular structure of PV arrays different D voltae levels can easily be provided. A ultilevel converter not only achieves low power ratins, but also enables the use of renewable enery sources. Renewable enery sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a ultilevel converter syste for a hih power application. Fiure1: Advantaes of 27-level ultilevel H-brides inverter Moreover the stae with hiher D link voltae has less switchin frequency and therefore reduced switchin losses. They also allow cobinin different types of switches to optiize the inverter efficiency.the new hybrid ultilevel inverter consists of full bride odules which have the relationship of 1v, 3v, 9v..3s-1v for dc link Voltae.The output wavefor has 27 levels, ± 13, ± 12, ±11, ±10, ± 9, ±8, ±7, ±6, ± 5, ±4, ±3, ± 2, ±1,0. Inverter enerates 3 s different voltae levels (e..an inverter with s=3 cells can enerate 3 3 =27 different voltae level).the basic hybrid ultilevel inverter structure for sinle phase is illustrated in Fi 1.This ultilevel inverter is ade up of a set of series connected cells. ach cell consists of a 4-switch H-bride voltae source inverter. The output inverter voltae is obtained by suin the cell contributions. IJDR International Journal of nineerin Developent and Research ( 684

2 2017 IJDR Volue 5, Issue 1 ISSN: In conventional ethod, low level inverter is used. Better sinusoidal output was not obtained which is the drawback of the conventional syste and the haronics was hih. So increase the levels of the inverter to et hih resolution, hence the output wave for is ostly sinusoidal wave for. The coon function of ultilevel inverter is to synthesize a desired voltae fro several separate D sources [10]. ach source is connected to a sinle phase full bride inverter. ach inverter is capable of eneratin three different output voltaes, +Vdc, 0 and - Vdc. II. MODLING OF MULTILVL NW HYBRID INVRTR For each full bride inverter the output voltae is iven by And the input dc current is Idci =Ia(S1i-S2i) V0i = Vdc (S1i-S2i) i =1,2,3 (nuber of full bride inverters eployed). I a is the output current of the new hybrid inverter. S 1i and S 2i is the upper switch of each full bride inverter. Now the output voltae of each phase of the ultilevel new hybrid inverter is iven by III. PROPOSD THR H-BRIDG 27- LVL MULTILVL INVRTR The topoloy of the proposed Dc Ac H-bride ultilevel inverter is shown in Fiure.3. The inverter uses a standard threele and an H-bride with its dc source in series with each phase le. Fiure 2: Sinle phase proposed dc ac three H-bride 27 levels ulti level inverter. In this proposed ethod of the inverter, has three input staes, all the three staes are a like in the construction odule. All the odules are connected as new hybrid with each odule havin power switches. The power switches ay be IGBT, MOSFT or any other power devices. The MOSFT s are used in this syste. The power switches are operated in switchin ode such that any two switches are in operatin conditions at a tie and other two reain in open condition. The switchin is as S11=S13and S12= S14 this ethod is adopted to protect the circuit fro short circuitin. The nuber of levels is increased by connectin axiu nuber of odules. IV. NW HYBRID INVRTR SWITHING V. SWITHING STAT FOR 180º MOD OF OPRATI IJDR International Journal of nineerin Developent and Research ( 685

3 2017 IJDR Volue 5, Issue 1 ISSN: Three D voltae sources with a ratio of V 1:V 2:V 3=1:3:9 are used in the proposed syste to obtain a 27-level inverter[4]. The ratio of three separate D voltae source is follows V 1:V 2:V 3=1:3:9 The output voltae of each H bride unit is as follows V V ab bc +1V1 S 1,S4 0 V1 S 1,S3 1V1 S 2,S3 +3 V2 S 5,S8 0 V2 S 5,S7-3 V S,S V ca +9 V S,S 0 V S,S -9 V S,S The output voltae (V an) of the cascade inverter is V an = V ab + V bc + V ca By usin Three H-bride odule fed with separate dc voltae sources with the ratio of 1:3:9 and by controllin the switchin of the inverter odules an output of 27 voltae levels can be enerated. The output voltae ranes fro -13 V dc to +13V dc. A. Inverter resolution The ore asyetrical confiuration, the hiher the resolution. The reconized nuber of cells, one can chane the type of the cells and their supply voltaes. To obtain a structure that enerates identical levels, the supply voltaes ust exaine the sinle-phase unifority provision IJDR International Journal of nineerin Developent and Research ( 686

4 13 A 50 f Vref Fref Bride 1 Bride 2 Bride 3 M PWM Scope IJDR Volue 5, Issue 1 ISSN: k ΔU U U n 1. U k k1 1 j j j1 Where U k and n j are the step and the quantity of level of the k th cell and where U 1 is also the step of the resultin inverter. This condition is a function of the nuber of levels and of the steps of the cobined cells. For the proposed structure, with one H- bride in series the nuber of levels can o up to 27. B. Inverter efficiency The efficiency of a hybrid inverter is hiher than a conventional inverter, for the applications where the switchin losses are bier. The efficiency of the proposed structure is between the efficiency of the ideal hybrid inverter and a conventional ultilevel inverter fully supplied with dc-dc converters. At the sae tie, it is an attractive solution to et a lare nuber of levels toether with a ood efficiency. VI. SIMULATI RSULTS The proposed cascaded ultilevel inverter with varyin D input has been siulated usin MATLAB/Siulink software tool under different loadin condition and perforance analysis had been ade based on the THD values at different load condition. Paraeters Value Phase Frequency Sinle 50HZ V dc1 3 V dc2 9 V dc3 27 Power Ratin 1KW Table 2.Paraeters of proposed cascade inverter Discrete, s = 5e-005 s powerui IGBT/Diode dc1 IGBT/Diode 1 i + - I IGBT /Diode 2 IGBT /Diode 3 Load IGBT /Diode 4 IGBT/Diode v V1 dc2 IGBT /Diode 6 IGBT /Diode 7 IGBT /Diode 8 IGBT/Diode 9 dc3 IGBT /Diode 10 IGBT /Diode 11 Fiure.3: siulation for sinle phase 27 level inverter The siulink block of 27-level Multi level inverter is shown in fiure, consists of D source, inverter and voltae, current easureent. The ate pulse of inverter switches are controlled by sinusoidal pulse width odulation which in turn controls the switch. The siulation odel for individual phase voltaes for a three phase cascaded ultilevel inverter with R load is shown in Fiure.3.Fiure.4. represents the Voltae odulation cycle of the sinle phase cascaded ultilevel inverter when runnin a R load of about 1kW. Fiure.5 holds the output voltae and current with R load.fiure 6 holds the THD analysis for output voltae. Fiure 7 holds the THD analysis for output current. IJDR International Journal of nineerin Developent and Research ( 687

5 2017 IJDR Volue 5, Issue 1 ISSN: Fiure 4.Voltae Modulation ycle Fiure 5. Output voltae with R load Fiure 6. THD analysis of output voltae with R load Discrete, s = 5e-005 powerui Scope 1 p n Subsyste3 Scope Scope 2 siout p1 n2 Subsyste4 A Vabc Iabc B a b c Three -Phase V-I Measureent To Workspace siout 1 To Workspace 1 ction Port ion Port1 Subsyste Three -Phase Parallel RL Load A B Fiure 7.Siulation for three-phase 27 level ultilevel inverter IJDR International Journal of nineerin Developent and Research ( 688

6 2017 IJDR Volue 5, Issue 1 ISSN: Fiure 8.Individual Phase Voltae Fiure 9.Line to Line Voltae Fiure 10.THD analysis for Line Voltae VII. LUSI An iproved new hybrid 27 level ultilevel inverter structure is proposed. Basic new hybrid inverter schee is to et the better sinusoidal output copared with low level inverters. The asyetrical ultilevel inverter is used to obtain a hih resolution. By this ethod decrease the input voltae and et better efficiency in a 27 level ulti level inverter structure. As per the desin of the proposed 27 level ultilevel inverter, the total haronic distortion is draatically reduced to 4.84%.The asyetrical hybrid technique is used to iprove the level of inverter and extends the desin flexibility and reduces the haronics. RFRNS [1]M.Malinowski, K.Gopakuar, J.Rodriuez and M.Perez, A survey on cascaded ultilevel inverters, I Transaction an Industrial lectronics, vol 57, no. 7, pp , July [2]Mauricio Rotella,Gonzalo Penaililo,Javer Pereda, and Juan Dixon, PWM ethod to eliinate power sources in a non-redundant 27 level inverter for achine drive applications, I Transaction on industrial lectronics,vol.56,no.1,pp ,january [3]J. Rodriuez, J. S. Lai, and F. Z. Pen, Multilevel inverters: A survey of topoloies, controls, and applications, I Transaction on Industrial lectronics, vol 49, no. 4, pp , Auust [4] K. M. Rahan, N. R. Patel, T. G. Ward, J. M. Naashia, F. aricchi,and F. rescibini, Application of direct-drive wheel otor for fuel cell electric and hybrid electric vehicle propulsion syste, I Trans. Ind.Appl., vol. 42, no. 5, pp , Sep./Oct IJDR International Journal of nineerin Developent and Research ( 689

7 2017 IJDR Volue 5, Issue 1 ISSN: [2] M. Hinkkanen and J. Luoi, Brakin schee for vector-controlled induction otor drives equipped with diode rectifier without brakin resistor, I Trans. Ind. Appl., vol. 42, no. 5, pp ,Sep./Oct [3]. H. Rivetta, A. adi, G. A. Williason, R. Jayabalan, and B. Fahii, Analysis and control of a buck dc dc converter operatin with constant power load in sea and undersea vehicles, I Trans. Ind. Appl., vol. 42, no. 2, pp , Mar./Apr [4] J. S. Lai and F. Z. Pen, Multilevel converters A new breed of power converters, I Trans. Ind. Appl., vol. 32, no. 3, pp , May/Jun [5] L. M. Tolbert, F. Z. Pen, T. G. Habetler, Multilevel converters for lare electric drives, I Transactions on Industry Applications, vol.35, no. 1,Jan./Feb. 1999, pp [6] J. S. Lai and F. Z. Pen, Multilevel converters A new breed of powerconverters, I Transactions on Industry Applications, vol. 32, no.3, May./June 1996, pp [8] S. Onoda, A. adi, PSIM-based odelin of autootive powersystes: conventional, electric, and hybrid electric vehicles ITransactions on Vehicular Technoloy, vol. 53, issue 2, 2004, pp [9] D. Zhon B. Ozpineci, L. M. Tolbert, J. N. hiasson, Inductorless DA cascaded H-Bride ultilevel boost inverter for electric/hybrid electricvehicle applications, I Industry Applications onference, Sept. 2007,pp [10] J. Liao, K. orzine, M. Ferdowsi, A new control ethod for sinle-d source cascaded H-Bride ultilevel converters usin phase-shift odulation, I Applied Power lectronics onference and xposition, Feb. 2008, pp [11] S. Khofoi, L. M. Tolbert, Multilevel power converters, Power lectronics Handbook, 2nd dition lsevier, 2007, ISBN , hapter 17, pp IJDR International Journal of nineerin Developent and Research ( 690