ADVANCES in NATURAL and APPLIED SCIENCES

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1 ADVANS in NATURAL and APPLID SINS ISSN: Published BYANSI Publication ISSN: May (7): paes 9-99 Open Access Journal Phase Disposition Pwm Based Reduced Switch Reverse Voltae Multi Level Inverter V. Karthikeyan and V. Jamuna Assistant Professor, lectrical and lectronics nineerin (Marine), AMT University, hennai - 63, India. Professor, lectrical and lectronics nineerin, Jerusalem ollee of nineerin, hennai - 6, India. Received February 5; accepted March 6; published 5 March 6 Address For orrespondence: V. Karthikeyan, AMT University, Department of lectrical and lectronics nineerin (Marine), 35, ast oast Road, Kanathur.hennai. India. -mail: vasu.karthi@mail.com opyriht 7 by authors and American-urasian Network for Scientific Information (ANSI Publication). This work is licensed under the reative ommons Attribution International License ( BY). / ABSTRAT This paper investiates and analyses the phase disposition pulse width modulation (PDPWM) based Reduced Switch Reverse Voltae (RSRV) multi level inverter. This inverter has been desined with lesser number of components. nhancement of output power quality usin PDPWM is discussed with respect to the amplitude and frequency modulation index values. This PDPWM based 9-level inverter with reduced components and odd valued frequency modulation index value, produces better harmonic spectrum. All the lower order harmonics are well within the limit defined by the I-59 standard. The simulation model of PDPWM based asymmetrical 9-level inverter with reduced number of components is built to validate its operation and the results are presented. KYWORDS: Multi Level Inverter, Phase Disposition PWM, Reduced number of components, and Total Harmonic Distortion. INTRODUTION The demand for hih power A drives has been increased in the recent years. Hih power A drives are typically connected to the medium-voltae network. It is touh to connect a sinle power semiconductor switch directly to the medium-voltae network. For these reasons, a family of new Multi Level Inverters (MLIs) has emered as the answer for hih power medium or hih voltae applications. It has ained rowin knowlede in industry and research since it was introduced in 98s []. A MLI is an interconnection of number of power semiconductor devices. The advantaes of this method over the usual two-level inverter approach are: improved power quality, reduced voltae stress on the switches and load, improved amplitude of fundamental components and lower electromanetic interference []. The basic role of MLI is to sum up several small D sources with suitable switchin sequences to the array of power switches so as to obtain a multiple steps stair-case waveform which resembles the A sinusoidal waveform. Hence inverter operation is achieved. The merits of the MLI can be enhanced by increasin the number of steps in the output waveform. There are three types of commonly used MLI topoloies: Neutral Point lamped (NP) [3], Flyin apacitor (F) [4] and ascaded H-Bride (HB) [5] multi level inverter. Amon these topoloies HB Multi Level Inverter (HBMLI) becomes more attractive, because of its reater reliability arisin from its modularity and lesser number of hardware components. ascade connection of a number of basic H-bride inverters forms To ite This Article: V. Karthikeyan and V. Jamuna, Phase Disposition PWM Based Reduced Switch Reverse Voltae Multi Level Inverter. Advances in Natural and Applied Sciences. (7); Paes: 9-99

2 9 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: 9-99 a HBMLI. ach H-bride inverter can enerate three voltae levels in the output. These inverters are classified as: symmetric (each H-bride is fed by equal D sources) and asymmetric (each H-bride is fed by unequal D sources) MLIs. An asymmetric HBMLI is preferred to produce more number of output levels with same number of power switches. onventionally, there are two asymmetrical confiurations: binary and ternary. There are various other asymmetrical MLI topoloies proposed by many researchers [6]. Since the MLI topoloies require reduced voltae stress on the power switchin devices, we can realize the hih power inverters with low power matured semiconductor technoloy [7]. MLIs have been used in many applications, such as variable speed A drives, power quality devices and renewable enery eneration such as photovoltaic, wind and fuel cells [8]-[]. The power quality of the MLI increases as the number of levels in the output increases. The main disadvantae of MLI is the circuit complexity increases when the output levels increases, hence the overall cost and size of the system. To overcome these disadvantaes, many topoloies are introduced with reduced number of components []-[5]. Another major disadvantae with the conventional MLI is the requirement of small isolated D voltae sources or series bank capacitors. This is overcome by usin the renewable enery sources. The performance of the MLI is mainly depends on the modulation technique used to enerate the required atin sinals. Different modulation techniques have been introduced to improve the performance of the MLIs [],[],[6]-[9]. The commonly used modulation techniques are Selective Harmonic limination (SH) [6], [7], arrier Based PWM (BPWM) [8] and Space Vector Modulation (SVM) [9]. In this paper, a Reduced Switch Reverse Voltae (RSRV) multi level inverter with asymmetrical D sources and reduced number of components is considered. This topoloy requires lesser number of components than the conventional topoloies. The performance of the inverter is enhanced by a Multi arrier based Pulse Width Modulation (MPWM). The various MPWM methods are discussed and Phase Disposition Pulse Width Modulation (PDPWM) based 9-level RSRV-MLI is developed. The operation and performance of the 9- level RSRV-MLI with asymmetrical D sources are presented and validated throuh the simulation results.. Structure of RSRV-MLI Topoloy: ascade connection of number of sub-modules forms a Reduced Switch Reverse Voltae (RSRV) MLI topoloy to produce the required multi level output voltae. The eneralized block diaram of asymmetrical RSRV-MLI with reduced components is shown in Fi.. This topoloy can be easily extended to hiher levels by addin the number of sub-modules. ach sub-module consists of two power switches and one D voltae source. The switches in one sub-module should not be triered simultaneously. All the D voltae sources are asymmetrical and it follows the voltae ratios : : : : (n-). The block diaram shown in Fi. consists of two parts, one is manitude enerator or level enerator which forms by the cascade connection of number of basic sub-modules (SM) and the other is polarity enerator which is the basic H-bride (HB) circuit. The manitude enerator part is responsible to produce the all possible positive voltae levels (unidirectional staircase waveform) of the output by proper switchin function of switches in the manitude enerator part. This unidirectional staircase waveform is applied to the polarity enerator part. The polarity enerator part provides the alternative polarities to the output of the manitude enerator. So that the alternatin output voltae is obtained. The switches in the polarity enerator part are operated at the fundamental or line frequency. The number of output levels with n number of asymmetrical sources is iven by, N n () The number of sub-modules (m) required is calculated by, m n () The maximum output voltae obtainable is iven by, ( N ) Vo max V dc (3) The number of switches required for this topoloy with asymmetrical D sources is iven by, lo( N ).3 N sw m (4) The number of driver circuits (N dri) required is equal to the number of switches (N sw) required.

3 9 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: 9-99 Manitude enerator Polarity enerator Load Vdc3 SM Vm Vo Vdc SM t HBM t LOAD Vdc SH SH3 Sa Sb SH4 SH Fi. : Functional block diaram of the RSRV-MLI. Description of RSRV-MLI Topoloy: The operation of asymmetrical 9-level RSRV-MLI topoloy with reduced components is explained with the help of the circuit diaram shown in Fi.. The circuit diaram of this topoloy can be divided into two parts, one is manitude enerator part or level enerator part other one is polarity part. For 9-level RSRV-MLI, it requires three asymmetrical D voltae sources (V dc, V dc, V dc3), two sub-modules (SM, SM ) and one H- bride module (HBM). The manitudes of D sources are 55V, 55V and V. Manitude enerator Polarity enerator Sa Sb Vdc3 SH SH3 Sa Sb Load Vdc SH4 SH Vdc Fi. : ircuit diaram of 9-level RSRV-MLI The switches in the manitude enerator parts are operated at the hiher frequency (hiher than the fundamental frequency) to produce all possible positive output voltae levels by proper switchin sequence of switches in the manitude enerator part (S ax and S bx). Here each sub-module contains two power switches. These two switches of each sub-module should not be triered simultaneously. By proper switchin of the switches in the manitude enerator, various possible positive output voltae levels (55V, V, 65V and V) can be achieved. This produces the unidirectional staircase waveform (V m). The polarity enerator is just an H-bride module. The function of this polarity enerator is to chane (reverse) the polarity of the output for every half cycle so that the bidirectional staircase waveform can be achieved. Switches SH & SH are turned ON durin positive half cycle, SH 3 & SH 4 are turned ON durin neative half cycle and for zero output level, the switches (SH & SH 3) or (SH & SH 4) are turned ON. The switches at polarity enerator are operated at the fundamental frequency. Switchin sequences of the asymmetrical 9-level RSRV-MLI is iven in the TABL. Table : Switchin sequences of 9-level RSRV-MLI Level Output Voltae (V an) Switchin Functions Manitude Generator (S as bs as b) Polarity enerator (S HS HS H3S H4) 4V dc 3V dc 3 V dc 4 V dc 5 xxxx / 6 -V dc 7 -V dc

4 93 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: V dc 9-4V dc 3 Multi arrier Based Pulse Width Modulation: To enhance the quality of the MLI output, various modulations are used. Out of these modulation methods, SH or BPWM methods are most commonly used because of ease of controllability. In this paper, Phase Disposition PWM (PDPWM) of carrier based modulation is considered. This PDPWM method is more suitable for inverter operation, its output contains only the odd harmonics (all even harmonics are absent) and the maximum harmonic enery is mitiated to the frequency which is equal to the carrier frequency. In PDPWM method, several trianular carrier sinals are compared with one sinusoidal reference sinal. The number of carriers required to produce N-level output is (N-) Voltae in volts Fi. 3: arrier and reference waveforms for the PDPWM of 9-level RSRV-MLI Zero rossin Detector Modulatin waveform omparator omparator S, S S 3, S 4 A r f r omparator P A c arrier f c f c omparator P arrier f c omparator P 3 arrier3 f c omparator arrier8 Fi. 4: Functional block diaram of PDPWM for 9-level RSRV-MLI The sinle sinusoidal reference waveform has peak to peak amplitude of A r and a frequency f r. The multiple trianular carrier eaves are havin same peak to peak amplitude A c and frequency f c. The sinle sinusoidal reference sinal is continuously compared with all the carrier waveforms. A pulse is enerated, whenever the sinusoidal reference sinal is reater than the carrier sinal. The frequency modulation index (m f) is as follows fc m f fr (5) Fi. 3 illustrates the PDPWM stratey, where the carriers with same frequency f c and same peak to peak amplitude A c but they are level shifted. The amplitude modulation index of the PDPWM is iven by Ar ma ( N ) Ac (6)

5 94 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: 9-99 Fi. 4 shows the functional block diaram of the PDPWM stratey. It requires eiht carrier sinals and one sinusoidal sinal to produce the required switchin sequences for 9-level output voltae. These carrier sinals are continuously compared with the reference sinal and produce the modulated control sinals. These control sinals are combined by the proper combinational loics formed by (7)-(4) and produces the sequence of switchin pulses required for the 9-level RSRV-MLI. G H P P P 33 P 44.S (7) G H P P P 33 P 44.S (8) G H 3 P P P 33 P 44.S 3 (9) G H 4 P P P 33 P 44.S 4 () G a ( P P) ( P33 P44) () G b ( PP) ( P33 P) () P G a P44 G b P (4) where, G H, G H, G H3 and G H4 are the switchin pulses applied to the switches H, H, H 3 and H 4 in the polarity enerator part. G a and G b are the switchin pulses applied to the switches in the first sub-module (SM ) of the level enerator part. G a and G b are the switchin pulses applied to the switches in the second sub-module (SM ) of the level enerator part. S, S, S 3 and S 4 are the pulses produced by the zero crossin detector part. The pulses P -P 8 are produced by the PDPWM eneration part. The pulses P, P, P 33 and P 44 are derived from the pulses P -P 8. 4 Results and Discussions: (3) >= [GH] [GB] [GH] [GH3] <= [GH4] [GA] [GH] [GH3] u >= [GB] >= >= [GH4] [GH] V+ V- [GA] [GA] > [GB] [GA] Fi. 5: Simulation model of 9-level RSRV-MLI with PDPWM [GB] The feasibility of the PDPWM based 9-level RSRV-MLI is studied throuh the simulations carried out usin MATLAB/Simulink. The Simulink model developed for the presented topoloy is shown in Fi. 5. For 9- level RSRV-MLI, two sub-modules (SM & SM ) and one polarity enerator module (HBM) were used. The atin pulses for the switches used in the power circuit were enerated by comparin the carrier sinals and reference sinal shown in Fi. 3. The functional block diaram of the PDPWM based pulse eneration circuit is shown in Fi. 4. The simulation parameters used for PDPWM based 9-level RSRV-MLI are shown in Table. The pulses used in polarity enerator part and level enerator part are shown in Fi. 6. It is clear that the switches in the polarity enerator part are operated at the fundamental frequency and the switches in the level enerator part are operated at the hiher frequency.

6 95 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: 9-99 Table : Simulation parameters of PDPWM based 9-level RSRV-MLI Parameter Value Number of levels 9 Number of sub-modules Number of switches 8 Number of D sources 3 (55V, 55V and V) Modulation Phase Disposition PWM Frequency Modulation Index (m f) 5 Amplitude Modulation Index (m a). Fundamental frequency 5Hz Load For R-load Ω, For RL-load 5Ω, 5mH GH GA.5.5 Voltae in volts GH GH GH4 Voltae in volts GB GA GB (a) (b) Fi. 6: Gatin pulses for (a) Polarity enerator (b) Manitude enerator of 9-level RSRV-MLI with PDPWM Voltae in volts 5-5 urrent in Amps (a) (b) Fi. 7: (a) Output voltae (b) Output current waveforms of 9-level RSRV-MLI with R-load Manitude (% of fundamental) Fi. 8: Harmonic spectrum of output voltae and current of 9-level RSRV-MLI with R-load The output voltae and current waveforms of the PDPWM based 9-level RSRV-MLI with R-load are shown in Fi. 7. From the fiure, it is clear that the output waveforms contain all the possible levels (±55V, ±V, ±65V, ±V and V) as anticipated, also the voltae and current waveforms are in phase. The harmonic analysis of these output waveforms shows that the voltae and current THDs are 9.%. The harmonic spectrum of the output voltae is shown in Fi. 8. From the harmonic spectrum, it is observed that it contains only the odd numbered harmonics and also the maximum harmonic enery occurred at the carrier frequency. The manitude of all the lower order harmonics are lesser that 3%. The peak value of output voltae and current are 9V and.9a.

7 96 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: 9-99 Voltae in volts urrent in Amps (a) (b) Fi. 9: (a) Output voltae (b) Output current waveforms of 9-level RSRV-MLI with RL-load Manitude (% of fundamental) Manitude (% of fundamental) (a) (b) Fi. : Harmonic spectrum of (a) output voltae (b) output current of 9-level RSRV-MLI with RL-load The output voltae and current waveforms with RL-load is shown in Fi. 9. With RL-load the output voltae waveform contains all the possible nine levels in the output, whereas the output current is smooth sine wave with some phase shift. Fi. shows the harmonic spectrums of the output voltae and current of PDPWM based 9-level RSRV-MLI with RL-load. From these harmonic spectrums, it is clear that the THDs of output voltae and current are 9.4% and.9% respectively. The output voltae and current waveforms contains odd harmonics only and the maximum harmonic enery occurred at the frequency equal to the carrier frequency. Spectra for PDPWM with different frequency modulation index Manitude (% of fundamental) Frequency modulation index Fi. : Harmonic spectrum of PDPWM based 9-level RSRV-MLI for different even valued frequency modulation index Spectra for PDPWM with different frequency modulation index 3 Manitude (% of fundamental) Frequency modulation index Fi. : Harmonic spectrum of PDPWM based 9-level RSRV-MLI for different odd valued frequency modulation index 9

8 97 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: 9-99 Spectra for PDPWM with mf=5 and different amplitude modulation index Manitude (% of fundamental) Amplitude modulation index Fi. 3: Harmonic spectrum of PDPWM based 9-level RSRV-MLI for different amplitude modulation index and m f =5. Table 3: Performance summary of 9-level RSRV-MLI with PDPWM Parameter R-load RL-load Number of levels 9 9 Number of switches 8 8 Manitude of fundamental voltae 9 V 8.8 V Frequency modulation index 5 5 Amplitude modulation index.. Fundamental frequency 5 Hz 5 Hz Manitude of V 3 (% of fundamental).9. Manitude of V 5 (% of fundamental).5.53 Manitude of V 7 (% of fundamental)..8 Manitude of V 9 (% of fundamental).8.9 Voltae THD (in %) urrent THD (in %) 9..9 Distortion Factor (DF) Fi. shows the harmonic spectra of PDPWM based 9-level RSRV-MLI for different even valued frequency modulation index (m f) and m a=. This fiure is evident that the output contains both odd and even numbered harmonics. Fi. shows the harmonics spectra of PDPWM based 9-level RSRV-MLI for different odd valued frequency modulation index (m f) and m a=. This fiure is an evident that the output contains only odd numbered harmonics. Fi. 3 shows the harmonic spectra of PDPWM based 9-level RSRV-MLI for different amplitude modulation index (m a) and m f=5. Form the Fi. 3, it is clear that the output contains only odd numbered harmonics. In all the above cases of PDPWM based inverter the maximum amount of harmonic enery is present at the frequency which equal to the carrier frequency. The values of the individual harmonics are iven in the APPNDIX. The performance of the PDPWM based 9-level RSRV-MLI for m f=5 and m a=. are summarized in Table 3. onclusions: In this paper, a PDPWM based 9-level RSRV multi level inverter topoloy with reduced number of components was effectively developed. This inverter requires lesser number of components when it is used for hiher number of output levels. A multi carrier based PDPWM scheme is demonstrated. This PDPWM with odd number of frequency modulation index produces the odd numbered harmonics only in the output of the inverter and all the lower order harmonics are well within the limit of I-59 standard. Also the maximum harmonic enery is dissipated at the carrier frequency. The presented inverter topoloy required lesser number of components, could promise better performance, reliability and reduction in size and cost of the inverter. The performances of the PDPWM based 9-level RSRV-MLI are demonstrated with the simulation results. RFRNS. Kouro, S., M. Malinowski, K. Gopakumar, et al.,. Recent advances and industrial applications of Multilevel onverters. I Trans. Ind. lectron., 57(8): Rodriuez, J., J.S. Lai, F.Z. Pen,. Multilevel Inverters: A Survey of Topoloies, ontrol, and Applications. I Trans. Ind. lectron., 49(4): Nabae, A., I. Takahashi, Akai, 98. A New Neutral-Point-lamped PWM Inverter. I Tran. Ind. Appli., IA-7(5): Lai, J.S., F.Z. Pen, 996. Multilevel onverters: A New Breed of Power onverter. I Tran. Ind. Appli., 3(3):

9 98 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: Hammond, P.W., 997. A New Approach to nhance Power Quality for Medium Voltae A Drives. I Tran. Ind. Appli., 33(): Franquelo, L.G., J. Rodriuez, J.I. Leon, et al., 8. The Ae of Multilevel onverters Arrives. I Ind. elctron. Ma., : Mastromauro, R.A., M. Liserre, A. Dell Aquila,. ontrol Issues in Sinle-Stae Photovoltaic Systems: MPPT, urrent and Voltae ontrol. I Trans. Ind. Informatics, 8(): Karthikeyan, V., V. Jamuna, Abisha James, 4. Multilevel Inverter for Hybrid nery Generation System, Applied Mechanics and Materials, 6: Malinowski, M., K. Gopakumar, J. Rodriue, M.A. Pérez,. A Survey on ascaded Multilevel Inverters. I Trans. Ind. lectron., 57(7): Najafi,., A.H.M. Yatim,. Desin and Implementation of a New Multilevel Inverter Topoloy. I Tran. Ind. lectron., 59(): Karthikeyan, V., V. Jamuna, 3. Hybrid ontrol Stratey for BD Topoloy Based Modular Multilevel Inverter. ircuits and Systems, 7(8): Banaei, M.R.,. Salary, 3. Asymmetric ascaded Multi-level Inverter: A Solution to Obtain Hih Number of Voltae Levels. Journal of lectrical nineerin & Technoloy, 8(): Rakesh Kumar, V. Karthikeyan and V. Jamuna, 3. A Multilevel Inverter with Reduced Number of Switches. Procedins of Second National onference on Power System Power lectronics and Drives (PSPD-3): Babaei,., S. Laali, Z. Bayat, 5. A Sinle-Phase ascaded Multilevel Inverter Based on a New Basic Unit with Reduced Number of Power Switches. I Trans. Ind. elctron., 6(): Babaei,., S. Laali, S. Alilu, 4. ascaded Multilevel Inverter with Series onnection of Novel H- Bride Basic Units. I Trans. Ind. lectron., 6(): Ghasemi, N., F. Zare, A.A. Boora, A. Ghosh,. Lanton, F. Blaabjer,. Harmonic limination Technique for a Sinle-Phase Multilevel onverter with Unequal D Link Voltae Levels. IT Power lectron., 5(8): Kumle, A.N., S.H. Fathi, F. Jabbarvaziri, M. Jamshidi, S.S.H. Yazdi, 5. Application of Memetic Alorithm for Selective Harmonic limination in Multi-Level Inverters. IT Power lectron., 8(9): McGrath, B.P., D.G. Holmes, T. Lipo,. Multicarrier PWM Stateies for Multilevel Inverter. I Trans. Ind. lectron., 49(4): Irfan, A., B.B. Vijay, 4. Simplified Space Vector Modulation Technique for Seven-Level ascaded H- Bride Inverter. IT Power lectron., 7(3): APPNDIX I: Harmonic Analysis for PDPWM based 9-level RSRV-MLI Parameters Values ma mf %THD Fundamental voltae in pu V V V V Manitude of voltae Harmonics (in % of fundamental) V V V V V V V V V V

10 99 V. Karthikeyan and V. Jamuna., 7/Advances in Natural and Applied Sciences. (7) May 7, Paes: 9-99 V4.63. V V V V V V V V V V V V V V V V V V V V V