Performance Analysis of Single Phase Reduced Switch Asymmetric Multilevel Inverter

Transcription

1 Performance Analysis of Single Phase Reduced Switch Asymmetric Multilevel Inverter V. Arun, B. Shanthi, S.P. Natarajan Abstract This paper presents a new group of single phase cascaded 15 level inverter with reduced switch count that operates in asymmetric mode. The proposed multilevel inverter produce DC voltage levels similar to other topologies with less number of semiconductor switches. This paper also presents various modulating techniques include sinusoidal pulse width modulation, modified reference modulating technique. i.e., Third harmonic injected reference with triangular carrier waves. Different performance measures like THD,V RMS, CF, and FF have also been evaluated by simulation. The simulation of proposed circuit is carried out using MATLAB /SIMULINK and the result for the same are presented in this paper developed various cascaded inverter topologies. Various multi-carrier PWM strategies for multilevel inverters were proposed in [14, 15]. Urmila and Subbarayudu [16] proposed various modified reference modulating techniques. This paper presents a single phase reduced switch asymmetrical multilevel inverter topology for investigation using unipolar sine and reference PWM switching techniques. Simulations were performed using MATLAB-SIMULINK. Harmonic analysis and evaluation of different performance measures for various modulation indices have been carried out and presented. Index Terms- UAPOD, UCO, CF, FF, UPD, THD. I. INTRODUCTION Multilevel Inverters have become an attractive choice as a partial solution to the improvement of the global conversion chain efficiency imposed by the renewable energies systems. The multilevel inverters unique structure allows to reach high voltages and power levels without the use of transformers. They are specially suited to high voltage vehicle drives where low output voltage total harmonic distortion (THD) and electromagnetic interference (EMI) are needed. The general function of the multilevel inverter is to synthesize a desired output voltage from several levels of DC input voltages. As the number of levels increases, the synthesized output waveform has more steps, which produces a staircase wave that approaches the desired waveform. Ahmed and Mekhilef [1] proposed three phase multilevel inverter with less number of switches. Aghdam et al [2] suggested various multicarrier PWM methods for asymmetrical multilevel inverter. Babaei et al [3] developed asymmetrical multilevel converter with reduced source and switches. Cascaded multilevel converters with reduced number of switches were introduced in [4, 5]. Bensraj et al [6] introduced unipolar PWM using trapezoidal amalgamated reference. Bensraj and Natarajan [7] proposed multicarrier trapezoidal PWM strategies for a single phase five level cascaded inverter. Various control technique for cascaded multilevel inverter described by Corzine et al in [8]. Ceglia et al [9] introduced simplified multilevel inverter topology. Gonzalez et al [1] discussed transformer less single-phase multilevel-based photovoltaic inverter. Kang et al [11] introduced 27 level inverter and various control techniques. Murugesan et al [12] proposed sinusoidal PWM based modified cascaded multilevel inverter. Malinowski et al [13] II. ASYMMETRIC CASCADED MULTI-LEVEL INVERTERS The concept of cascade MLI is based on connecting H- bridge inverters in series to get a sinusoidal voltage output. The output voltage is the sum of the voltage that is generated by each cell. The number of output voltage levels are 2n+1, where n is the number of cells. Asymmetric multilevel inverter looks like a traditional cascaded H-bridge multilevel inverter except input DC source. The properties of asymmetric multilevel inverters are however quite different from traditional H-bridge cascaded multilevel inverter. Especially the number of output voltage levels can be dramatically increased. Instead of increasing the number of levels, one can also choose to reduce the number of cells. This is an interesting possibility to increase the reliability of a converter, while keeping the same output quality. One of the advantages of this type of multilevel inverter is that it needs less number of components comparative to the diode clamped or the flying capacitor, so the price and the weight of the inverter is less than that of the other types. III. PROPOSED REDUCED SWITCH MULTILEVEL INVERTER The proposed inverter consists of less number switches compared to conventional cascaded H bridge inverter. The general structure of a proposed cascaded multilevel inverter is shown in the Figure1. This inverter consists of three conversion cell and one H Bridge. Conversion cell consist of two active switching elements and three separate voltage sources (V1, V2, V3), each source connected in cascade with other sources, this make the output voltage in only positive polarity. H bridge circuit make the output voltage in positive and negative polarity. The inverter consists of ten switches and three separate unequal DC sources with a load. 52

2 strategy. S 1 V 1 S' 1 Carrier overlapping PWM strategy. The formulae to find the Amplitude of modulation indices are as follows: V 2 A 1 R-Load B 1 For UPDPWM, UAPODPWM: S 2 S' 2 m = 2 A /( m 1) A ) a m c (1) B 2 A 2 UCOPWM: S 3 V 3 S' 3 ma = Am / (4* A c) (2) The frequency ratio mf are as follows: m = f / f f c m (3) Figure 1: Proposed Reduced switch MLI Table I Switching Table for Proposed inverter S 1 S 1 S 2 S 2 S 3 S 3 A 1 B 1 A 2 B 2 Level Third Harmonic Injection unipolar PWM method is obtained by adding the third harmonic component to fundamental sine in right proportion and the obtained sine and 18 phase shifted ones are super imposed[15] A. Unipolar Phase Disposition PWM (UPDPWM) The triangular carriers of same amplitude and frequency are disposed such that bands they occupy are contiguous. Carrier arrangement for UPDPWM strategy having reference and are illustrated in figures 2 & 3 respectively. IV. PWM CONTROL STRATEGIES In this proposed work a unipolar sine wave with a triangular carrier is used to generate firing pulses for a 15 level inverter. For an m-level inverter using unipolar multicarrier technique, (m-1)/2 carriers with the same frequency fc and same peak-to-peak amplitude Ac are used. The reference waveform has amplitude Am and frequency fm and it is placed at the zero reference. The reference wave is continuously compared with each of the carrier signals. If the reference wave is more than a carrier signal, then the active devices corresponding to that carrier are switched on. Otherwise, the device switches off. Figure 2: Carrier arrangement for unipolar sin reference UPDPWM technique (ma=1 and mf=, Ac=1, Am =7) There are many alternative strategies are possible, some of them are tried in this paper and they are: Phase disposition PWM strategy. Alternate phase opposition disposition PWM Figure 3: Carrier arrangement for unipolar reference UPDPWM technique (ma=1 and mf=, Ac=1, Am =7) B. Unipolar Alternate Phase Disposition PWM (UAPODPWM) The triangular carriers of same amplitude are phase 521

3 displaced from each other by 18 degrees alternately. Carrier arrangement for UAPODPWM strategy having reference and are illustrated in figures 4 & 5 respectively. Figure 7: Carrier arrangement for unipolar reference COPWM technique(ma=1 and mf=, Ac=1.6, Am =6.4) Figure 4: Carrier arrangement for unipolar sin reference UAPODPWM technique(ma=1 and mf=, Ac=1, Am=7) Figure 5: Carrier arrangement for unipolar reference UAPODPWM technique(ma=1 and mf=, Ac=1, Am =7) C. Unipolar Carrier overlapping PWM (UCOPWM) In carrier overlapping technique, (m-1)/2 carriers are disposed such that the bands they occupy overlap each other; the overlapping vertical distance between each carrier is Ac/2.Carrier arrangement for UCOPWM strategy having reference and are illustrated in figures 6 & 7 respectively. V. SIMULATION RESULTS The Proposed multi level inverter is modeled in SIMULINK using power system block set. Switching signals are developed using various unipolar PWM techniques discussed previously. The simulation is carried out for a fundamental frequency of Hz and a carrier frequency of Hz. Simulations are performed for three different values of ma (.9,.95 and 1). Figs.8-19 shows the simulated output voltages and harmonic spectrum for only one sample value of ma. Tables 2-5 shows the various values of ma ranging from.9 1 and corresponding %THD values and VRMS of fundamental output voltage are measured using FFT block and the crest factor, form factor for the same modulation indices were calculated. VRMS output voltage of reference with UCOPWM strategy is comparatively higher than the other PWM strategies. CF is relatively equal for all the strategies and FF is higher in reference with UAPODPWM. From the FFT spectra it is observed that, no dominant harmonics were found in UAPOD and UPDPWM having reference strategies and in UCOPWM the 3rd harmonic is comparatively more. The 3rd harmonic is high in all the three strategies having reference. The following parameter values are used for simulation: V1=21.5V, V2=43V, V3=86V, fc=hz and R(load)=ohms. 1 A m p litu d e in v o lts Figure 8: Simulated fifteen level output voltage generated by unipolar sine reference with UPDPWM technique Figure 6: Carrier arrangement for unipolar sin reference COPWM technique (ma=1 and mf=, Ac=1.6, Am =6.4) 522

4 1 Am plitude in volts Figure 9: FFT - harmonic spectrum of output of UPDPWM technique Figure 14: Simulated fifteen level output voltage generated by unipolar reference with UAPODPWM technique 1 A m p litud e in v olts Figure 1: Simulated fifteen level output voltage generated by unipolar reference with UPDPWM technique Figure 15: FFT - harmonic spectrum of output of UAPODPWM technique 1 Amplitude in volts Figure 11: FFT - harmonic spectrum of output of UPDPWM technique Figure 16: Simulated fifteen level output voltage generated by unipolar sine reference with UCOPWM technique 1 Am plitude in volts Figure 12: Simulated fifteen level output voltage generated by unipolar sine reference with UAPODPWM technique Figure 17: FFT - harmonic spectrum of output of UCOPWM technique 1 Amplitude in volts Figure 13: FFT - harmonic spectrum of output of UAPODPWM technique Figure 18: Simulated fifteen level output voltage generated by unipolar reference with UCOPWM technique 523

5 m a UPDPWM UAPODPWM UCOPWM Figure 19: FFT - harmonic spectrum of output of UCOPWM technique TABLE II % THD FOR DIFFERENT MODULATION INDICES m a UPDPWM UAPODPWM UCOPWM TABLE III VRMS (FUNDAMENTAL) FOR DIFFERENT MODULATION INDICES m a UPDPWM UAPODPWM UCOPWM TABLE IV FORM FACTOR FOR DIFFERENT MODULATION INDICES m a UPDPWM UAPODPWM COPWM E E E E E E E E TABLE V CREST FACTOR FOR DIFFERENT MODULATION INDICES VI. CONCLUSION Single phase 15 level cascaded reduced switch MLI employing unipolar sinusoidal and reference modulation strategies have been investigated. It is found that unipolar sine reference with UAPODPWM technique provides output with relatively low distortion. Fundamental RMS output voltage of unipolar reference with UCOPWM method is slightly higher than the other PWM methods. Appropriate PWM techniques may be employed depending on the performance index required in a chosen application of multilevel inverter. The proposed single phase 15 level reduced switch asymmetric inverter enormously reduces the number of switches. Thus the switching losses, cost, low order harmonics and total harmonics distortion are effectively reduced. REFERENCES [1] M.E.Ahmed, S.Mekhilef, Design and Implementation of a Multilevel Three-Phase Inverter with Less Switches and Low Output Voltage Distortion, Journal of Power Electronics, vol.9, no.4, pp , 29. [2] M.G.H. Aghdam, S.H. Fathi, G.B. Gharehpetian, Analysis of multicarrier PWM methods for asymmetric multilevel inverter, in Proc. 3rd IEEE Conference on Industrial Electronics and Applications, ICIEA 8, pp ,28. [3] E. Babaei, S. H. Hosseini, G. B. Gharehpetian, M. T. Haque, and M. Sabahi, Reduction of DC Voltage Sources and Switches in Asymmetrical Multilevel Converters Using a Novel Topology, Elsevier J. Electr. Power Syst. Res., vol. 77, no. 8, pp , 27. [4] E. Babaei. A Cascade Multilevel Converter Topology with Reduced Number of Switches, IEEE Trans. Power Electron. vol.23, no.6, pp , 28. [5] E. Babaei, S.H. Hosseini, New Cascaded Multilevel Inverter Topology with Minimum Number of Switches, Elsevier J. Energy Conversion and Management, vol.55, no.11, pp ,29. [6] R. Bensraj, S.P. Natrajan, and B.Shanthi, Unipolar PWM using Trapezoidal Amalgamated Rectangular Function for Improved Performance of Multilevel Inverter, International Journal of Computer Applications, vol.7, no.13, pp 19 24, 21. [7] R. Bensraj and S.P. Natarajan, Multicarrier Trapezoidal PWM Strategies for a Single Phase Five Level Cascaded Inverter, Journal of Engineering Science and Technology, vol. 5, no. 4, pp , 21. [8] K.A.Corzine, M.W. Wielebski, F.Z Peng, and J.Wang, Control of Cascaded Multilevel Inverters, IEEE Trans. Power Electron., vol.19, No.3, pp , May 24. [9] G. Ceglia, V. Guzman, C. Sanchez, F. Ibanez, J. Walter, and M. I. Gimanez, A New Simplified Multilevel Inverter Topology for DC 524

6 AC Conversion, IEEE Trans. Power Electron., vol. 21, no. 5, pp , Sep. 26. [1] R.Gonzalez, E.Gubia, J. Lopez, and L. Marroyo, Transformer less Single-Phase Multilevel-Based Photovoltaic Inverter, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp , 28. [11] F.S.Kang, S.J.Park,M. H.Lee, and C.U.Kim, An Efficient Multilevel Synthesis Approach and It s Application To A 27-Level Inverter, IEEE Trans. Ind. Electron., vol. 52, no. 6, pp , 25. [12] M.Murugesan, R.Sakthivel, E.Muthukumaran, and R.Sivakumar, Sinusoidal PWM Based Modified Cascaded Multilevel Inverter, International Journal of Computational Engineering Research, vol. 2, no. 2, pp , 212. [13] M.Malinowski, K.Gopakumar, J.Rodriguez, and M.A.Pérez, A Survey on Cascaded Multilevel Inverters, IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp , 21. [14] B.P.McGrath, D.G.Holmes, Multicarrier PWM strategies for Multilevel Inverters, IEEE Transactions on Industrial Electronics, Volume 49, Issue 4, pp , 22. [15] S.Malathy and U.Shajith Ali, Performance Analysis of Multi-Carrier PWM Based Cascaded Multilevel Inverter, G. J. P&A Sc and Tech, pp. 32 4, 212. [16] B.Urmila and D.Subbarayudu., Multilevel Inverters: A Comparative Study of Pulse Width Modulation Techniques, Journal of Scientific and Engineering Research, vol.1, no.13, pp.1-5, 21. magnet brushless DC motor, embedded control for multilevel inverters and matrix converters etc. He is a life member of Instrument Society of India and Indian Society for Technical Education. Contact number spn_annamalai@rediffmail.com. V.Arun was born in 1986 in Salem. He has obtained B.Tech (Electrical and Electronics) and M.E (Power Systems) degrees in 27 and 29 respectively from SRM University, Chennai, India and Sona College of Technology, Salem, India. He has been working in the teaching field for about 4 years. His areas of interest include power electronics, digial electronics and power systems. He has 8 publications in international journals. He has presented 15 technical papers in various national / international conferences. Currently, he is working as Assistant Professor in the Department of EEE, Arunai Engineering College, Tiruvannamalai. He is a life member of Indian Society for Technical Education. Contact number E- mail:varunpse@yahoo.com. B.Shanthi was born in 197 in Chidambaram. She has obtained B.E (Electronics and Instrumentation) and M.Tech (Instrument Technology) from Annamalai University and Indian Institute of Science, Bangalore in 1991 and 1998 respectively. She obtained her Ph.D in Power Electronics from Annamalai University in 29.She is presently a Professor in Central Instrumentation Service Laboratory of Annamalai University where she has put in a total service of 2 years since 1992.Her research papers (7) have been presented in various / IEEE international /national conferences. She has 3 publications in national journal and 2 in international journals. Her areas of interest are: modeling, simulation and intelligent control for inverters. Contact number shancisl@ gmail. com. S.P.Natarajan was born in 1955 in Chidambaram. He has obtained B.E (Electrical and Electronics) and M.E (Power Systems) degrees in 1978 and 1984 respectively from Annamalai University securing distinction and then Ph.D in Power Electronics from Anna University, Chennai in 23. He is currently Professor and Head of Instrumentation Engineering Department at Annamalai University where he has put in 31 years of service. He produced eight Ph.Ds and presently guiding eight Ph.D Scholars and so far guided eighty M.E students. His research papers 66 have been presented in various/ieee international/national conferences in Mexico, Virginia, Hong Kong, Malaysia, India, Singapore and Korea. He has 2 publications in national journals and 51 in international journals. His research interests are in modeling and control of DC-DC converters and multiple connected power electronic converters, control of permanent 525