New multilevel inverter topology with reduced number of switches

Transcription

1 Proceedings of the 14th International Middle East Power Systems Conference (MEPCON 10), Cairo University, Egypt, December 19-21, 2010, Paper ID 236. New multilevel inverter topology with reduced number of switches Rokan Ali Ahmed Department of Electrical Engineering University of Malaya Kuala Lumpur, Malaysia S. Mekhilef Department of Electrical Engineering University of Malaya, Kuala Lumpur, Malaysia um.edu.my Hew Wooi Ping Department of Electrical Engineering University of Malaya, Kuala Lumpur, Malaysia Abstract -The multi-level inverter system is very promising in ac drives, when both reduced harmonic contents and high power are required. In this paper, a new topology for symmetrical and asymmetrical multilevel inverter is introduced. Both types have many steps with fewer power electronic switches, which results in reduction of installation area and cost and have simplicity of control system. Firstly, we describe briefly the structural parts of the inverter then switching strategy and operational principles of the proposed inverter are explained and operational topologies are given. A new algorithm for determination of dc voltage sources magnitudes has also been presented. Finally, the simulation results verify the effectiveness of the both topology in multilevel inverter configuration and validate the proposed theory. Keywords Asymmetrical multilevel Inverter, Bidirectional switch, Total Harmonic Distortion (THD) I. INTRODUCTION Numerous industrial applications have begun to require higher power apparatus in recent years [1].Power-electronic inverters are becoming popular for various industrial drives applications [2]. A multilevel inverter is a power electronic system that synthesizes a desired output voltage from several levels of dc voltages as inputs. Recently, multilevel power conversion technology has been developing the area of power electronics very rapidly with good potential for further developments. As a result, the most attractive applications of this technology are in the medium to high voltage ranges [3]. A multilevel converter not only achieves high power ratings, but also enables the use of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel converter system for a high power application. The advantages of multilevel converters is their smaller output voltage step, which results in high voltage capability, lower harmonic components, lower switching losses, better electromagnetic compatibility, and high power quality[1], [4].Also it can operate at both fundamental switching frequency and high switching frequency PWM. It must be noted that lower switching frequency usually means lower switching loss and higher efficiency [5]. The results of a patent search show that multilevel inverter circuits have been around for more than 25 years. Today, multilevel inverters are extensively used in medium voltage levels with high-power applications [6]. The field applications include use in laminators, pumps, conveyors, compressors, fans, blowers, and mills. Subsequently, several multilevel converter topologies have been developed [3], [7]. Three different topologies have been proposed for multilevel inverters: cascaded multi cell with separate dc sources, diodeclamped (neutral-clamped) and capacitor-clamped (flying capacitors) [1]. Each of these topologies has a different mechanism for providing the voltage level. The first topology introduced was the series H-bridge design but several configurations have been obtained for this topology as well [7]. Since this topology consists of series power conversion cells, the voltage and power levels may be scaled easily. The H- bridge topology was followed by the diode-clamped converter that utilized a bank of series capacitors [8]. The flyingcapacitor topology followed diode-clamped after few years. Instead of series connected capacitors, this topology uses floating capacitors to clamp the voltage levels [9]. H-bridge inverters have isolation transformers to isolate the voltage source but they do not need either clamping diode or flying capacitor inverters. Moreover, abundant modulation techniques and control paradigms have been developed for multilevel converters such as sinusoidal pulse width modulation (SPWM), selective harmonic elimination (SHE-PWM), space vector modulation (SVM), and others [10], [11]. In addition, many multilevel converter applications focus on industrial medium-voltage motor drives [12], utility interface for renewable energy systems [13], flexible AC transmission system (FACTS) and traction drive systems [14], [15]. One clear disadvantage of multilevel power conversion is the great number of power semiconductor switches needed. Another disadvantage of multilevel power converters is that the small voltage steps are typically produced by isolated voltage sources or a bank of series capacitors. Isolated voltage sources may not always be readily available and series capacitors require voltage balance [16]. Although low-voltage-rated switches can be utilized in a multilevel converter, each switch requires a related gate driver and protection circuits. This may lead the overall system to be more expensive and complex [17].So, in practical implementation, decrease the number of switches and gate driver circuits is very important [18]. In this Paper, a new topologies of symmetrical and asymmetrical multilevel inverters been investigated to increase number of levels with a low number of switches and 565

2 gate driver circuits for generating all levels at the output, without adding any complexity to the power circuit. Finally, simulation results verify the validity of the proposed multilevel inverter. II. CASCADED H-BRIDGE MULTILEVEL INVERTER STRUCTURE Conventional cascaded multilevel inverters is one of the most important topologies in the family of multilevel and multi-pulse inverters [19]. The cascade topology allows the use of several levels of DC voltages to synthesize a desired AC voltages. The DC levels are considered to be identical since all of them are either a fuel cells or photovoltaics, natural choice, batteries, etc. [20]. Which is requires least number of components when compared to diode-clamped and flying capacitors type multilevel inverters and no specially designed transformer is needed as compared to multi pulse inverter [21]. A cascaded multi-level inverter consists of a number of H- bridge inverter units with separate dc source for each unit and it is connected in cascade or series as shown in Fig. 1 [20]. The full-bridge (H-bridge) topology shown in Fig. 1 is used to synthesize a three unique output voltages (+V dc, V dc and zero). by connecting the dc source to ac output side by different combinations of the four switches S 1, S 2, S 3, and S 4. The overall output voltage of multilevel inverter is given by: V V V V V (1) maximum output voltage (V omax ) of this n cascaded multilevel inverter is: V nv (3) For asymmetric cascaded multilevel inverter, DC voltage sources of different cells are non-equal. Asymmetric inverter provides an increased number of voltage levels for the same cells number than its symmetric counterpart. If the DC voltages of individual cells Fig. 1 are selected according to a geometric progression with a factor of two or three.for n cascaded multilevel inverters, then the number of voltage steps count is: N 2 1 ifv 2 V for j 1,2,, n 1 (4) N 3 1 ifv 3 V for j 1,2,, n 1 (5) The maximum output voltages of these n cascaded multilevel inverters are: V 2 1 V if V 2 V for j 1,2,, n (6) V V if V 3 V for j 1,2,, n (7) Comparing the Eqs. (2) (7), it can be seen that the asymmetric multilevel inverters can generate more voltage steps and higher maximum output voltage with the same number of bridges. III. THE PROPOSED MULTILEVEL INVERTER As the most important part in multilevel inverters are switches which define the reliability, circuit size, cost, installation area and control complexity. The number of required switches against required voltage levels is very important element in the design. To provide a large number of output levels without increasing the number of bridges, a new power circuit topology and a suitable method to determine the dc voltage sources level for symmetrical and asymmetrical multilevel converter are proposed in this paper. The proposed circuit also provides decreased voltage stress on the switch by the series configuration of the applied bidirectional switches. This subsequently enhances the immunity from overvoltage and dv/dt breakdown. Fig.2 shows a configuration of the proposed symmetrical multilevel inverter. In case of Fig. 3, it generates 11- level shaped output voltage wave. Fig. 1. Configuration of cascaded multilevel inverter If all dc voltage sources in Fig. 1 equal to V dc, the inverter is known as symmetric multilevel inverter and The number of output phase voltage levels N in a cascade inverter is defined by : N 2n 1 (2) Where n is the number of separate dc sources (photovoltaic modules or fuel cells) or the number of full-bridges and the Fig. 2. Suggested basic topology for a symmetrical inverter 566

3 Fig. 3. Typical output waveform of 11-level For increasing output voltage levels one power supply shall be added with one switches only. This proposed method is different from the method in [17], since it has less number of bidirectional switch and different from the conventional inverters and method in [22], since it has less number of switches. The effective number of output voltage steps (N step ) in symmetric multilevel inverter is: N 2n 1 (8) Where n represented the number of dc supplies and the maximum output voltage (V omax ) of this n cascaded multilevel inverter is: V n 1 V (9) V o can be increased by connecting the N basic circuit given in Fig 2 in series as shown in Fig. 4. In this case only two switch of each unit turns on for the operation of the converter at any given time [23]. Fig. 5.. New basic element (one stage) of asymmetric multilevel inverter with Kdc sources (cells). DC sources should be chosen according to the equation below and arrangement to produces output voltage without losing any level. Also For increasing output voltage levels one power supply shall be added with one switch only. The dc voltage sources are suggested to be chosen according to the following algorithm: V V (10-a) V 2 j 1 V if j 2,3,. K (10-b) Contrary to method [23] by using this equation all levels can be obtained without losing any level which reduces THD at the output. The number of output voltage levels in a cascaded multi-level inverter is then: N step 3 (11) The maximum output voltage V omax of this new topology is: V V V 12 Fig. 4. N basic unit connected in series. Fig. 5 shows a configuration of the proposed new basic element which used for this implementation of single-stage asymmetrical inverter. The circuit consists of k many dc voltage sources (cell) and it has two bidirectional switches only. According to Fig. 5, this topology is different from the conventional inverters and the method in [22] since it has fewer of switches. While the proposed topology is designed to produce the total dc by connecting the modulation dc sources (V dc1 ) to only one of remaining supplies (V dc2..v dck ), the design presented in [23] is based on establishing a series connection of any number of the supplies V dc1 to V dck. The new design applies less number of bidirectional switches which leads to reduced losses and overcomes the asymmetrical voltage step problem. By adding The number of the basic element is shown in Fig. 5 is connected in series same as shown in Fig. 4, to increase the output voltage. The resulting proposed asymmetrical inverter configuration can generate a stepped voltage waveform without any loss at any level. IV. THE MODULATION SCHEME There are several modulation strategies possible for multilevel inverters. This paper uses multi-level triangular waves generation to generate the modulating signals for the inverter switches as derived in [24] [25]. It can be a useful solution for pulse generation for this topology. This technique in [26] is called carrier redistribution (CR) technique. This technique is derived from the triangular carrier that has individually the lowest switching frequency among the multilevel PWM methods and it provides low harmonic distortion [26]. It results small rippled current and the smallest harmonics in output voltage and can be easily expanded to any level [26], [27]. 567

4 Fig. 6. Triangular comparison with sine wave for 7-level inverter. V. SIMULATION RESULTS It is fact that harmonic components in load current closely affect the performance of the inverter. So harmonic components are tried to be reduced and load current is brought in a quality sinusoidal form. To analyze the harmonic performance of the two techniques for purpose of comparison, several harmonic measures are possible. The total harmonic distortion (THD) is one of these measures, which evaluates the quantity of harmonic contents in the output waveform and is a popular performance index for power converters. For this purpose, the simulation studies are carried out for two different cases. The first case is the ordinary symmetrical multilevel inverter. This case is studied to examine the characteristics of the output voltage and output current. The second case is ordinary asymmetrical multilevel inverter. It is studied to examine the characteristics of the output voltage and output current to compare with other methods. For verifying the validity of the proposed multilevel inverter in the generation of a desired output voltage waveform, a prototype is simulated based on the proposed topology according to that one shown in Fig. 2. The Matlab Simulink power blockset software has been used for simulation. The symmetrical multilevel shown in Fig. 7 is adjusted to produce a 50-Hz, 7-level staircase waveform. The parameters selected for testing are: (a) An LC filter with L =0.5mH and C=10µf and (b) A resistive load of 25Ω. Table I shows the ON switches lookup table. The main idea in the control strategy is to deliver the load a voltage that minimizes the error with respect to the reference voltage This is achieved in this paper by using carrier redistribution (CR) technique. The output waveforms and their corresponding Fourier spectrums are shown in Fig. 8, 9 and 10 are the filter input voltage, load voltage and load current, respectively. Fig Level multilevel inverter (according to first method Switches states Table I N switches look-up table. V out S S S S S S Fig. 8. Simulated input voltage to filter V in. and corresponding Fourier spectrum. 568

5 Table II ON switches look-up table. Switches states V out S S S S S S S S Fig. 9. Simulated output voltage (V L). and corresponding Fourier spectrum. The output waveforms and their corresponding Fourier spectrums given in Fig. 12, 13 and 14 are the filter input voltage, load voltage and load current, respectively. Fig. 10. Output current (I L) and corresponding Fourier spectrum. To demonstrate the validity of the proposed asymmetrical multilevel inverter in the generation of a desired output voltage waveform, a prototype is simulated based on the proposed topology according to the one shown in Fig. 5. The same software, filter, load and modulation are used for simulation the symmetrical multilevel shown in Fig. 11 is adjusted to produce a 50-Hz, 11-level staircase waveform. Table II shows the ON switches look-up table. Note that there are different switching patterns for producing the zero level, and in Table I, only one of them is shown. The proposed multilevel inverter requires bidirectional switches with the capability of blocking voltage and conducting current in both directions. Fig. 12. Simulated input voltage to filter V in and corresponding Fourier spectrum.. fig Level multilevel inverter (according to first method Fig. 13. Simulated output voltage (V L) and corresponding Fourier spectrum.. 569

6 Fig. 14. Output current (il) and corresponding Fourier spectrum. VI. CONCLUSION A novel symmetrical multilevel inverter topology has been proposed in this paper. The most important feature of the system is being convenient for expanding and increasing the number of output levels simply with less number of bidirectional switches. This method results in the reduction of the number of switches, losses and cost of the converter. Based on presented switching algorithm, the multilevel inverter generates near-sinusoidal output voltage and as a result, very has low harmonic content. This paper presented a new topology for asymmetrical cascade multilevel inverter. It has two bidirectional switches only and a new algorithm for determination of dc voltage source magnitudes too. This technique provides more flexibility to designers and can generate more voltage levels without losing any level which worsens THD characteristics. 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