DATASHEET. Features. Applications ISL32610E, ISL32611E, ISL32612E

Transcription

1 DTSHEET ISL6E, ISL6E, ISL6E ±6.kV ESD Protected,.8V, Micro Power, + C, /8 Unit Load, RS-8/RS- Differential Receivers FN7869 Rev. October, The ISL6E, ISL6E, ISL6E are ±6.kV IEC6 ESD protected, fractional unit load (UL),.8V powered, single differential receivers (Rx) for balanced (e.g., RS-8) data communication. With their 8µ supply currents, these receivers are optimized for low power applications, and deliver the lowest supply currents of any available single Rx IC (see Figure ). To improve performance in low data rate applications with slow signal transitions, these Rx feature symmetrical switching points (±mv) and increased hysteresis. The symmetrical switching points eliminate the duty cycle distortion introduced by full-failsafe type receivers (see Figure ), while the larger hysteresis increases noise immunity. Receivers present a /8 unit load to the data bus, which allows up to 6 devices on the network for large node count systems (e.g., process automation, remote meter reading systems). The ISL6E/ISL6E Rx output is tri-statable via the RE/RE input. Receiver inputs feature a failsafe-if-open design, which ensures a logic high Rx output if Rx inputs are floating. Data rates up to 6kbps are achievable with this device at =.8V. See Table for a summary of each device s features. For a companion.8v differential transmitter in a SOT- package, reference the ISL6E data sheet. Features Wide Supply Voltage Range V to.6v Ultra Low Quiescent Supply Current µ (Max.) IEC6 ESD Protection on RS-8 us Pins.... ±6.kV - Class ESD Level on all Other Pins >8kV HM Symmetrical Switching Thresholds for Less Duty Cycle Distortion (see Figure ) Larger Hysteresis for Improved Noise Immunity mV Data Rates up to 6kbps (.8V) or kbps (.V) /8 Unit Load llows up to 6 Devices on the RS-8 us Specified for + C Operation Three State Rx Output vailable V Tolerant Logic Inputs Pb-Free (RoHS Compliant) pplications Industrial/Process Control Networks, Factory utomation High Node Count Networks Space Constrained Systems uilding Environmental Control Systems I CC (µ) ISL8E DYNMIC (6kbps) STTIC DYNMIC (6kbps) STTIC ISL6XE (V) FIGURE. ISL6XE REDUCES OPERTING I CC Y FCTOR OF FM PREVIOUS GENERTION RECEIVER ICs, ND OPERTES WITH SUPPLY VOLTGES S LOW S.8V RECEIVER INPUT (V) RECEIVER OUTPUT (V) - - ISL6XE ISL8E =.V, DT RTE = kbps TIME (µs/div) FIGURE. COMPRED WITH FULL-FILSFE RECEIVER, THE SYMMETRICL RX THRESHOLDS OF THE ISL6XE DELIVER LESS OUTPUT DUTY CYCLE DISTORTION WHEN DRIVEN WITH SLOW INPUT SIGNLS FN7869 Rev. Page of October,

2 ISL6E, ISL6E, ISL6E TLE. SUMMRY OF FETURES PRT NUMER CONFIGURTION NO. OF DEVICES LLOWED ON US.8V,.V DT RTE (kbps) Rx ENLE? QUIESCENT I CC (µ) LOW POWER SHUTDOWN? PIN COUNT ISL6E Rx Only 6 6, No 8 No ISL6E Rx Only 6 6, Yes, ctive Low 8 Yes 6 ISL6E Rx Only 6 6, Yes, ctive High 8 Yes 6 Ordering Information PRT NUMER (Notes,,, ) PRT MRKING TEMP. RNGE ( C) PCKGE Tape & Reel (Pb-Free) PKG. DWG. # ISL6EFHZ-T 6F - to + Ld SOT- P.6 ISL6EFHZ-T7 6F - to + Ld SOT- P.6 ISL6EFHZ-T 6F - to + 6 Ld SOT- P6.6 ISL6EFHZ-T7 6F - to + 6 Ld SOT- P6.6 ISL6EFHZ-T 6F - to + 6 Ld SOT- P6.6 ISL6EFHZ-T7 6F - to + 6 Ld SOT- P6.6 NOTES:. Please refer to T7 for details on reel specifications.. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and % matte tin plate plus anneal (e termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-.. For Moisture Sensitivity Level (MSL), please see device information page for ISL6E, ISL6E, ISL6E. For more information on MSL, please see Tech rief T6.. The part marking is located on the bottom of the part. Pin Configurations ISL6E ( LD SOT-) TOP VIEW ISL6E (6 LD SOT-) TOP VIEW 6 R R RE ISL6E (6 LD SOT-) TOP VIEW Truth Table RECEIVING R 6 RE INPUTS OUTPUT RE / RE (Note ) - / +.V / -.V / Inputs Open / X High-Z (Note ) NOTE:. Low Power Shutdown Mode (Note, except for the ISL6E) FN7869 Rev. Page of October,

3 ISL6E, ISL6E, ISL6E Pin Descriptions PIN NUMER PIN NME ISL6E ISL6E ISL6E FUNCTION System power supply input (.8V to.6v). Ground connection. Receiver output: If > by at least.v, is high; if < by.v or more, is low; = High if and are unconnected (floating). ±6.kV IEC6 ESD Protected, inverting differential receiver input. RE - - Receiver output enable. is enabled when RE is low; is high impedance when RE is high. If the enable function isn t needed, connect RE to. RE is internally pulled low. RE - - Receiver output enable. is enabled when RE is high; is high impedance when RE is low. If the enable function isn t needed, connect RE to through a kω or greater resistor. RE is internally pulled high. 6 6 ±6.kV IEC6 ESD Protected, noninverting differential receiver input. Typical Operating Circuit +.8V +.8V +.µf.µf + RE R 6 6 Z Y D DI DE ISL6E ISL6E FN7869 Rev. Page of October,

4 ISL6E, ISL6E, ISL6E bsolute Maximum Ratings to Ground V Input Voltages RE, RE V to 7V, V to +.V Output Voltages V to ( +.V) ESD Rating See Electrical Specifications Table page Latch-up (per JESD78, Level, Class ) C Thermal Information Thermal Resistance (Typical) J ( C/W) JC ( C/W) Ld SOT- Package (Note 6, 7) Ld SOT- Package (Note 6, 7) Maximum Junction Temperature (Plastic Package) C Storage Temperature Range C to + C Pb-Free Reflow Profile see link below Recommended Operating Conditions Temperature C to + C Supply Voltage V to.v Common Mode Input Voltage =.8V V to +V =.V V to +V CUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 6. J is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech rief T79 for details. 7. For JC, the case temp location is taken at the package top center. ( Electrical Specifications Test Conditions: =.8V; Unless Otherwise Specified. Typicals are at =.8V, T = + C. oldface limits apply over the operating temperature range, - C to + C. (Note 9) PRMETER SYMOL TEST CONDITIONS DC CHRCTERISTICS TEMP ( C) MIN (Note 8) TYP MX (Note 8) Logic Input High Voltage (Note ) V IH RE, RE =.8V Full. - - V V.6V Full - - V Logic Input Low Voltage (Note ) V IL RE, RE =.8V Full - -. V V.6V Full V Logic Input Current (Note ) I IN RE, RE =.8V Full -6-6 µ.6v Full - - µ Input Current (, ) (Note ) I IN = V or.8v V IN = V Full µ V IN = -V Full µ = V or.6v V IN = V Full - - µ V IN = -7V Full µ Receiver Differential Threshold V TH -V V CM V =.8V Full V Voltage -7V V CM V V.6V Full V Receiver Input Hysteresis V TH V CM = V =.8V Full mv V.6V Full mv Receiver Output High Voltage V OH I O = -m, V ID = mv Full V Receiver Output Low Voltage V OL I O = m, V ID = -mv Full - -. V Three-State (High Impedance) Receiver Output Current (Note ) I OZR V V O Full - - µ Receiver Short-Circuit Current I OSR V V O Full - - m No-Load Supply Current I CC RE = V or RE = =.8V Full - 8 µ V.6V Full - - µ Shutdown Supply Current I SHDN ISL6, RE =,.8V Full - - µ (Notes, ) ISL6, RE = V =.8V Full µ.6v Full - - µ UNITS FN7869 Rev. Page of October,

5 ISL6E, ISL6E, ISL6E Electrical Specifications Test Conditions: =.8V; Unless Otherwise Specified. Typicals are at =.8V, T = + C. oldface limits apply over the operating temperature range, - C to + C. (Note 9) (Continued) PRMETER SYMOL TEST CONDITIONS TEMP ( C) MIN (Note 8) TYP MX (Note 8) UNITS SWITCHING CHRCTERISTICS Maximum Data Rate f MX V ID = ±V, V CM = V, =.8V Full kbps (Figure ) V.6V Full - - kbps Receiver Input to Output Delay t PLH, t PHL (Figure ) =.8V Full - ns =.V - - ns Receiver Skew t PLH - t PHL t SKD (Figure ) =.8V Full - ns =.V ns Receiver Enable to Output High t ZH C L = pf, SW =, =.8V Full - ns (Figure, Note ) =.V - - ns Receiver Enable to Output Low t ZL C L = pf, SW =, =.8V Full - ns (Figure, Note ) =.V - - ns Receiver Disable from Output High t HZ C L = pf, SW =, =.8V Full - 7 ns (Figure, Note ) =.V ns Receiver Disable from Output Low t LZ C L = pf, SW =, =.8V Full - 7 ns (Figure, Note ) =.V ns ESD PERFORMNCE RS-8 Pins (, ) IEC6--, ir-gap Discharge Method - ±6. - kv IEC6--, Contact Discharge Method - ±9 - kv Human ody Model, From us Pins to - ±6. - kv ll Pins Human ody Model (Tested per JESD-E) - ±8 - kv Machine Model (Tested per JESD--) - ± - V NOTES: 8. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design. 9. Currents into device pins are positive; currents out of device pins are negative. Voltages are referenced to ground unless otherwise specified.. The ISL6E enters SHDN whenever RE switches high, and the ISL6E enters SHDN whenever RE switches low.. Devices meeting these limits are denoted as /8 unit load (/8 UL) transceivers. The RS-8 standard allows up to Unit Loads on the bus, so there can be 6 /8 UL devices on a bus.. Not applicable to the ISL6E. Test Circuits and Waveforms / RE / RE R pf V V +.V -.V t PLH t PHL SIGNL GENERTORS % % V OH V OL FIGURE. TEST CIRCUIT FIGURE. MESUREMENT POINTS FIGURE. RECEIVER PPGTION DELY ND DT RTE FN7869 Rev. Page of October,

6 ISL6E, ISL6E, ISL6E Test Circuits and Waveforms (Continued) SIGNL GENERTOR RE / RE R kω pf SW PRMETER SW VCC RE RE t ZH % % OUTPUT HIGH % % % t HZ V V V V OH OH -.V V t HZ +V t ZL t LZ t LZ -V t ZH +V t ZL -V % OUTPUT LOW V OL +.V V OL FIGURE. TEST CIRCUIT FIGURE. MESUREMENT POINTS FIGURE. RECEIVER ENLE ND DISLE TIMES (EXCLUDING ISL6E) FN7869 Rev. Page 6 of October,

7 ISL6E, ISL6E, ISL6E pplication Information Features These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is ±mv, as required by the RS- and RS-8 standards. These receivers symmetrical ±mv switching thresholds deliver less duty cycle distortion than similar receivers with a full-failsafe design (i.e., skewed low/high input thresholds, (such as -mv/-mv) which increase the high bit width). This distortion is especially noticeable when the Rx is driven by slow input transitions (see Figure ). The symmetrical input thresholds also allow more room for increased input hysteresis, thereby increasing the Rx noise immunity. The 7mV hysteresis of this Rx is twice the amount specified for most full-failsafe devices. Receiver input resistance of 96kΩ surpasses the RS- specification of kω, and is eight times the RS-8 Unit Load (UL) requirement of kω minimum. Thus, these products are known as one-eighth UL receivers, and there can be up to 6 of these devices on a network while still complying with the RS-8 loading specification. Receiver inputs function with common mode voltages (CMV) of ±V with =.8V, and with CMVs of -7V to +V for.7v. ll the receivers include a failsafe-if-open function that guarantees a high level receiver output if the receiver inputs are unconnected (floating). s mentioned previously, the full-failsafe function is not implemented in order to deliver output duty cycles that better match the input. Receivers support data rates up to 6kbps ( =.8V) or kbps ( V), and receiver outputs of the ISL6E and ISL6E are three-statable via the active low RE or active high RE input. Data Rate Recommendations When coupled with the ISL6E or ISL6E.8V transmitter ICs, these receivers are useful for networks up to (m) long, or for data rates up to kbps. For distances with =.8V, the ISL6E can be used with any of these receivers at data rates kbps. With =.V, any transmitter / receiver combination operates over at rates up to 8kbps. Shorter networks allow data rates up to kbps, as shown in Figures 9,, and. Network termination resistors are only recommended for networks operating at.7v, and using termination resistors may allow for higher data rates. Low Power Shutdown Mode (ISL6E and ISL6E) These devices use a fraction of the power required by most differential receivers (see Figure on page ), but they also include a shutdown feature that reduces the already low quiescent I CC even further. The ISL6E and ISL6E enter shutdown whenever the receiver is disabled (RE = or RE = ). ESD Protection ll pins on these devices include class (>6kV) Human ody Model (HM) ESD protection structures, but the bus pins (Rx inputs) incorporate advanced structures allowing them to survive ESD events in excess of ±6.kV HM and ±6.kV IEC6. The bus pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, and without degrading the common mode range. This built-in ESD protection eliminates the need for board-level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present. IEC6-- Testing The IEC6 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the bus pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The smaller value current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HM test. The extra ESD protection built into this device s bus pins allows the design of equipment meeting level criteria without the need for additional board-level protection on the I/O port. IR-GP DISCHRGE TEST METHOD For the air-gap discharge test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The and pins withstand ±6.kV air-gap discharges. CONTCT DISCHRGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than ±9kV. The ISL6E, ISL6E, ISL6E survive ±9kV contact discharges on the bus pins. FN7869 Rev. Page 7 of October,

8 ISL6E, ISL6E, ISL6E Typical Performance Curves RECEIVER OUTPUT CURRENT (m) =.8V + C 8 +8 C 6 + C LOW HIGH - + C + C - T = + C; Unless Otherwise Specified RECEIVER OUTPUT CURRENT (m) =.V + C LOW - +8 C + C - +8 C + C HIGH + C RECEIVER OUTPUT VOLTGE (V) FIGURE. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTGE ( =.8V) RECEIVER OUTPUT VOLTGE (V) FIGURE 6. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTGE ( =.V) I CC (µ) =.V =.8V RE = V, RE = I CC (µ) kbps 6kbps 8kbps 9.6kbps 6 7 RECEIVER INPUTS (V) RECEIVER OUTPUT (V) TEMPERTURE ( C) - - FIGURE 7. STTIC SUPPLY CURRENT vs TEMPERTURE DI - RD = TIME (µs/div) FIGURE 9. ISL6E ND ISL6E PERFORMNCE WITH =.8V, 8kbps, (6m) CT CLE DRIVER INPUT (V) RECEIVER INPUTS (V) RECEIVER OUTPUT (V) (V) FIGURE 8. DYNMIC SUPPLY CURRENT vs SUPPLY VOLTGE T DIFFERENT DT RTES DI - RD = TIME (µs/div) FIGURE. ISL6E ND ISL6E PERFORMNCE WITH =.V, 6kbps, (9m) CT CLE DRIVER INPUT (V) FN7869 Rev. Page 8 of October,

9 ISL6E, ISL6E, ISL6E Typical Performance Curves T = + C; Unless Otherwise Specified (Continued) RECEIVER INPUTS (V) RECEIVER OUTPUT (V) - - DI - RD = TIME (µs/div) FIGURE. ISL6E ND ISL6E PERFORMNCE WITH =.8V, 6kbps, (m) CT CLE DRIVER INPUT (V) RECEIVER INPUTS (V) RECEIVER OUTPUT (V) DI - RD = TIME (µs/div) FIGURE. ISL6E ND ISL6E PERFORMNCE WITH =.V, kbps, (6m) CT CLE DRIVER INPUT (V) Die Characteristics SUSTRTE POTENTIL (POWERED UP) : PCESS: Si Gate icmos FN7869 Rev. Page 9 of October,

10 ISL6E, ISL6E, ISL6E Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DTE REVISION CHNGE // FN7869. Initial Release Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to for a complete list of Intersil product families. For a complete listing of pplications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL6E, ISL6E, ISL6E To report errors or suggestions for this datasheet, please go to: FITs are available from our website at: Copyright Intersil mericas LLC. ll Rights Reserved. ll trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. ccordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN7869 Rev. Page of October,

11 ISL6E, ISL6E, ISL6E Package Outline Drawing P.6 LED SMLL OUTLINE TRNSISTOR PLSTIC PCKGE Rev, /..8 (.9) (.8) M C.. (.9) TOP VIEW SEE DETIL X END VIEW... MIN. (.) C SETING PLNE C SETING PLNE C.. (.6) 8 GUGE PLNE (.) SIDE VIEW DETIL "X" x (.6) x (.) (.) NOTES:. Dimensioning and tolerance per SME Y.M-99.. Package conforms to EIJ SC-7 and JEDEC MO78.. Package length and width are exclusive of mold flash, protrusions, or gate burrs.. Footlength measured at reference to gauge plane. (x.9). Lead thickness applies to the flat section of the lead between.8mm and.mm from the lead tip. 6. Controlling dimension: MILLIMETER. Dimensions in ( ) for reference only. (.9) TYPICL RECOMMENDED LND PTTERN FN7869 Rev. Page of October,

12 ISL6E, ISL6E, ISL6E Package Outline Drawing P6.6 6 LED SMLL OUTLINE TRNSISTOR PLSTIC PCKGE Rev, / D /-. PIN INDEX RE. C x (.6) TOP VIEW. ±.. M C - D SEE DETIL X END VIEW.9 ±. TYP ( PLCS). +./-. C. MX (.) GUGE PLNE. C SETING PLNE SIDE VIEW.-. DETIL "X".±. (.9) (.6) (.) NOTES: (.)..... Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to SME Y.M-99. Dimension is exclusive of mold flash, protrusions or gate burrs. Foot length is measured at reference to guage plane. Package conforms to JEDEC MO-78. TYPICL RECOMMENDED LND PTTERN FN7869 Rev. Page of October,