DATASHEET ISL8488E, ISL8489E, ISL8490E, ISL8491E. Features. Applications

Transcription

1 TSHEET ISL888E, ISL889E, ISL89E, ISL89E ±kv ES Protected, V, Low Power, High Speed and Slew ate Limited, Full uplex, S-8/S- Transceivers FN67 ev.. July 6, 7 The ISL888E, ISL889E, ISL89E, ISL89E devices are ES protected, icmos, V powered, single transceivers that meet both the S-8 and S- standards for balanced communication. Each driver output and receiver input is protected against ±kv ES strikes, without latch-up. Unlike competitive versions, these Intersil devices are specified for % tolerance supplies (.V to.v). These devices are configured for full duplex (separate x input and Tx output pins) applications, so they are ideal for S- networks requiring high ES tolerance on the bus pins. The ISL888E, ISL89E are 8 Ld versions without x and Tx output enables. The other two versions include x and Tx output enable pins in a standard Ld pinout. The ISL888E, ISL889E utilize slew rate limited drivers which reduce EMI, and minimize reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications. ata rates up to Mbps are achievable by using the ISL89E, ISL89E, which feature higher slew rates. The devices present a single unit load to the S-8 bus, which allows a total of transmitters and receivers on the network. For /8 unit load versions (6 devices on the bus), please refer to the ISL89E, ISL9E data sheet. eceiver (x) inputs feature a fail-safe if open design, which ensures a logic high x output if x inputs are floating. river (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. dditionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. Features S-8 I/O Pin ES Protection kv HM - Class ES Level on all Other Pins >7kV HM High ata ates (ISL89E, ISL89E).. up to Mbps Slew ate Limited for Error Free ata Transmission (ISL888E, ISL889E) Single Unit Load llows up to evices on the us (See ISL89E, ISL9E for 6 evices on us) Low Quiescent Current: - µ (ISL888E) - µ (ISL889E) - 7µ (ISL89E, ISL89E) -7V to +V Common Mode Input Voltage ange Three-State x and Tx Outputs (Except ISL888E, ISL89E) Full uplex Pinout Operates from a Single +V Supply (% Tolerance) Current Limiting and Thermal Shutdown for river Overload Protection Pb-Free Plus nneal vailable (ohs Compliant) pplications Factory utomation Security Networks uilding Environmental Control Systems Industrial/Process Control Networks Level Translators (e.g., S- to S-) S- Extension Cords TLE. SUMM OF FETUES PT NUME HLF/FULL UPLEX HIGH ES? NO. OF EVICES LLOWE ON US T TE (Mbps) SLEW-TE LIMITE? ECEIVE/ IVE ENLE? QUIESCENT I CC ( ) PIN COUNT ISL888E Full es. es No 8 ISL889E Full es. es es ISL89E Full es No No 7 8 ISL89E Full es No es 7 FN67 ev.. Page of July 6, 7

2 ISL888E, ISL889E, ISL89E, ISL89E Pinouts VCC GN NC E E GN GN ISL888E, ISL89E (8 L SOIC) TOP VIEW ISL889E, ISL89E ( L SOIC) TOP VIEW VCC NC 9 8 NC Ordering Information PT NUME (Note ) PT MKING TEMP. NGE ( C) PCKGE PKG. WG. # ISL888EI 888 EI - to +8 8 Ld SOIC M8. ISL888EI (Note ) 888 EI - to +8 8 Ld SOIC (Pb-free) M8. ISL889EI ISL889EI - to +8 Ld SOIC M. ISL889EI (Note ) ISL89EI (Note ) 889EI - to +8 Ld SOIC (Pb-free) 89E I - to +8 8 Ld SOIC (Pb-free) M. M8. ISL89EI ISL89EI - to +8 Ld SOIC M. ISL89EI (Note ) 89EI - to +8 Ld SOIC (Pb-free) M. NOTES:. dd -T suffix for tape and reel. Please refer to T7 for details on reel specifications.. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and % matte tin plate termination finish, which are ohs compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEEC J ST-. Truth Tables (For ISL888E, ISL89E, only the E = and E = entries are valid) TNSMITTING ECEIVING INPUTS OUTPUTS INPUTS OUTPUT E E X X X X High- High- Pin escriptions PIN E E - X +.V X -.V X Inputs Open X X High- FUNCTION E E GN VCC NC eceiver output: If > by at least.v, is high; If < by.v or more, is low; = High if and are unconnected (floating). eceiver output enable. is enabled when E is low; is high impedance when E is high. river output enable. The driver outputs, and, are enabled by bringing E high. They are high impedance when E is low. river input. low on forces output low and output high. Similarly, a high on forces output high and output low. Ground connection. kv HM ES Protected, Non-inverting receiver input. kv HM ES Protected, Inverting receiver input. kv HM ES Protected, Non-inverting driver output. kv HM ES Protected, Inverting driver output. System power supply input (.V to.v). No Connection. FN67 ev.. Page of July 6, 7

3 ISL888E, ISL889E, ISL89E, ISL89E Typical Operating Circuit +V ISL888E, ISL89E +V +.µf +.µf 8 7 T 6 6 T 7 8 GN GN +V ISL889E, ISL89E +V +.µf +.µf T 9 E E E E 9 T GN 6, 7 GN 6, 7 FN67 ev.. Page of July 6, 7

4 ISL888E, ISL889E, ISL89E, ISL89E bsolute Maximum atings to GN V Input Voltages, E, E V to ( +.V) Input/Output Voltages,,, V to +.V V to ( +.V) Short Circuit uration, Continuous ES ating See Specification Table Thermal Information Thermal esistance (Typical) J ( C/W) 8 Ld SOIC Package (Note ) Ld SOIC Package (Note ) Maximum Junction Temperature (Plastic Package) C Maximum Storage Temperature ange C to + C Pb-free reflow profile see link below Operating Conditions Temperature ange C to +8 C CUTION: o not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE:. J is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech rief T79 for details. Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T = + C, (Note ). PMETE SMOL TEST CONTIONS C CHCTEISTICS TEMP ( C) MIN (NOTE 9) TP MX (NOTE 9) UNITS river ifferential V OUT (no load) V O Full - - V river ifferential V OUT (with load) V O = (S-) (Figure ) Full - V = 7 (S-8) (Figure ) Full.. V Change in Magnitude of river ifferential V OUT for Complementary Output States V O = 7 or (Figure ) Full -.. V river Common-Mode V OUT V OC = 7 or (Figure ) Full - - V Change in Magnitude of river Common-Mode V OUT for Complementary Output States V OC = 7 or (Figure ) Full -.. V Logic Input High Voltage V IH E,, E Full - - V Logic Input Low Voltage V IL E,, E Full V Logic Input Current I IN Full - - E, E (Note 8) Full - - Input Current (, ) (Note 7) I IN E = V, = V or.v to.v V IN = V Full - - m V IN = -7V Full m river Three-State Output Current (, ) I O E = V, -7V V O V (Note 8) Full - - eceiver ifferential Threshold Voltage V TH -7V V CM V Full V eceiver Input Hysteresis V TH V CM = V mv eceiver Output High Voltage V OH I O = -m, V I = mv Full. - - V eceiver Output Low Voltage V OL I O = m, V I = mv Full - -. V eceiver Three-State Output Current I O E =,.V V O.V (Note 8) Full - - eceiver Input esistance IN -7V V CM V Full - - k No-Load Supply Current (Note ) I CC ISL888E, = V or Full - ISL889E, E,, E = V or Full - 9 ISL89E/ISL89E, E,, E = V or Full river Short-Circuit Current, V O = High or Low I OS E =, -7V V or V V (Note 6) Full - m FN67 ev.. Page of July 6, 7

5 ISL888E, ISL889E, ISL89E, ISL89E Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T = + C, (Note ). (Continued) PMETE SMOL TEST CONTIONS eceiver Short-Circuit Current I OS V V O Full 7-8 m SWITCHING CHCTEISTICS (ISL888E, ISL889E) river Input to Output elay t PLH, t PHL FF =, C L = pf (Figure ) Full ns river Output Skew t SKEW FF =, C L = pf (Figure ) Full ns river ifferential ise or Fall Time t, t F FF =, C L = pf (Figure ) Full 6 ns river Enable to Output High t H C L = pf, SW = GN (Figure, Note 8) Full ns river Enable to Output Low t L C L = pf, SW = (Figure, Note 8) Full 86 ns river isable from Output High t H C L = pf, SW = GN (Figure, Note 8) Full 66 ns river isable from Output Low t L C L = pf, SW = (Figure, Note 8) Full 6 ns eceiver Input to Output elay t PLH, t PHL (Figure ) Full ns eceiver Skew t PLH - t PHL t SK (Figure ) ns eceiver Enable to Output High t H C L = pf, SW = GN (Figure, Note 8) Full - ns eceiver Enable to Output Low t L C L = pf, SW = (Figure, Note 8) Full - ns eceiver isable from Output High t H C L = pf, SW = GN (Figure, Note 8) Full - ns eceiver isable from Output Low t L C L = pf, SW = (Figure, Note 8) Full - ns Maximum ata ate f MX Full - - kbps SWITCHING CHCTEISTICS (ISL89E, ISL89E) river Input to Output elay t PLH, t PHL FF =, C L = pf (Figure ) Full ns river Output Skew t SKEW FF =, C L = pf (Figure ) Full - ns river ifferential ise or Fall Time t, t F FF =, C L = pf (Figure ) Full ns river Enable to Output High t H C L = pf, SW = GN (Figure, Note 8) Full - 7 ns river Enable to Output Low t L C L = pf, SW = (Figure, Note 8) Full - 7 ns river isable from Output High t H C L = pf, SW = GN (Figure, Note 8) Full - 7 ns river isable from Output Low t L C L = pf, SW = (Figure, Note 8) Full - 7 ns eceiver Input to Output elay t PLH, t PHL (Figure ) Full 9 ns eceiver Skew t PLH - t PHL t SK (Figure ) - - ns eceiver Enable to Output High t H C L = pf, SW = GN (Figure, Note 8) Full - 9 ns eceiver Enable to Output Low t L C L = pf, SW = (Figure, Note 8) Full - 9 ns eceiver isable from Output High t H C L = pf, SW = GN (Figure, Note 8) Full - 9 ns eceiver isable from Output Low t L C L = pf, SW = (Figure, Note 8) Full - 9 ns Maximum ata ate f MX Full - - Mbps ES PEFOMNCE S-8 Pins (,,, ) Human ody Model - - kv ll Other Pins - > 7 - kv NOTES:. ll currents into device pins are positive; all currents out of device pins are negative. ll voltages are referenced to device ground unless otherwise specified.. Supply current specification is valid for loaded drivers when E = V. 6. pplies to peak current. See Typical Performance Curves on page 9 for more information. 7. evices meeting these limits are denoted as single unit load ( UL) transceivers. The S-8 standard allows up to Unit Loads on the bus. 8. Not applicable to the ISL888E, ISL89E. 9. Parts are % tested at + C. Over-temperature limits established by characterization and are not production tested. TEMP ( C) MIN (NOTE 9) TP MX (NOTE 9) UNITS FN67 ev.. Page of July 6, 7

6 ISL888E, ISL889E, ISL89E, ISL89E Test Circuits and Waveforms E V O V OC FIGUE. IVE V O N V OC.V.V V V SIGNL GENETO E FF C L = pf C L = pf OUT () OUT () t PLH t PHL t PHL % % t PLH % % V OH V OL VOH V OL FF OUT ( - ) 9% 9% % % t t F +V O -V O SKEW = t PLH ( or ) - t PHL ( or ) FIGUE. TEST CICUIT FIGUE. MESUEMENT POINTS FIGUE. IVE PPGTION EL N FFEENTIL TNSITION TIMES FN67 ev.. Page 6 of July 6, 7

7 ISL888E, ISL889E, ISL89E, ISL89E Test Circuits and Waveforms (Continued) SIGNL GENETO E C L SW GN PMETE OUTPUT E SW C L (pf) t H / X / GN t L / X / t H / X / GN t L / X / E t H OUT (, ) t L OUT (, ) V.V.V V t H OUTPUT HIGH V V OH OH -.V.V V t L.V V OL +.V V OL OUTPUT LOW FIGUE. TEST CICUIT FIGUE. MESUEMENT POINTS FIGUE. IVE ENLE N SLE TIMES (EXCLUNG ISL888E, ISL89E) +.V E pf.v.v V V t PLH t PHL SIGNL GENETO % % V FIGUE. TEST CICUIT FIGUE. MESUEMENT POINTS FIGUE. ECEIVE PPGTION EL SIGNL GENETO E k pf SW PMETE E SW t H X +.V GN GN E t H t L V.V.V V t H OUTPUT HIGH V V OH OH -.V.V V t L t L X -.V t H X +.V GN t L X -.V.V OUTPUT LOW V OL +.VV OL FIGUE. TEST CICUIT FIGUE. MESUEMENT POINTS FIGUE. ECEIVE ENLE N SLE TIMES (EXCLUNG ISL888E, ISL89E) FN67 ev.. Page 7 of July 6, 7

8 ISL888E, ISL889E, ISL89E, ISL89E pplication Information S-8 and S- are differential (balanced) data transmission standards for use in long haul or noisy environments. S- is a subset of S-8, so S-8 transceivers are also S- compliant. S- is a point-to-multipoint (multidrop) standard, which allows only one driver and up to (assuming one unit load devices) receivers on each bus. S-8 is a true multipoint standard, which allows up to one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the S-8 specification requires that drivers must handle bus contention without sustaining any damage. nother important advantage of S-8 is the extended common mode range (CM), which specifies that the driver outputs and receiver inputs withstand signals that range from +V to -7V. S- and S-8 are intended for runs as long as, so the wide CM is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. eceiver Features These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is ±mv, as required by the S- and S-8 specifications. eceiver input resistance surpasses the S- specification of k, and meets the S-8 Unit Load requirement of k minimum. eceiver inputs function with common mode voltages as great as 7V outside the power supplies (i.e., +V and -7V), making them ideal for long networks where induced voltages are a realistic concern. ll the receivers include a fail-safe if open function that guarantees a high level receiver output if the receiver inputs are unconnected (floating). eceivers easily meet the data rate supported by the corresponding driver. ISL889E/ISL89E receiver outputs are three-statable via the active low E input. river Features The S-8/S- driver is a differential output device that delivers at least.v across a load (S-8), and at least V across a load (S-). The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. ISL889E/ISL89E driver outputs are threestatable via the active high E input. The ISL888E/ISL889E driver outputs are slew rate limited to further reduce EMI, and to minimize reflections in unterminated or improperly terminated networks. ata rates on these slew rate limited versions are a maximum of kbps. Outputs of ISL89E/ISL89E drivers are not limited, so faster output transition times allow data rates of at least Mbps. ata ate, Cables, and Terminations Twisted pair is the cable of choice for S-8/S- networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. S-8/S- are intended for network lengths up to, but the maximum system data rate decreases as the transmission length increases. evices operating at Mbps are limited to lengths of a few hundred feet, while the kbps versions can operate at full data rates with lengths in excess of. Proper termination is imperative, when using the Mbps devices, to minimize reflections. Short networks using the kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically ) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. uilt-in river Overload Protection s stated previously, the S-8 specification requires that drivers survive worst case bus contentions undamaged. The ISL8xxE devices meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never exceeds the S-8 specification, even at the common mode voltage range extremes. dditionally, these devices utilize a foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short circuit condition, ISL8xxE devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically reenable after the die temperature drops about. If the contention persists, the thermal shutdown/reenable cycle repeats until the fault is cleared. eceivers stay operational during thermal shutdown. ES Protection ll pins on these devices include class Human ody Model (HM) ES protection structures, but the S-8 pins (driver outputs and receiver inputs) incorporate advanced structures allowing them to survive ES events in excess of FN67 ev.. Page 8 of July 6, 7

9 ISL888E, ISL889E, ISL89E, ISL89E ±kv HM. The S-8 pins are particularly vulnerable to ES damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ES event that might destroy unprotected ICs. These new ES structures protect the device whether or not it is powered up, protect without allowing any latch-up mechanism to activate, and without degrading the S-8 common mode range of -7V to +V. This built-in ES protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present. Typical Performance Curves = V, T = + C; Unless Otherwise Specified. 9.6 IVE OUTPUT CUENT (m) FFEENTIL OUTPUT VOLTGE (V) FF = FF = FFEENTIL OUTPUT VOLTGE (V) FIGUE 6. IVE OUTPUT CUENT vs FFEENTIL OUTPUT VOLTGE TEMPETUE ( C) FIGUE 7. IVE FFEENTIL OUTPUT VOLTGE vs TEMPETUE OUTPUT CUENT (m) O = LOW ISL89E/ISL89E ISL888E/ISL889E ISL89E/ISL89E ISL888E/ISL889E O = HIGH OUTPUT VOLTGE (V) FIGUE 8. IVE OUTPUT CUENT vs SHOT CICUIT VOLTGE I CC (µ) ISL89E/ISL89E, E = X, E = X ISL889E, E = X, E = X ISL888E TEMPETUE ( C) FIGUE 9. SUPPL CUENT vs TEMPETUE FN67 ev.. Page 9 of July 6, 7

10 ISL888E, ISL889E, ISL89E, ISL89E Typical Performance Curves = V, T = + C; Unless Otherwise Specified. 7 PPGTION EL (ns) t PLH t PLH t PHL t PHL SKEW (ns) t PLH - t PHL t PHL - t PLH CSS PT. OF N TO CSS PT. OF N TEMPETUE ( C) FIGUE. IVE PPGTION EL vs TEMPETUE (ISL888E/ISL889E) TEMPETUE ( C) FIGUE. IVE SKEW vs TEMPETUE (ISL888E/ISL889E) PPGTION EL (ns) 8 6 t PLH t PLH t PHL 8 t PHL TEMPETUE ( C) FIGUE. IVE PPGTION EL vs TEMPETUE (ISL89E/ISL89E) SKEW (ns) t PHL - t PLH t PLH - t PHL CSS PT. OF N TO CSS PT. OF N TEMPETUE ( C) FIGUE. IVE SKEW vs TEMPETUE (ISL89E/ISL89E) ECEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) ECEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) IVE OUTPUT (V) TIME (ns/v) FIGUE. IVE N ECEIVE WVEFOMS, LOW TO HIGH (ISL888E/ISL889E) IVE OUTPUT (V) TIME (ns/v) FIGUE. IVE N ECEIVE WVEFOMS, HIGH TO LOW (ISL888E/ISL889E) FN67 ev.. Page of July 6, 7

11 ISL888E, ISL889E, ISL89E, ISL89E Typical Performance Curves = V, T = + C; Unless Otherwise Specified. ECEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) ECEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) IVE OUTPUT (V) TIME (ns/v) FIGUE 6. IVE N ECEIVE WVEFOMS, LOW TO HIGH (ISL89E/ISL89E) IVE OUTPUT (V) TIME (ns/v) FIGUE 7. IVE N ECEIVE WVEFOMS, HIGH TO LOW (ISL89E/ISL89E) ie Characteristics SUSTTE POTENTIL (POWEE UP): GN TNSISTO COUNT: 8 PCESS: Si Gate icmos FN67 ev.. Page of July 6, 7

12 ISL888E, ISL889E, ISL89E, ISL89E Small Outline Plastic Packages (SOIC) N INEX E e.(.) M C M E C- SETING PLNE S H.(.) M.(.) L M h x NOTES:. Symbols are defined in the MO Series Symbol List in Section. of Publication Number 9.. imensioning and tolerancing per NSI.M-98.. imension does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed.mm (.6 inch) per side.. imension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed.mm (. inch) per side.. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. L is the length of terminal for soldering to a substrate. 7. N is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width, as measured.6mm (. inch) or greater above the seating plane, shall not exceed a maximum value of.6mm (. inch).. Controlling dimension: MILLIMETE. Converted inch dimensions are not necessarily exact. C M8. (JEEC MS-- ISSUE C) 8 LE NW O SMLL OUTLINE PLSTIC PCKGE INCHES MILLIMETES SMOL MIN MX MIN MX NOTES C E e. SC.7 SC - H h L N ev. 6/ FN67 ev.. Page of July 6, 7

13 ISL888E, ISL889E, ISL89E, ISL89E Small Outline Plastic Packages (SOIC) N INEX E e.(.) M C M E C- SETING PLNE S H.(.) NOTES:. Symbols are defined in the MO Series Symbol List in Section. of Publication Number 9.. imensioning and tolerancing per NSI.M-98.. imension does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed.mm (.6 inch) per side.. imension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed.mm (. inch) per side.. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. L is the length of terminal for soldering to a substrate. 7. N is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width, as measured.6mm (. inch) or greater above the seating plane, shall not exceed a maximum value of.6mm (. inch).. Controlling dimension: MILLIMETE. Converted inch dimensions are not necessarily exact. µ.(.) M L M h x o C M. (JEEC MS-- ISSUE C) LE NW O SMLL OUTLINE PLSTIC PCKGE INCHES MILLIMETES SMOL MIN MX MIN MX NOTES C E e. SC.7 SC - H h L N 7 o 8 o o 8 o - ev. /9 Copyright Intersil mericas LLC -7. ll ights eserved. ll trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. ccordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN67 ev.. Page of July 6, 7