Getting Started with Qucs
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- Joanna Boone
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1 Getting Started with Qucs Graham Edge University of Toronto After downloading Qucs, installing it, and running for the first time you should see a window that looks something like this: The large yellow coloured area is the blank canvas on which you will build circuits, and the white column to the left is a set of menus. There are 4 different menu tabs: Projects, Content, Components, and Libraries. Starting a New Project In Qucs, all of your work is grouped into projects in the image above the Projects tab is open showing three projects that have already been created on my PC. To start a new project, click New, give your project a title like Voltage Divider, and hit Create.
2 Now the project is created, and the menu on the left has jumped to the Content tab to show us the contents of this project. Currently we can see many categories of files that could be included in the project ( Datasets, Verilog, Schematics ) but there are no actual files associated with the project yet. Even though there is no schematic in the yellow window yet, we can start off by saving the file to our new project. Click File -> Save on the top menu and save the (blank) schematic with a name like Resistive Voltage Divider. Qucs will by default want to save the file in a subfolder (like.\voltage_divider_prj\) created for the project that you are working in.
3 After saving we can see the schematic file appear as part of the project in the Contents tab of the menu:
4 Placing Components To start building your circuit, open the Components tab of the menu: There is a drop-down menu with many categories of components, for example: lumped components contains Resistors, Capacitors, Inductors sources contains DC and AC voltage supplies nonlinear components contains Diodes, Transistors, and Op- Amps Select components by selecting from the component menu and then left-clicking in the schematic. You can rotate components before placing them by right-clicking in the schematic. To wire components together, use the Wire tool ( Insert -> Wire, or Ctrl+E, or the icon in the Toolbar) and left-click the desired start and end points of the wire. Right-clicking before selecting the end point of a right-angled wire
5 section will flip its orientation, which can be helpful to keep the wires from cutting right through the rest of your schematic. Here I have assembled a resistive voltage divider connected to an AC voltage source. To see the divided AC signal, a load would be connected between R1 and R2. If we want to see what the signal at this point would look like, we should add a Wire Label ( Insert -> Wire Label, or Ctrl+L, or in the Toolbar), and call it something like divided_voltage.
6 Simulating Circuit Behaviour Now to see what divided_voltage will look like, we want to get Qucs to simulate the circuit that has been assembled. To do this we need to add simulation instructions to the schematic. The possible simulations are located in the Components menu tab, and are found by selecting simulations in the drop-down menu.
7 If we want to look at the voltage at divided_voltage over time, we can use Transient Simulation. If we want to see how the RMS value of divided_voltage varies as a function of the AC frequency, we can use AC Simulation. DC Simulation isn t of much use here since there are no DC voltages sources in the schematic. Adding an AC Simulation and double-clicking it brings up some options for the lowest and highest frequencies to consider, and how many points to simulate in between these limits.
8 After setting the simulation options, we can ask Qucs to perform the simulation using Simulation -> Simulate, or F2, or the Simulate button in the toolbar. If there are no problems with the simulation, it should complete very quickly and take you to a blank page for plotting of results. This page should have the same name as your schematic, but with the.dpl file extension, and will be displayed as a separate tab for the main window. If there are issues (e.g. the type simulation was not specified by adding to the schematic) then an error will be displayed instead.
9 When the simulation is complete the Components tab should also automatically switch to display a choice of diagrams that can be inserted to visualize the simulation results. For an AC simulation, a Cartesian plot is useful to see the RMS value of divided_voltage as function of the AC frequency. Placing a Cartesian plot in the blank page will immediately display plot options: We want to plot divided_voltage, so double-click this in the list of available datasets. Its also a good idea to go to the Properties tab here to choose a logarithmical X Axis Grid (much better for the large
10 range of frequencies included in the simulation. Clicking OK should generate the desired plot. It may need to be resized to make all of the x-axis values visible. Here the plot isn t very exciting, the divided signal has half the RMS voltage of the input signal, for all AC frequencies. Plotting Voltage vs Time To see the input and output signal of the voltage divider over time, only a few changes need to be made to the schematic. First, a fixed AC frequency needs to be chosen, which is done by double-clicking the AC source.
11 Next, another kind of simulation instructions needs to be added to the schematic. Adding a transient simulation will let us watch voltage at selected points as a function of time. The simulation instructions should be changed to make sure that enough time will be calculated to display a full AC cycle. Lastly, to see the voltage input and output of the divider separately, its useful to add another label to the schematic between the AC source and R1:
12 After telling Qucs to simulate this schematic again, we can add another Cartesian plot with the new datasets of input_voltage and divided_voltage vs. time. Notice that there is no phase difference between the input and output signals, since the impedance of the resistive divider is completely real (i.e. the circuit has zero reactance).
13 Another Example To look at the behaviour vs. frequency of an RC low-pass and high-pass filter, we can build both of them side by side in the same schematic. Setting the AC simulation to a logarithmically sample the range of AC frequencies is helpful here to get smooth output.
14 Plotting the values of vout_lp and vouthp, we can see the expected behaviour. To see how the range of transmitted and attenuated frequencies depends on the particular values of R and C, you can just change the values in the schematic and re-run the simulation. To keep from going back and forth between the two windows with the schematic and the plotted output, it can be handy to place the plots right in the schematic window. Even with the plots placed right in the schematic, re-running the simulation will keep directing you to the separate plotting window, unless you go to File -> Document Settings and then uncheck the box open data display after simulation.
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