LM317L. 100 ma Adjustable Output, Positive Voltage Regulator LOW CURRENT THREE TERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATOR
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1 1 ma able Output, Positive Voltage Regulator The is an adjustable 3terminal positive voltage regulator capable of supplying in excess of 1 ma over an output voltage range of 1.2 V to 37 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making them essentially blowout proof. The serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the can be used as a precision current regulator. Features PbFree Packages are Available Output Current in Excess of 1 ma Output able Between 1.2 V and 37 V Internal Thermal Overload Protection Internal Short Circuit Current Limiting Output Transistor SafeArea Compensation Floating Operation for High Voltage Applications Standard 3Lead Transistor Package Eliminates Stocking Many Fixed Voltages Simplified Application LOW CURRENT THREETERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATOR SOIC8 D SUFFIX CASE Pin N.C N.C. TO92 Z SUFFIX CASE 29 Pin C in *.1 F I Adj 24 CO ** 1. F ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. * C in is required if regulator is located an appreciable ** distance from power supply filter. ** C O is not needed for stability, however, ** it does improve transient response. Vout 1.25 V 1 R1 I Adj R2 Since I Adj is controlled to less than 1 A, the error associated with this term is negligible in most applications. Semiconductor Components Industries, LLC, 24 November, 24 Rev. 7 1 Publication Order Number: /D
2 MAXIMUM RATINGS Rating Symbol Value Unit InputOutput Voltage Differential V I V O 4 Vdc Power Dissipation Case 29 (TO92) T A = 25 C Thermal Resistance, JunctiontoAmbient Thermal Resistance, JunctiontoCase Case 751 (SOIC8) (Note 1) T A = 25 C Thermal Resistance, JunctiontoAmbient Thermal Resistance, JunctiontoCase P D R JA R JC P D R JA R JC Internally Limited Internally Limited Operating Junction Temperature Range T J 4 to 125 C Storage Temperature Range T stg 65 to 15 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. SOIC8 JunctiontoAmbient Thermal Resistance is for minimum recommended pad size. Refer to Figure 23 for Thermal Resistance variation versus pad size. W C/W C/W W C/W C/W 2
3 ELECTRICAL CHARACTERISTICS (V I V O = 5. V; I O = 4 ma; T J = T low to T high (Note 1); I max and P max (Note 2); unless otherwise noted.), LB Line Regulation (Note 3) T A = 25 C, 3. V V I V O 4 V Load Regulation (Note 3), T A = 25 C 1 ma I O I max V O 5. V V O 5. V Characteristics Figure Symbol Min Typ Max Unit 1 Reg line.1.4 %/V 2 Reg load ment Pin Current 3 I Adj 5 1 A ment Pin Current Change 2.5 V V I V O 4 V, P D P max 1 ma I O I max Reference Voltage 3. V V I V O 4 V, P D P max 1 ma I O I max mv % V O 1, 2 I Adj.2 5. A 3 V ref V Line Regulation (Note 3), 3. V V I V O 4 V 1 Reg line.2.7 %/V Load Regulation (Note 3) 1 ma I O I max V O 5. V V O 5. V 2 Reg load Temperature Stability (T low T J T high ) 3 T S.7 % V O Minimum Load Current to Maintain Regulation (V I V O = 4 V) 3 I Lmin ma mv % V O Maximum Output Current V I V O 6.25 V, P D P max, Z Package V I V O 4 V, P D P max, T A = 25 C, Z Package 3 I max ma RMS Noise, % of V O T A = 25 C, 1 Hz f 1 khz N. 3 % V O Ripple Rejection (Note 4) V O = 1.2 V, f = 12 Hz C Adj = 1 F, V O = 1. V Long Term Stability, T J = T high (Note 5) T A = 25 C for Endpoint Measurements 4 RR db 3 S.3 1. %/1. k Hrs. 2. T low to T high = to 125 C for 4 to 125 C for B 3. I max = 1 ma P max = 625 mw 4. Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used. 5. C Adj, when used, is connected between the adjustment pin and ground. 6. Since LongTerm Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 3
4 ORDERING INFORMATION Device Operating Temperature Range Package Shipping BD SOIC8 98 Units / Rail BDG SOIC8 (PbFree) 98 Units / Rail BDR2 SOIC8 25/Tape & Reel BDR2G SOIC8 (PbFree) 25/Tape & Reel BZ BZG T J = 4 C to 125 C TO92 TO92 (PbFree) 2 Units / Bag 2 Units / Bag BZRA TO92 2 Tape & Reel BZRAG TO92 (PbFree) 2 Tape & Reel BZRP TO92 2 Ammo Pack BZRPG TO92 (PbFree) 2 Ammo Pack D SOIC8 98 Units / Rail DG SOIC8 (PbFree) 98 Units / Rail DR2 SOIC8 25/Tape & Reel DR2G SOIC8 (PbFree) 25/Tape & Reel Z TO92 2 Units / Bag ZG ZRA T J = C to 125 C TO92 (PbFree) TO92 2 Units / Bag 2 Tape & Reel ZRAG TO92 (PbFree) 2 Tape & Reel ZRE TO92 2 Tape & Reel ZRM TO92 2 Ammo Pack ZRP TO92 2 Ammo Pack ZRPG TO92 (PbFree) 2 Ammo Pack For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. Representative Schematic Diagram k V 6.8V 35 18k k 5 2k 5.1k 4 6.3V k 6.k 1 p F 1 p F k 12.8k 5 4
5 * V CC Line Regulation (%/V) = V OH V OL x 1 V OL V IH V IL V OH V OL C in.1 F I Adj 24 C O 1 F R L * Pulse Testing Required: Duty Cycle is suggested. R2 1 % Figure 1. Line Regulation and I Adj /Line Test Circuit * Load Regulation (mv) = V O (min Load) V O (max Load) Load Regulation (% V O ) = V O (min Load) V O (max Load) V O (min Load) I L X 1 V O (min Load) V O (max Load) C in.1 F I Adj 24 C O 1. F * R L (max Load) R L (min Load) * Pulse Testing Required: Duty Cycle is suggested. Figure 2. Load Regulation and I Adj /Load Test Circuit I L V I C in.1 F I Adj 24 V ref C O 1 F R L V O I SET Pulse Testing Required: Duty Cycle is suggested. To Calculate : = I SET 1.25 V Assume I SET = 5.25 ma Figure 3. Standard Test Circuit 5
6 14.3V 4.3V f = 12 Hz Vout = 1.25 V 24 D 1 * 1N42 R L C in.1 F C O 1 F V O 1.65K ** 1 F * D 1 Discharges C Adj if Output is Shorted to Ground. Figure 4. Ripple Rejection Test Circuit **C Adj provides an AC ground to the adjust pin., OUTPUT VOLTAGE CHANGE (%) = 45 V = 5. V I L = 5. ma to 4 ma = 1 V = 5. V I L = 5. ma to 1 ma RR, RIPPLE REJECTION (db) I L = 4 ma f = 12 Hz = 1 V = 14 V to 24 V Figure 5. Load Regulation Figure 6. Ripple Rejection IO, OUTPUT CURRENT (A).5 T J = 25 C T J = 15 C , INPUTOUTPUT VOLTAGE DIFFERENTIAL (V) VinVout, INPUTOUTPUT VOLTAGE DIFFERENTIAL (V) I L = 5. ma I L = 1 ma Figure 7. Current Limit Figure 8. Dropout Voltage 6
7 5. 1 I B, QUIESCENT CURRENT (ma) T J = 55 C T J = 25 C T J = 15 C RR, RIPPLE REJECTION (db) I L = 4 ma = 5. V ± 1. V PP = 1.25 V , INPUTOUTPUT VOLTAGE DIFFERENTIAL (V) Figure 9. Minimum Operating Current k 1 k 1 k 1. M f, FREQUENCY (Hz) Figure 1. Ripple Rejection versus Frequency V ref, REFERENCE VOLTAGE (V) = 4.2 V = V ref I L = 5. ma I Adj, ADJUSTMENT PIN CURRENT ( µ A) = 6.25 V = V ref ММММI L = 1 ma ММММI L = 1 ma Figure 11. Temperature Stability Figure 12. ment Pin Current, OUTPUT VOLTAGE CHANGE (%) = 4.25 V to V = V ref I L = 5 ma NOISE VOLTAGE ( µ V) Bandwidth 1 Hz to 1 khz Figure 13. Line Regulation Figure 14. Output Noise 7
8 , OUTPUT VOLTAGE DEVIATION (V), INPUT VOLTAGE CHANGE (V) = 1.25 V I L = 2 ma T J = 25 C C L = 1 F C L = t, TIME ( s), OUTPUT VOLTAGE DEVIATION (V) I L, LOAD CURRENT (ma) C L = 1 F; C Adj = 1 F C L =.3 F; C Adj = 1 F = 15 V = 1 V I NL = 5 ma T J = 25 C t, TIME ( s) I L Figure 15. Line Transient Response Figure 16. Load Transient Response APPLICATIONS INFORMATION Basic Circuit Operation The is a 3terminal floating regulator. In operation, the develops and maintains a nominal 1.25 V reference (V ref ) between its output and adjustment terminals. This reference voltage is converted to a programming current (I PROG ) by (see Figure 13), and this constant current flows through to ground. The regulated output voltage is given by: = V ref (1 ) I Adj R 1 Since the current from the adjustment terminal (I Adj ) represents an error term in the equation, the was designed to control I Adj to less than 1 A and keep it constant. To do this, all quiescent operating current is returned to the output terminal. This imposes the requirement for a minimum load current. If the load current is less than this minimum, the output voltage will rise. Since the is a floating regulator, it is only the voltage differential across the circuit which is important to performance, and operation at high voltages with respect to ground is possible. V ref I PROG Load Regulation The is capable of providing extremely good load regulation, but a few precautions are needed to obtain maximum performance. For best performance, the programming resistor (R1) should be connected as close to the regulator as possible to minimize line drops which effectively appear in series with the reference, thereby degrading regulation. The ground end of R2 can be returned near the load ground to provide remote ground sensing and improve load regulation. External Capacitors A.1 F disc or 1. F tantalum input bypass capacitor (C in ) is recommended to reduce the sensitivity to input line impedance. The adjustment terminal may be bypassed to ground to improve ripple rejection. This capacitor (C Adj ) prevents ripple from being amplified as the output voltage is increased. A 1 F capacitor should improve ripple rejection about 15 db at 12 Hz in a 1 V application. Although the is stable with no output capacitance, like any feedback circuit, certain values of external capacitance can cause excessive ringing. An output capacitance (C O ) in the form of a 1. F tantalum or 25 F aluminum electrolytic capacitor on the output swamps this effect and insures stability. I Adj V ref = 1.25 V Typical Figure 17. Basic Circuit Configuration 8
9 Protection Diodes When external capacitors are used with any IC regulator it is sometimes necessary to add protection diodes to prevent the capacitors from discharging through low current points into the regulator. Figure 14 shows the with the recommended protection diodes for output voltages in excess of 25 V or high capacitance values (C O > 1 F, C Adj > 5. F). Diode D 1 prevents C O from discharging thru the IC during an input short circuit. Diode D 2 protects against capacitor C Adj discharging through the IC during an output short circuit. The combination of diodes D 1 and D 2 prevents C Adj from discharging through the IC during an input short circuit. C in D 1 1N42 C O D2 C Adj 1N42 Figure 18. Voltage Regulator with Protection Diodes 25V V O 1.25k I O D 1 * To provide current limiting of I O to the system ground, the source of the current limiting diode must be tied to a negative voltage below 7.25 V. = V ref I DSS V ref I Omax I DSS 5 1N5314 V SS * D1 1N914 D2 1N914 1N MPS k 1. F Minimum = 1.25 V TTL Control V O < P OV 1.25 V V SS I Lmin I P < I O < 1 ma I P As shown O < I O < 95 ma Figure 19. able Current Limiter D 1 protects the device during an input short circuit. Figure V Electronic Shutdown Regulator I out I Adj 24 1N42 5k I outmax = V ref I Adj 1.25 V MPS297 1 F I outmax = V ref I Adj 1.25 V 5. ma < I out < 1 ma Figure 21. Slow TurnOn Regulator Figure 22. Current Regulator 9
10 R θja, THERMAL RESISTANCE JUNCTIONTOAIR ( C/W) R θja ÎÎÎ ÎÎÎ ÎÎÎ ÎÎ 2. oz. ÎÎ Graph represents symmetrical layout L P D(max) for T A = 5 C Copper 3. mm L, LENGTH OF COPPER (mm) Figure 23. SOP8 Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length L , MAXIMUM POWER DISSIPATION (W) P D 1
11 PACKAGE DIMENSIONS TO92 Z SUFFIX CASE 2911 ISSUE AL A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. R 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. P 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. L SEATING INCHES MILLIMETERS PLANE K DIM MIN MAX MIN MAX A B C X X D D G G H H J J K L V C N N P SECTION XX R V N 11
12 PACKAGE DIMENSIONS SOIC8 D SUFFIX CASE 7517 ISSUE AC X B Y Z H 8 1 G A D 5 4 S C.25 (.1) M Z Y S X S.25 (.1) M SEATING PLANE Y.1 (.4) M N X 45 M K J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION.15 (.6) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.127 (.5) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION THRU 7516 ARE OBSOLETE. NEW STANDARD IS MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D G 1.27 BSC.5 BSC H J K M 8 8 N S SOLDERING FOOTPRINT* SCALE 6:1 mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 291 Kamimeguro, Meguroku, Tokyo, Japan Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. /D
13 This datasheet has been download from: Datasheets for electronics components.
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