NATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No, 121 NRAO STANDARD CLOCK DIVIDER AND DISPLAY
|
|
- Betty Blake
- 5 years ago
- Views:
Transcription
1 NATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No, NRAO STANDARD CLOCK DIVIDER AND DISPLAY Ray Hallman AUGUST 97 NUMBER OF COPIES: 50
2 NRAO STANDARD CLOCK DIVIDER AND DISPLAY Ray Hallman A new standard clock has been completed comprising small circuit cards, power supplies, control switches, displays and chassis. The system keeps track of hours, minutes, seconds, tenths seconds, and hundredths seconds which are available on rear-mounted 56-pin Elco connectors in two formats:. TTL (0, +5), BCD on protected pin Elco.. 3-C (0, -6), BCD on exposed pin Elco. The clock divider requires an external standard oscillator that may be either solar or sidereal. MHz, V pp. A + or - trigger pulse of 6 volts may be applied to rear BNC connectors to provide sync when setting the clock. A day advance pulse is provided to advance the calendar system if one is used. (See Electronics Division Internal Report No. 0.) A switch selectable timing interrupt (00/50 ms) for the site computers is provided in the Elco' s. A picture of the front panel is presented showing the controls: NI RAO STANDARD CLOOK SECOROS LOGIC CARD CARD #/ :SET...; ET R:
3 Decade LED displays provide the time readout. The circuit cards are ccessible from the front panel. Several controls and display LED lamps are avail ble for setting the clock. The clock may be preset with automatic sync as follows. The desired time is set into the thumbwheels. With a one second tick provided by most precision time bases con nected to the proper trigger input and the setis c :fe switch to set, momentarily press and release the set arm push button about / second before the thumbwheel time setting. The red armed lamp will cycle on nd off when the system is properly armed. The green run LED comes on when the system has been properly triggered. Manual trigger is accomplished with no extern trigger att ched when the manu trigger button is depressed thereby extinguishing the armed lamp and igniting the run lamp to commence c unting time from the moment the button is pushed in The clock normally operates from a stand rd 5 V AC power line. A V store battery may be attached to the battery connector with pin ground and pin + V DC nominal. When the primary power fails, the battery will supply power to the clock. About / amp current with a minimum of 9. 5 V DC and a maximum 30 V DC is required to power the system. When primary power returns, the battery will recharge at a rate of about / amps until a voltage limit set by adjusting the AC powered supply output to 3. 5 vilts with the battery disconnected measure voltage at bøttery connector. Three other pictures show the front and l y.tck views presenting the pack ge in perspective.
4 3 LaJr,:aaar, 0 *******, att.* alit a It: as.* alma. st.. ******. itiovikait sit*.,,..;:: /..,*****0 00 :: *., :..., 000,,t :,. :,:.. ta*****.0, V.,0(0WIR..:.. :0. It it...0:66, : 00k. a :..,. W $ 0 ** : 0.,.. :..:0.tit :00: :.::**3oli a a*******:::: licatiose purws. liookatiistle f"..****.:. Atiot,...0, 6,*** * U.*****.** ********* ".ft. A disidirestommo
5 The four circuit cards are shown below. Note that the cards and are identical and may be interchanged. "A.,* miritt,7-7 If AraA. 7g, ff, * * Mt 0 MIR
6 - 5 - A schematic of the seconds logic card is shown in Figure L HOLD 0 +5 END PL K C A C A C A C A 880 I 880 A 880 B t 880 C 880 D I MHz INPUT K IX V pp f\d. K. K SA 0V F K I D C V90 5 A ID 6 K. 0 S +0V 0 DB s 0S TRIGGER PULSE J DC BUFFERED TRIGGER II Do 3 S R Ii 3 SPARES: NONE 3 08 S TEN CARRY SI 6 DAC' CA El.IS SET 0 0 HRS. D. S B H Dc C,S 0H II Do D 0. 8S S R 0H II 3.08SA 6 C C 5 A IS 9 SET B E 5 UNITS 880 SECONDS Dc S R 3 85 SET TENS SECONDS DG E 888 COLON ND SET REST SECONDS CARRY - U - Dc S R II g0 707 COMP. SIDE 3 ABCD EFH J KLMN A ALL CHIPS ARE PIN WITH Vcc PIN GND PIN 7 3 IOS 3 0 S 0S 80S II] 80M 0 H = 80H SECONDS AND FRACTIONAL SECONDS LOGIC CARD -# I
7 6 The MHz reference input is at pin V AC coupled into the level shifter buffer chip K which is an 880. The buffered output at pin 6 is divided by 880 decade counters chips A, B, C and D, providing 00 Hz to the clock input terminal (pin 8) of chip J, which is the. 0 seconds decade The 0 Hz output of this decade is coupled to the 0. second decade (chip H) providing the BCD drive logic sign s (via the non-inverting buffers, chip N) to the least signficant digit of the LED front panel display. Similarly the outputs of the higher order decades drive the respective digits of the display. Chip E is an 888 which is a divide by 6 counter providing states 0-5 for the tens of seconds decade. The output of this chip provides the seconds carry ( pulse/mm) to the minutes counter on card 3 discussed later Pins 3 through 8 of card also provide the TTL outputs to the rear panel Eico digital output connector. Pins M through U are connected to the thumbwheel switches providing the preset data
8 7 Chip K, pin 8 provides the buffered trigger to card 3 containing the arm/trigger/ hold logic. A schematic of card 3 is shown below. SECONDS CARRY Ell C c 5 DA A SET < B UNITS MINUTES 8 S R IK )8 6 m m m 8 m SET TENS MINUTES DCH 888 I F.,t DD 0m Orn 9 0 m 3 8 SET UNITS HOURS CI C C 3 0 DA A SR h Ej ti h 8 8 Ell TEN CARRY SET TENS I HOURS SET END PI L.08 SA El PL 00/50 ALs.05 SA SET HR. 3 0 C 700 SET 5 tio D D Q S 9 D B, Q _ 9 8 D B Q 3 77 _ 6 _ r- i +5 3 C> 707 W P 507 A WHP 68 8 I3 507 A ED 0 h 0 ha DATE ADVANCE 8-00 p.s RESET ARMED LAMP RUN LAMP SPARE UHP 507,3 IOHs PIL NOTE: ALL CHIPS ARE PIN WITH Vcc GND 7 EXCEPT CHIP L WHICH IS 6 PIN WITH Vcc 6 B GND 8 ; CHIP K IS 6 PI N. BUFFERED MANUAL TRIGGER TRIGGER 0 HOLD Vcc COMP, SIDE ABC() E FHJ K LMN Z - r" A HOURS AND MINUTES LOGIC CAR D. * 3
9 8 Chips J, H, and F are the ' s and 0' s of minutes and ' s of hours respectively. The 0' s and 0' s of hours comprises chip H of card 3 and chip E of card. Twentyfour hours is decoded by gate C-3 which sets flip-flop B-5 providing the reset pulse and day advance pulse via isolator slot K. The run/armed logic comprises flip-flop B-9 and gates A-3 and A-. Set provided by the set arm pushbutton sets the flip-flop thus lighting the red armed LED and applying the Hold signal to inhibit the time base buffer (chip K on card ), thereby stopping the clock until the buffered trigger or manual trigger button resets the flip-flop B on c rd 3 to commence measuring time. The PIL (interrupt logic) comprises chips C and D on card 3 providing the switch selectable 00/50 ms timing interrupt which is controlled by the PIL 00/50 ms signal present at flip-flop D-. Flip-flop D-5 produces a pulse with each. 08 S A signal ending with the end PIL signal -which occurs 0 As after S A. Likewise, flip-flop D-9 produces a negative 0 pts pulse with every. 05 S A signal. The pulses from the two flip-flops are logically ORed by NAND gate C to provide the PIL to the computer. Cards /, a schematic of which is shown below, are level shifting cards providing level shifting of the 0+5, TTL signals present at the digital output Elco (TTL) to 3-C, 0-6 logic levels which are then made available to the outside world at the 3-C digital output Elco connector. Power of -8 V from the computer is supplied through the Elco.
10 I 7-9 SLOT SLOT # # I M IN +5 I K D-I _. al 8K -8V N K N9 OUT I - 6 V + 5 V I GND I IK IN 53-6 SLOT SLOT # #.05 I M M.0 S.0 S M M. 05 C M.08S C S 8 0M..I S 0M 0M. S M. S M- 9. S 0 I H. 8S H I S H 5 B - 8H S 0H 8S - 0S 0 S PI L 0S - SPARE 05 0S SPARE IA B C D PLACE TWO CIRCUITS TO AN>. E F HJ IC SPACE K L MN Li r Z - A -I -8V +5V GND NRAO STANDARD TIME CLOCK COMPUTER BUFFER CARD -# / FIG.
11 - 0 - The main frame circuits schematic is shown below showing the control switch circuits and power supply circuits. A Lambda hybrid regulator drops the battery/charger voltage to +5 V DC for the logic. The Acopian 5 volt/3 amp supply is adjusted to about 3.5 V DC for charging the battery if one is used. When power interrupts the battery will discharge until power resumes. The Acopian supply current limits at about 3 amps until a battery terminal voltage of about 3. 5 volts results at which time the current tapers off to nearly zero current replacing only whatever current leaks due to self discharge. When adjusting the Acopian supply, the voltage must be measured at the battery connector. GND CARD 3 PIN A SET -I- -.T-- SET MANUAL 0 ARM SET TRIGGER SAFE CARD 3 PIN Y MV 50 5 / RED ARM CARD 3 PIN 00 GREEN CARD 3 0 RUN PIN -- : r 50 0 MV5 INTERRUPT SELECT I CARD 3 CARD 3 PIN V PIN U CARD 3 PIN LINE FUSE ACOPIAN or\p_ac ( +) OUT Al5MT300 BAT FUSE 5 VAC.5 AMP 5 AMP AC I5VDC 3 AMP GND ADJUT FOR OUT. VOLTS TO VOLT STORAGE BATTERY LAMBDA LAS 305 REGULATOR CARD PIN CARD < PIN A F > (+) >(-) 5V AUX. PWR, OUTPUT MAIN FRAME CIRCUITS
12 Conclusion The Acopian power supply has a current limit problem when power fails and is resumed after batteries have discharged to nearly zero volts, a start up problem results, since the "fold back" current limiter does not supply enough current to bring power back up. A fix was installed comprising a N 86 diode and 0 S/0 W resistor in series with the battery to limit the current to the battery during charging. In future designs a better AC power supply with less current limiting "fold back" may be employed. The PIL of 50 or 00 ms does not provide a fast enough interrupt to the computer to read the. 0 sec decade provided to the computer. Thus, a faster interrupt of about 0 ms should be considered. Credits Chassis Assembly and Wiring Dick Skaggs Circuit Card Assembly Randall Shears Gary Beverage John Hubbard Chassis Fabrication Boyd Wright
13 A BCDE F HJKL MNPR S TUVWXY CARD SLOT t\d I-. 00 W rn A B C D E FHJK LMNPRS TU CARD / SLOT A B C D E F He). K L MNPRS TUVWX CARD 3 SLOT t- A B C D E F H K LMNPR S TUVWXY Z CARD / SLOT
14 3 - WIRE LIST (HARNESS) Function Origin Hold Card 3 - Pin 0 Card - Pin 0 Reference Oscillator BNC V Trigger Pulse, +0 V BNC Ti-igger Pulse, -0 V BNC Buffered Trigger - Card -Pin Ten Carry J 0 ha L 3 7 gr a Y 3 Y Reset B H Seconds Carry Z. 08S A F 3 S. 05 S A E 3 T ENDPIL D 3 9 V CC - 3 Ground A, A 3 A, A Date Advance W BNC 0h C Card - Pin S Ground Lug A, Lug
15 - - WIRE LIST (THUMBWHEEL HARNESS) Function Orjita. To Unit Seconds Card Pin M Tens Seconds Unit Minutes Card 3 Pin C 3 D Tens Minutes Card 3 Pin H 3 J 3 K Unit Hours Card 3 Pin L 3 xi 3 N 8 3 P Tens Hours Card 3 Pin R All Decades Bussed Together s Card Pin X Y' s Ten Position, binary coded decimal, with s_epparate common to not-true bits Comms. X( 0) Y( 0) Dial Conn. to Terminals Positive Logic X = +5 thru R = 50 S
16 - 5 - WIRE LIST (TIME DISPLAY HARNESS - 3 AUGAT PLUGS) AB, CD, EFH (TWO WIRES ON ORIGIN PINS) Function 0 h 0 h 0 h +5 volts 80 h Colon D. P. Ground h h h +5 volts 8h Ground 0 m 0 m 0 m +5 volts 80 m Ground m m m +5 volts 8 m +5 volts s Ground 5 is 85 Ground D. P. 0 s 0. s 0. s 0. s 0 s 0. 8 S Ground 80 s 0 s To Augat AB Pin (Red) Aupt CD Pin (Red) Augat EFH Pin (Red) Card Pin C X Card 3 Pin
17 - 6 - WIRE LIST (TTL OUTPUT - ELCO HARNESS (38 PIN ELCO ) AND (PROTECTED PINS) (TWO WIRES ON ORIGIN PINS) Function Origin. 0 s Card Pin 3. 0 s. 0 s s 6. s. s 8. s 9. 8 s 0 s s s 3 8 s 0 s 5 0s 6 0s 7 80s 8 l m 3 3 m 3 m m m 3 7 0m 3 8 0m m 8 h 3 0 h 3 h 3 8 h 3 3 0h 3 0h C 0h 8 80h 8 PIL 6 Spare U +5 volts Elco Pin A J V X
18 - 7 - WIRE LIST (3-C LOGIC OUTPUT - ELCO HARNESS) (38 PIN ELCO (EXPOSED PINS) Function Qjg To. 0 s Card Pin 3 Elco Pin A. 0 s B. 0 s 5 C. 08 s 6 D. s 7 E. s 8 F. s 9 H.8 s 0 3 s K s L s 3 M 8 s N 0 s 5 P 0 s 6 R 0 s 7 S m Card Pin 3 T m U m 5 V 8 m 6 W 0 m 7 X 0m 8 Y 0m 9 Z h 0 a h b h c 8 h 3 d 0 h e 0h 5 f PIL 6 h Spare 7-8 volts Elco Pin p Card Pin Z 3 X Ground Eico Pin t Card A
MAY 1971 NUMBER OF COPIES: 150
NATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No. 100 A LOBE ROTATOR SYSTEM FOR RADIO INTERFEROMETERS Ray Hallman MAY 1971 NUMBER OF COPIES: 150 A
More informationNATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No. 88 MULTIFILTER RECEIVERS
NATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No. 88 MULTIFILTER RECEIVERS D. L. Thacker and Lewis Beale OCTOBER 1969 NUMBER OF COPIES: 100 MULTIFILTER
More informationModel 305 Synchronous Countdown System
Model 305 Synchronous Countdown System Introduction: The Model 305 pre-settable countdown electronics is a high-speed synchronous divider that generates an electronic trigger pulse, locked in time with
More informationTECHNICAL MANUAL FOR A FIVE DIGIT BCD INTERFACE DESIGNED FOR USE WITH A MONROE 1666 CA LCULA TOR
CANADA DEPARTMENT OF ENERGY, MINES AND RESOURCES MINES BRANCH OTTAWA TECHNICAL MANUAL FOR A FIVE DIGIT BCD INTERFACE DESIGNED FOR USE WITH A MONROE 1666 CA LCULA TOR e Crown Copyrights reserved Available
More information1 Second Time Base From Crystal Oscillator
1 Second Time Base From Crystal Oscillator The schematic below illustrates dividing a crystal oscillator signal by the crystal frequency to obtain an accurate (0.01%) 1 second time base. Two cascaded 12
More informationCONTENTS Sl. No. Experiment Page No
CONTENTS Sl. No. Experiment Page No 1a Given a 4-variable logic expression, simplify it using Entered Variable Map and realize the simplified logic expression using 8:1 multiplexer IC. 2a 3a 4a 5a 6a 1b
More information1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.
Name: Multiple Choice 1.) If a 3 input NOR gate has eight input possibilities, how many of those possibilities result in a HIGH output? (a.) 1 (b.) 2 (c.) 3 (d.) 7 (e.) 8 2.) The output of an OR gate with
More informationB MTS Systems Corp., Model Function Generator
0189 115585-02 B MTS Systems Corp., 1988 Model 410.81 Function Generator Table of Contents Section 1 Introduction 1.1 Functional Description 1-1 1.2 Specifications 1-2 Section 2 Operation 2.1 Control Mode
More informationHigh Current MOSFET Toggle Switch with Debounced Push Button
Set/Reset Flip Flop This is an example of a set/reset flip flop using discrete components. When power is applied, only one of the transistors will conduct causing the other to remain off. The conducting
More informationIES Digital Mock Test
. The circuit given below work as IES Digital Mock Test - 4 Logic A B C x y z (a) Binary to Gray code converter (c) Binary to ECESS- converter (b) Gray code to Binary converter (d) ECESS- To Gray code
More informationEE283 Electrical Measurement Laboratory Laboratory Exercise #7: Digital Counter
EE283 Electrical Measurement Laboratory Laboratory Exercise #7: al Counter Objectives: 1. To familiarize students with sequential digital circuits. 2. To show how digital devices can be used for measurement
More informationMAINTENANCE MANUAL DIGITAL SELECTOR MODULE 19D902519G1 TABLE OF CONTENTS
D MAINTENANCE MANUAL DIGITAL SELECTOR MODULE 19D902519G1 TABLE OF CONTENTS Page SPECIFICATIONS...2 CIRCUIT AND FUNCTIONAL DESCRIPTION...3 CONNECTORS AND SYSTEM INTERFACE...4 DIGITAL SELECTOR MODULE AND
More informationCHAPTER 6 DIGITAL INSTRUMENTS
CHAPTER 6 DIGITAL INSTRUMENTS 1 LECTURE CONTENTS 6.1 Logic Gates 6.2 Digital Instruments 6.3 Analog to Digital Converter 6.4 Electronic Counter 6.6 Digital Multimeters 2 6.1 Logic Gates 3 AND Gate The
More informationLab 5. Binary Counter
Lab. Binary Counter Overview of this Session In this laboratory, you will learn: Continue to use the scope to characterize frequencies How to count in binary How to use an MC counter Introduction The TA
More informationDedan Kimathi University of technology. Department of Electrical and Electronic Engineering. EEE2406: Instrumentation. Lab 2
Dedan Kimathi University of technology Department of Electrical and Electronic Engineering EEE2406: Instrumentation Lab 2 Title: Analogue to Digital Conversion October 2, 2015 1 Analogue to Digital Conversion
More information1. The decimal number 62 is represented in hexadecimal (base 16) and binary (base 2) respectively as
BioE 1310 - Review 5 - Digital 1/16/2017 Instructions: On the Answer Sheet, enter your 2-digit ID number (with a leading 0 if needed) in the boxes of the ID section. Fill in the corresponding numbered
More informationERRATUM: In accordance with the standardized nomenciaure adopted at NRAO, the term "instrumental. meridian" should now be "instrumental equator".
ERRATUM: In accordance with the standardized nomenciaure adopted at NRAO, the term "instrumental. meridian" should now be "instrumental equator". NATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia
More information8-Bit A/D Converter AD673 REV. A FUNCTIONAL BLOCK DIAGRAM
a FEATURES Complete 8-Bit A/D Converter with Reference, Clock and Comparator 30 s Maximum Conversion Time Full 8- or 16-Bit Microprocessor Bus Interface Unipolar and Bipolar Inputs No Missing Codes Over
More informationLBI-38392C IC DATA MAINTENANCE MANUAL LOGIC BOARD U707 OCTAL DATA LATCH 19D902172G1 & G2 TABLE OF CONTENTS
LBI-38392C MAINTENANCE MANUAL LOGIC BOARD 19D902172G1 & G2 U707 OCTAL DATA LATCH IC DATA TABLE OF CONTENTS Page DESCRIPTION........................................... Front.. Cover CIRCUIT ANALYSIS........................................
More informationNATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No. 82 NRAO UNIVERSAL LOCAL OSCILLATOR
NATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No. 8 NRAO UNIVERSAL LOCAL OSCILLATOR M. Balister OCTOBER 1968 NUMBER OF COPIES: 100 NRAO UNIVERSAL LOCAL
More informationan external cesium and built in test equipment shows synchronization with that cesium through the 1 PPS
DIGITAL PROCESSING CLOCK David H. Phillips, Naval Research Laboratory, Washington, D.C. ABSTRACT The Digital Processing Clock SG 1157lU has been developed by Naval Research Laboratory and is: (1 ) compatible
More informationMAINTENANCE MANUAL DIGITAL SELECTOR MODULE 19D902519G1 INCLUDING DIGITAL SELECTOR 1 (150 BAUD DATA) AND DIGITAL SELECTOR 2 (9600 Hz CLOCK)
B MAINTENANCE MANUAL DIGITAL SELECTOR MODULE 19D902519G1 INCLUDING DIGITAL SELECTOR 1 (150 BAUD DATA) AND DIGITAL SELECTOR 2 (9600 Hz CLOCK) TABLE OF CONTENTS Page SPECIFICATIONS... 1 DESCRIPTION... 4
More informationFan in: The number of inputs of a logic gate can handle.
Subject Code: 17333 Model Answer Page 1/ 29 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model
More informationNATIONAL RADIO ASTRONOMY OBSERVATORY Green Bank, West Virginia Electronics Division Internal Report No. 88 MULTIFILTER RECEIVERS
NATIONAL RADIO ASTRONOMY OBSERVATORY Bank, West Virginia Electronics Division Internal Report No. 88 MULTIFILTER RECEIVERS D. L. Thacker and Lewis Beale OCTOBER 1969 NUMBER OF COPIES: 100 MULTIFILTER RECEIVERS
More informationAnalog-to-Digital Conversion
CHEM 411L Instrumental Analysis Laboratory Revision 1.0 Analog-to-Digital Conversion In this laboratory exercise we will construct an Analog-to-Digital Converter (ADC) using the staircase technique. In
More informationLab 6. Binary Counter
Lab 6. Binary Counter Overview of this Session In this laboratory, you will learn: Continue to use the scope to characterize frequencies How to count in binary How to use an MC14161 or CD40161BE counter
More informationDS1642 Nonvolatile Timekeeping RAM
www.dalsemi.com Nonvolatile Timekeeping RAM FEATURES Integrated NV SRAM, real time clock, crystal, power fail control circuit and lithium energy source Standard JEDEC bytewide 2K x 8 static RAM pinout
More informationJava Bread Board Introductory Digital Electronics Exercise 2, Page 1
Java Bread Board Introductory Digital Electronics Exercise 2, Page 1 JBB Excercise 2 The aim of this lab is to demonstrate how basic logic gates can be used to implement simple memory functions, introduce
More informationENGR 210 Lab 12: Analog to Digital Conversion
ENGR 210 Lab 12: Analog to Digital Conversion In this lab you will investigate the operation and quantization effects of an A/D and D/A converter. A. BACKGROUND 1. LED Displays We have been using LEDs
More informationNOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
DECADE COUNTER; 4-BIT BINARY COUNTER The SN54/ and SN54/ are high-speed 4-bit ripple type counters partitioned into two sectio. Each counter has a divide-by-two section and either a divide-by-five () or
More informationPC-OSCILLOSCOPE PCS500. Analog and digital circuit sections. Description of the operation
PC-OSCILLOSCOPE PCS500 Analog and digital circuit sections Description of the operation Operation of the analog section This description concerns only channel 1 (CH1) input stages. The operation of CH2
More informationNational Radio Astronomy Observatory
National Radio Astronomy Observatory Charlottesville, Virginia Mey 3, 1968 To: From: Arthur M. Shalloway Subject: Revised Functional Description of NRAO Correlation Receiver Model II (See Original Description
More informationANALOG TO DIGITAL CONVERTER
Final Project ANALOG TO DIGITAL CONVERTER As preparation for the laboratory, examine the final circuit diagram at the end of these notes and write a brief plan for the project, including a list of the
More informationSequential Logic Circuits
Exercise 2 Sequential Logic Circuits 1 - Introduction Goal of the exercise The goals of this exercise are: - verify the behavior of simple sequential logic circuits; - measure the dynamic parameters of
More informationMicroprocessor & Interfacing Lecture Programmable Interval Timer
Microprocessor & Interfacing Lecture 30 8254 Programmable Interval Timer P A R U L B A N S A L A S S T P R O F E S S O R E C S D E P A R T M E N T D R O N A C H A R Y A C O L L E G E O F E N G I N E E
More informationDSTS-3B DEPTHSOUNDER TEST SET OPERATOR S MANUAL
Page 1 1.0 INTRODUCTION DSTS-3B DEPTHSOUNDER TEST SET OPERATOR S MANUAL The DSTS-3B is a full-featured test set designed for use with all types of echo sounders from small flashers to large commercial
More informationMM58174A Microprocessor-Compatible Real-Time Clock
MM58174A Microprocessor-Compatible Real-Time Clock General Description The MM58174A is a low-threshold metal-gate CMOS circuit that functions as a real-time clock and calendar in bus-oriented microprocessor
More informationDigital Fundamentals 8/25/2016. Summary. Summary. Floyd. Chapter 1. Analog Quantities
8/25/206 Digital Fundamentals Tenth Edition Floyd Chapter Analog Quantities Most natural quantities that we see are analog and vary continuously. Analog systems can generally handle higher power than digital
More informationUser's Manual PFCU-4. Filter Set & Relay Control Unit
User's Manual PFCU- Filter Set & Relay Control Unit X-ray Instrumentation Associates 00 Mills Street Menlo Park, CA 90-0 ()--779 February, 99 Contents: I: Warranty and Registration Card... A: Our guarantee
More informationLab 2 Revisited Exercise
Lab 2 Revisited Exercise +15V 100k 1K 2N2222 Wire up led display Note the ground leads LED orientation 6.091 IAP 2008 Lecture 3 1 Comparator, Oscillator +5 +15 1k 2 V- 7 6 Vin 3 V+ 4 V o Notice that power
More informationNumber system: the system used to count discrete units is called number. Decimal system: the number system that contains 10 distinguished
Number system: the system used to count discrete units is called number system Decimal system: the number system that contains 10 distinguished symbols that is 0-9 or digits is called decimal system. As
More informationR & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification:
DIGITAL IC TRAINER Model : DE-150 Object: To Study the Operation of Digital Logic ICs TTL and CMOS. To Study the All Gates, Flip-Flops, Counters etc. To Study the both the basic and advance digital electronics
More informationModel 3102D 0-2 kv H.V. Power Supply
Features Compact single width NIM package Regulated up to ±2000 V dc. 1 ma output Noise and ripple 3 mv peak to peak Overload and short circuit protected Overload, inhibit and polarity status indicators
More informationE-Tec Module Part No
E-Tec Module Part No.108227 1. Additional programs for the fischertechnik Electronics Module For fans of digital technology, these additional functions are provided in the "E-Tec module". Four additional
More informationELG3331: Digital Tachometer Introduction to Mechatronics by DG Alciatore and M B Histand
ELG333: Digital Tachometer Introduction to Mechatronics by DG Alciatore and M B Histand Our objective is to design a system to measure and the rotational speed of a shaft. A simple method to measure rotational
More informationDIGITAL ELECTRONICS QUESTION BANK
DIGITAL ELECTRONICS QUESTION BANK Section A: 1. Which of the following are analog quantities, and which are digital? (a) Number of atoms in a simple of material (b) Altitude of an aircraft (c) Pressure
More information6-Bit A/D converter (parallel outputs)
DESCRIPTION The is a low cost, complete successive-approximation analog-to-digital (A/D) converter, fabricated using Bipolar/I L technology. With an external reference voltage, the will accept input voltages
More informationhij Teacher Resource Bank GCE Electronics Exemplar Examination Questions ELEC2 Further Electronics
hij Teacher Resource Bank GCE Electronics Exemplar Examination Questions ELEC2 Further Electronics The Assessment and Qualifications Alliance (AQA) is a company limited by guarantee registered in England
More informationPulsePuppy Installation and Operation Manual Oscillator Carrier Revised: 30 January TAPR
PulsePuppy Installation and Operation Manual Oscillator Carrier Revised: 30 January 2018 2018 TAPR Introduction The PulsePuppy is a carrier board for small user-provided oven controlled ( OCXO ) and temperature
More informationObjective Questions. (a) Light (b) Temperature (c) Sound (d) all of these
Objective Questions Module 1: Introduction 1. Which of the following is an analog quantity? (a) Light (b) Temperature (c) Sound (d) all of these 2. Which of the following is a digital quantity? (a) Electrical
More informationCS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam
CS302 Digital Logic Design Solved Objective Midterm Papers For Preparation of Midterm Exam MIDTERM EXAMINATION 2011 (October-November) Q-21 Draw function table of a half adder circuit? (2) Answer: - Page
More information1 FUNCTIONAL DESCRIPTION WAY SPLITTER/INPUT BOARD FET RF AMPLIFIERS WAY POWER COMBINER VSWR CONTROL BOARD...
CONTENTS 1 FUNCTIONAL DESCRIPTION...1 2 4-WAY SPLITTER/INPUT BOARD...2 3 FET RF AMPLIFIERS...3 4 4-WAY POWER COMBINER...4 5 VSWR CONTROL BOARD...5 6 ADJUSTMENT OF BIAS VOLTAGE TO ESTABLISH PROPER QUIESCENT
More informationMAINTENANCE MANUAL AUDIO AMPLIFIER BOARD 19D904025G1 (MDR) AUDIO AMPLIFIER BOARD 19D904025G2 (MDX)
A MAINTENANCE MANUAL AUDIO AMPLIFIER BOARD 19D904025G1 (MDR) AUDIO AMPLIFIER BOARD 19D904025G2 (MDX) TABLE OF CONTENTS DESCRIPTION............................................... Page Front Cover CIRCUIT
More informationericssonz LBI-38640E MAINTENANCE MANUAL FOR VHF TRANSMITTER SYNTHESIZER MODULE 19D902780G1 DESCRIPTION
MAINTENANCE MANUAL FOR VHF TRANSMITTER SYNTHESIZER MODULE 19D902780G1 TABLE OF CONTENTS Page DESCRIPTION........................................... Front Cover GENERAL SPECIFICATIONS...................................
More informationFig 1: The symbol for a comparator
INTRODUCTION A comparator is a device that compares two voltages or currents and switches its output to indicate which is larger. They are commonly used in devices such as They are commonly used in devices
More informationLow Voltage, High Current Time Delay Circuit
Low Voltage, High Current Time Delay Circuit In this circuit a LM339 quad voltage comparator is used to generate a time delay and control a high current output at low voltage. Approximatey 5 amps of current
More informationDigital Design and System Implementation. Overview of Physical Implementations
Digital Design and System Implementation Overview of Physical Implementations CMOS devices CMOS transistor circuit functional behavior Basic logic gates Transmission gates Tri-state buffers Flip-flops
More informationHEATHKIT HD-1410 ELECTRONICKEYER
HEATHKIT HD-1410 ELECTRONICKEYER INTRODUCTION The HD-1410 is a compact Electronic Keyer with a built in AC power supply, mechanical paddles, sidetone oscillator and speaker in one package. It is designed
More informationAssembly Manual for VFO Board 2 August 2018
Assembly Manual for VFO Board 2 August 2018 Parts list (Preliminary) Arduino 1 Arduino Pre-programmed 1 Faceplate Assorted Header Pins Full Board Rev A 10 104 capacitors 1 Rotary encode with switch 1 5-volt
More information). The THRESHOLD works in exactly the opposite way; whenever the THRESHOLD input is above 2/3V CC
ENGR 210 Lab 8 RC Oscillators and Measurements Purpose: In the previous lab you measured the exponential response of RC circuits. Typically, the exponential time response of a circuit becomes important
More informationEECS 150 Homework 4 Solutions Fall 2008
Problem 1: You have a 100 MHz clock, and need to generate 3 separate clocks at different frequencies: 20 MHz, 1kHz, and 1Hz. How many flip flops do you need to implement each clock if you use: a) a ring
More informationHIGH LOW Astable multivibrators HIGH LOW 1:1
1. Multivibrators A multivibrator circuit oscillates between a HIGH state and a LOW state producing a continuous output. Astable multivibrators generally have an even 50% duty cycle, that is that 50% of
More informationEXPERIMENT 12: DIGITAL LOGIC CIRCUITS
EXPERIMENT 12: DIGITAL LOGIC CIRCUITS The purpose of this experiment is to gain some experience in the use of digital logic circuits. These circuits are used extensively in computers and all types of electronic
More informationFor the op amp circuit above, how is the output voltage related to the input voltage? = 20 k R 2
Golden Rules for Ideal Op Amps with negative feedback: 1. The output will adjust in any way possible to make the inverting input and the noninverting input terminals equal in voltage. 2. The inputs draw
More informationDigital Logic Circuits
Digital Logic Circuits Let s look at the essential features of digital logic circuits, which are at the heart of digital computers. Learning Objectives Understand the concepts of analog and digital signals
More informationCode No: R Set No. 1
Code No: R05310402 Set No. 1 1. (a) What are the parameters that are necessary to define the electrical characteristics of CMOS circuits? Mention the typical values of a CMOS NAND gate. (b) Design a CMOS
More informationModule -18 Flip flops
1 Module -18 Flip flops 1. Introduction 2. Comparison of latches and flip flops. 3. Clock the trigger signal 4. Flip flops 4.1. Level triggered flip flops SR, D and JK flip flops 4.2. Edge triggered flip
More informationLab Exercise 6: Digital/Analog conversion
Lab Exercise 6: Digital/Analog conversion Introduction In this lab exercise, you will study circuits for analog-to-digital and digital-to-analog conversion Preparation Before arriving at the lab, you should
More informationOperation and Service Manual. 350 MHz Preamplifier SIM914. Stanford Research Systems
Operation and Service Manual Stanford Research Systems Revision 1.8 August 24, 2006 Certification Stanford Research Systems certifies that this product met its published specifications at the time of shipment.
More informationUniversity of California at Berkeley Donald A. Glaser Physics 111A Instrumentation Laboratory
Published on Instrumentation LAB (http://instrumentationlab.berkeley.edu) Home > Lab Assignments > Digital Labs > Digital Circuits II Digital Circuits II Submitted by Nate.Physics on Tue, 07/08/2014-13:57
More informationLSI Computer Systems, Inc Walt Whitman Road, Melville, NY (631) FAX (631)
LSI/CSI UL A3800 LSI Computer Systems, Inc. 235 Walt Whitman Road, Melville, NY 747 (63) 270400 FAX (63) 270405 TOUCH CONTROL STEP DIMMER LIHT SWITCH WITH AUTOMATIC AIN CONTROL (AC) March 2007 FEATURES:
More informationApplication Note AN-3006 Optically Isolated Phase Controlling Circuit Solution
www.fairchildsemi.com Application Note AN-3006 Optically Isolated Phase Controlling Circuit Solution Introduction Optocouplers simplify logic isolation from the ac line, power supply transformations, and
More informationPAiA 4780 Twelve Stage Analog Sequencer Design Analysis Originally published 1974
PAiA 4780 Twelve Stage Analog Sequencer Design Analysis Originally published 1974 DESIGN ANALYSIS: CLOCK As is shown in the block diagram of the sequencer (fig. 1) and the schematic (fig. 2), the clock
More informationUltrasonic Multiplexer OPMUX v12.0
Przedsiębiorstwo Badawczo-Produkcyjne OPTEL Sp. z o.o. ul. Morelowskiego 30 PL-52-429 Wrocław tel.: +48 (071) 329 68 54 fax.: +48 (071) 329 68 52 e-mail: optel@optel.pl www.optel.eu Ultrasonic Multiplexer
More informationlogic system Outputs The addition of feedback means that the state of the circuit may change with time; it is sequential. logic system Outputs
Sequential Logic The combinational logic circuits we ve looked at so far, whether they be simple gates or more complex circuits have clearly separated inputs and outputs. A change in the input produces
More information11 Counters and Oscillators
11 OUNTERS AND OSILLATORS 11 ounters and Oscillators Though specialized, the counter is one of the most likely digital circuits that you will use. We will see how typical counters work, and also how to
More informationDLVP A OPERATOR S MANUAL
DLVP-50-300-3000A OPERATOR S MANUAL DYNALOAD DIVISION 36 NEWBURGH RD. HACKETTSTOWN, NJ 07840 PHONE (908) 850-5088 FAX (908) 908-0679 TABLE OF CONTENTS INTRODUCTION...3 SPECIFICATIONS...5 MODE SELECTOR
More informationDESIGN ~ND CONSTRUCTION OF ~ STEP ETCHING INSTRUMENT ~BSTR~CT
DESIGN ~ND CONSTRUCTION OF ~ STEP ETCHING INSTRUMENT I NTRODUCT ION Robert L. Crandall 5th Year Microelectronic Engineering Student Rochester Institute of Technology ~BSTR~CT ~n instrument was designed
More informationDATA SHEET. HEF4059B LSI Programmable divide-by-n counter. For a complete data sheet, please also download: INTEGRATED CIRCUITS
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF,
More informationThe MP SERIES CONTROLLER. User s Manual. ISE, Inc.
The MP SERIES CONTROLLER User s Manual ISE, Inc. 10100 Royalton Rd. Cleveland, OH 44133 USA Tel: (440) 237-3200 Fax: (440) 237-1744 http://variac.com Form No, 003-1622 Rev G 02/25/2009 Form No. 003-1622
More informationPractical Workbook Logic Design & Switching Theory
Practical Workbook Logic Design & Switching Theory Name : Year : Batch : Roll No : Department: Second Edition Fall 2017-18 Dept. of Computer & Information Systems Engineering NED University of Engineering
More informationRotary Relay Replacement. for the ICOM 720A KA6BFB
Rotary Relay Replacement for the ICOM 720A by KA6BFB BACKGROUND There are several modifications available for converting the Icom IC-720A rotary relay in the filter module to fixed relays. The most popular
More informationDEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING
DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING (Regulation 2013) EE 6311 LINEAR AND DIGITAL INTEGRATED CIRCUITS LAB MANUAL 1 SYLLABUS OBJECTIVES: Working Practice in simulators / CAD Tools / Experiment
More informationCurrent Mode PWM Controller
Current Mode PWM Controller UC1842/3/4/5 FEATURES Optimized For Off-line And DC To DC Converters Low Start Up Current (
More informationLI-3100 Area Meter. Service Manual
LI-3100 Area Meter Service Manual Publication No. 8302-0032 February, 1983 Revised September, 1995 LI-COR, inc. 4421 Superior Street P.O. Box 4425 Lincoln, Nebraska 68504-0425 USA Telephone: 402-467-3576
More informationOPERATION OF A 100 MHz COUNT-RATE METER* Stanford Linear Accelerator Center Stanford University, Stanford, California ABSTRACT
I SLAC-PUB-661 September 1969 (E= I) OPERATION OF A 100 MHz COUNT-RATE METER* Jean-Louis Pellegrin Stanford Linear Accelerator Center Stanford University, Stanford, California 94305 ABSTRACT We present
More informationSPG Monolithic Event Detector Interface SP42400P
SPG Monolithic Event Detector Interface SP42400P General description: The SP42400P is a monolithic device fabricated in CMOS technology. Its generic function is to detect low to medium frequency, low voltage
More informationDesign and build a prototype digital motor controller with the following features:
Nov 3, 26 Project Digital Motor Controller Tom Kovacsi Andrew Rossbach Arnold Stadlin Start: Nov 7, 26 Project Scope Design and build a prototype digital motor controller with the following features:.
More informationLogic Families. Describes Process used to implement devices Input and output structure of the device. Four general categories.
Logic Families Characterizing Digital ICs Digital ICs characterized several ways Circuit Complexity Gives measure of number of transistors or gates Within single package Four general categories SSI - Small
More informationOPERATING MANUAL DIGITALLY CONTROLLED FREQUENCY SYNTHESIZED OSCILLATOR MODEL NUMBER: ADSDFS-A DOCUMENT NUMBER: 51A19937C
OPERATING MANUAL DIGITALLY CONTROLLED FREQUENCY SYNTHESIZED OSCILLATOR MODEL NUMBER: DOCUMENT NUMBER: 51A19937C For More Information, Contact: sales@goochandhousego.com www.goochandhousego.com As part
More informationState Machine Oscillators
by Kenneth A. Kuhn March 22, 2009, rev. March 31, 2013 Introduction State machine oscillators are based on periodic charging and discharging a capacitor to specific voltages using one or more voltage comparators
More informationDEPARTMENT OF ELECTRICAL ENGINEERING LAB WORK EE301 ELECTRONIC CIRCUITS
DEPARTMENT OF ELECTRICAL ENGINEERING LAB WORK EE301 ELECTRONIC CIRCUITS EXPERIMENT : 4 TITLE : 555 TIMERS OUTCOME : Upon completion of this unit, the student should be able to: 1. gain experience with
More informationMAINTENANCE MANUAL AUDIO MATRIX BOARD P29/
MAINTENANCE MANUAL AUDIO MATRIX BOARD P29/5000056000 TABLE OF CONTENTS Page DESCRIPTION................................................ Front Cover CIRCUIT ANALYSIS.............................................
More informationAND ITS APPLICATIONS M.C.SHARMA
AND ITS APPLICATIONS M.C.SHARMA 555 TIMER AND ITS APPLICATIONS BY M. C. SHARMA, M. Sc. PUBLISHERS: BUSINESS PROMOTION PUBLICATIONS 376, Lajpat Rai Market, Delhi-110006 By the same author Transistor Novelties
More informationCHAPTER 4: 555 TIMER. Dr. Wan Mahani Hafizah binti Wan Mahmud
CHAPTE 4: 555 TIME Dr. Wan Mahani Hafizah binti Wan Mahmud 555 TIME Introduction Pin configuration Basic architecture and operation Astable Operation Monostable Operation Timer in Triggering Circuits 555
More informationMute detector IC BA336 / BA338 / BA338L. Audio ICs
Mute detector IC The BA336, BA338 and BA338L are monolithic ICs designed for mute detection and tape end detection. When a duration of silence (52dBm or less) exceeds the time constant set with an external
More informationLBI-31807D. Mobile Communications MASTR II REPEATER CONTROL PANEL 19B234871P1. Maintenance Manual. Printed in U.S.A.
D Mobile Communications MASTR II REPEATER CONTROL PANEL 19B234871P1 Maintenance Manual Printed in U.S.A. This page intentionally left blank 13 PARTS LIST 12 PARTS LIST LBI-31807 11 PARTS LIST 10 SCHEMATIC
More informationMASTR II AUXILIARY RECEIVER 19D417546G7 & G8 & ANTENNA MATCHING UNITS 19C321150G1-G2. Maintenance Manual LBI-30766L. Mobile Communications
L Mobile Communications MASTR II AUXILIARY RECEIVER 19D417546G7 & G8 & ANTENNA MATCHING UNITS 19C321150G1-G2 Printed in U.S.A Maintenance Manual TABLE OF CONTENTS Page SPECIFICATIONS.....................................................
More informationCurrent Mode PWM Controller
application INFO available UC1842/3/4/5 Current Mode PWM Controller FEATURES Optimized For Off-line And DC To DC Converters Low Start Up Current (
More informationMAINTENANCE MANUAL AUDIO BOARDS 19D902188G1, G2 & G3
B MAINTENANCE MANUAL AUDIO BOARDS 19D902188G1, G2 & G3 TABLE OF CONTENTS Page Front Cover DESCRIPTION............................................... CIRCUIT ANALYSIS............................................
More information