Radiation Performance Data Package RHD5900, RHD5901, RHD5902
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- Randolf Wright
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1 April 29, 2013 Radiation Performance Data Package RHD5900, RHD5901, RHD5902 Rev 2.0 DLA SMD Number: Quad operational amplifiers Radiation Hardened by Design ELDRS: CMOS Immune Total dose: > 1 Mrad(Si) SEL Immune >100 MeV-cm 2 /mg Neutron Displacement Damage >10 14 neutrons/cm 2 Prepared by: Aeroflex Plainview, Inc. 35 South Service Road Plainview, NY Approved for release by DoD OSR under case number 12-S-1083 Technical data exported in accordance with and under the authority of 22 CFR 125.4(b)(13),diversion contrary to U.S. law is prohibited
2 1. Part Descriptions: 1.1 RHD5900: RadHard-by-Design Quad operational amplifier Single power supply operation: 3.3V to 5.0V Rail-to-Rail input and output range Gain Bandwidth: 5 MHz 1.2 RHD5901: RadHard-by-Design Quad operational amplifier Single power supply operation: 3.3V to 5.0V Rail-to-Rail input and output range Enable pin for Hi-Z Output Control in amplifier pairs Gain Bandwidth: 5 MHz 1.3 RHD5902: RadHard-by-Design Quad operational amplifier, Fast Single power supply operation: 3.3V to 5.0V Rail-to-Rail input and output range Enable pin for Hi-Z Output Control in amplifier pairs Gain Bandwidth: 35 MHz 2. Applicable Documents 2.1 Appendix A: Data Sheets: SCD5900 Quad Operational Amplifier 2.2 SCD5901 Quad Operational Amplifier, Hi-Z Output Control 2.3 SCD5902 Quad Operational Amplifier, Fast 2.4 Appendix B: Rad Report 11/30/2011 RADIATION TEST RESULTS Air Force Research Laboratory (AFRL) Low Energy X-Ray (LEXR) facility 2.5 Appendix C: DLA SMD: MICROCIRCUIT, HYBRID, QUAD OPERATIONAL AMPLIFIER, RADIATION HARDENED 3. Radiation Performance 3.1 Total Dose: 1 Mrads(Si), Dose rate = rads(si)/s The RHD Series utilizes a consistent set of design and layout techniques that achieve Total Ionizing Dose (TID) hardness in excess of 10 MRad(SiO2). The product line addresses the three main TID vulnerabilities: parasitic edge transistors, parasitic field transistors, and main transistor parameter shift See Appendix B: RADIATION TEST RESULTS Every wafer lot is subjected to RLAT testing to 2 Mrad(Si) at dose rate of rads(si)/s. Version 3.0 PAGE 2
3 3.2 ELDRS: Immune The RHD5901-S is 100% CMOS and is ELDRS-free. 3.3 Neutron Displacement Damage: Immune The RHD5901-S is 100% CMOS and is neutron displacement damage immune greater than neutrons/cm Single Event Latchup (SEL): Immune Single Event Latchup (SEL) immunity to greater than 100 MeV- cm 2 /mg is achieved by using full guardrings around all nmos and pmos devices Testing completed to 100 MeV- cm 2 /mg with no latchup. 3.5 Single Event Upset (SEU): Immune Analog IC s have little or no latch content, making Single Event Upsets (SEU) either nonexistent, or present with negligible cross section. In complex mixed signal functions with appreciable sensitive area due to digital logic/latches, SEU are addressed with spatial redundancy techniques. Version 3.0 PAGE 3
4 Standard Products RadHard-by-Design RHD5900 Quad Operational Amplifier April 8, 2013 FEATURES Single power supply operation (3.3V to 5.0V) or dual power supply operation (±1.65 to ±2.5V) Radiation performance - Total dose: >1Mrad(Si); Dose rate = rads(si)/s - ELDRS Immune - SEL Immune >100 MeV-cm 2 /mg - Neutron Displacement Damage >10 14 neutrons/cm 2 Rail-to-Rail input and output range Short Circuit Tolerant Full military temperature range Designed for aerospace and high reliability space applications Packaging Hermetic ceramic SOIC - 16-pin,.411"L x.293"w x.105"ht - Weight grams max Aeroflex Plainview s Radiation Hardness Assurance Plan is DLA Certified to MIL-PRF-38534, Appendix G. GENERAL DESCRIPTION Aeroflex s RHD5900 is a radiation hardened, single supply, quad operational amplifier in a 16-pin SOIC package. The RHD5900 design uses specific circuit topology and layout methods to mitigate total ionizing dose effects and single event latchup. These characteristics make the RHD5900 especially suited for the harsh environment encountered in Deep Space missions. It is guaranteed operational from -55 C to 125 C. Available screened in accordance with MIL-PRF Class K, the RHD5900 is ideal for demanding military and space applications. ORGANIZATION AND APPLICATION The RHD5900 amplifiers are capable of rail-to-rail input and outputs. Performance characteristics listed are for general purpose operational 5V CMOS amplifier applications. The amplifiers will drive substantial resistive or capacitive loads and are unity gain stable under normal conditions. Resistive loads in the low kohm range can be handled without gain derating and capacitive loads of several nf can be tolerated. CMOS device drive has a negative temperature coefficient and the devices are therefore inherently tolerant to momentary shorts, although on chip thermal shutdown is not provided. All inputs and outputs are diode protected. The devices will not latch with SEU events to above 100 MeV-cm 2 /mg. Total dose degradation is minimal to above 1Mrad(Si). Displacement damage environments to neutron fluence equivalents in the mid neutrons per cm 2 range are readily tolerated. There is no sensitivity to low-dose rate (ELDRS) effects. SEU effects are application dependent. SCD5900 Rev G
5 VCC IN_A -IN_A 3 2 A 4 1 OUT_A IN_B -IN_B 5 6 B 7 OUT_B IN_C -IN_C C 10 OUT_C IN_D -IN_D D OUT_D VEE FIGURE 1: BLOCK DIAGRAM OUT_A 1 16 OUT_D -IN_A IN_D IN_A 3 14 IN_D VCC IN_B 4 5 RHD VEE IN_C -IN_B IN_C OUT_B 7 10 OUT_C N/C 8 9 N/C 16-Pin SOIC FIGURE 2: PACKAGE PIN-OUT Notes: 1. Package and lid are electrically isolated from signal pads. 2. It is recommended that N/C or no connect pins (pins 8 and 9) and lid be grounded. This eliminates or minimizes any ESD or static buildup. SCD5900 Rev G 4/8/13 2 Aeroflex Plainview
6 ABSOLUTE MAXIMUM RATINGS Parameter Range Units Case Operating Temperature Range -55 to 125 C Storage Temperature Range -65 to 150 C Junction Temperature 150 C Supply Voltage VCC - VEE 6.0 V Input Voltage VCC 0.4 VEE -0.4 V Lead Temperature (soldering, 10 seconds) 300 C Thermal Resistance, Junction to Case,jc 7 C/W ESD Rating (MIL-STD-883, Method 3015, class 2) 2,000-3,999 V C 200 mw NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress rating only; functional operation beyond the Operation Conditions is not recommended and extended exposure beyond the Operation Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Typical Units VCC Power Supply Voltage 3.3 to 5.0 V VCM Input Common Mode Range VCC to VEE V ELECTRICAL PERFORMANCE CHARACTERISTICS (TC = -55 C TO 125 C, VCC = 5.0V -- UNLESS OTHERWISE SPECIFIED) Parameter Symbol Conditions Min Typ Max Units Quiescent Supply Current 1/ ICCQ No Load ma Input Offset Voltage 1/ VOS mv Input Offset Current 1/ IOS pa Input Bias Current IB TC = 25 C, -55 C 1/ TC = 125 C Common Mode Rejection Ratio CMRR db Power Supply Rejection Ratio PSRR db Output Voltage High VOH ROUT=3.6K to GND 4.9 V Output Voltage Low VOL ROUT=3.6K to VCC 0.1 V Short Circuit Output Current 2/ IO(SINK) VOUT to VCC ma IO(SOURCE) VOUT to VEE ma Slew Rate 1/ SR RL = 8K, Gain = V/uS Open Loop Gain 1/ AOL No Load db Unity Gain Bandwidth 1/ UGBW RL = 10K MHz Channel Separation 2/ RL = 2K, f = 1.0KHz 84 db Input-Referred Voltage Noise 2/ e n F = 5 khz 15 nv/ Hz Phase Margin 2/ m TC 25 C, No Load 30 Deg Notes: 1/ Specification derated to reflect Total Dose exposure to 1 25 C. 2/ Not Tested. Shall be guaranteed by design, characterization, or correlation to other test parameters. pa SCD5900 Rev G 4/8/13 3 Aeroflex Plainview
7 RHD5900 QUAD OPERATIONAL AMPLIFIER APPLICATION NOTES APPLICATION NOTE 1: DUAL POWER SUPPLY AMPLIFIER Inverting Amplifier VOUT= VIN R R1 Non Inverting Amplifier R2 VOUT= VIN R1 2.5V VIN R1 R2 2.5V VIN VOUT VOUT -2.5V R2-2.5V R1 APPLICATION NOTE 2: SINGLE POWER SUPPLY AMPLIFIER Inverting Amplifier VOUT= VIN R R1 R2 Non Inverting Amplifier R2 VOUT= VIN R1 5V VIN 5V R1 R3 VBIAS 5V VOUT VIN R4 R3 VBIAS 5V R2 VOUT R4 R1 Note: For VOUT mid range of common mode voltage range, VBIAS = 2.5/(1R2/R1), VBIAS = 5*R4/(R3R4) SCD5900 Rev G 4/8/13 4 Aeroflex Plainview
8 APPLICATION NOTE 3: DIFFERENTIAL INPUT AMPLIFIER VOUT = Differential Input Amplifier R4 V R3 R4 R R1 V1 R R1 V1 R1 R2 VCC V2 R3 VEE VOUT R4 Note: Package and lid are electrically isolated from signal pads. FIGURE 3: PACKAGE OUTLINE SCD5900 Rev G 4/8/13 5 Aeroflex Plainview
9 ORDERING INFORMATION Model DLA SMD # Screening Package RHD Commercial Flow, 25 C testing only RHD5900-S - RHD S KXC RHD S KXA Military Temperature, -55 C to 125 C Screened in accordance with the individual Test Methods of MIL-STD-883 for Space Applications In accordance with DLA SMD 16-pin SOIC Package RHD S RHD S 5962H KXC 5962H KXA In accordance with DLA Certified RHA Program Plan to RHA Level "H", 1Mrad(Si) EXPORT CONTROL: This product is controlled for export under the International Traffic in Arms Regulations (ITAR). A license from the U.S. Department of State is required prior to the export of this product from the United States. EXPORT WARNING: Aeroflex s military and space products are controlled for export under the International Traffic in Arms Regulations (ITAR) and may not be sold or proposed or offered for sale to certain countries. (See ITAR for complete information.) PLAINVIEW, NEW YORK Toll Free: 800-THE-1553 Fax: SE AND MID-ATLANTIC Tel: Fax: INTERNATIONAL Tel: Fax: WEST COAST Tel: Fax: NORTHEAST Tel: Fax: CENTRAL Tel: Fax: info-ams@aeroflex.com Aeroflex Microelectronic Solutions reserves the right to change at any time without notice the specifications, design, function, or form of its products described herein. All parameters must be validated for each customer's application by engineering. No liability is assumed as a result of use of this product. No patent licenses are implied. Our passion for performance is defined by three attributes represented by these three icons: solution-minded, performance-driven and customer-focused SCD5900 Rev G 4/8/13 6
10 Standard Products RadHard-by-Design RHD5901 Quad Operational Amplifier Hi-Z Output Control April 8, 2013 FEATURES Single power supply operation (3.3V to 5.0V) or dual power supply operation (±1.65 to ±2.5V) Radiation performance - Total dose: >1Mrad(Si); Dose rate = rads(si)/s - ELDRS Immune - SEL Immune >100 MeV-cm 2 /mg - Neutron Displacement Damage >10 14 neutrons/cm 2 Rail-to-Rail input and output range Enable pin to Enable/Disable amplifiers in pairs. Short Circuit Tolerant Full military temperature range Designed for aerospace and high reliability space applications Packaging Hermetic ceramic SOIC - 16-pin,.411"L x.293"w x.105"ht - Weight grams max Aeroflex Plainview s Radiation Hardness Assurance Plan is DLA Certified to MIL-PRF-38534, Appendix G. GENERAL DESCRIPTION Aeroflex s RHD5901 is a radiation hardened, single supply, quad operational amplifier with enable in a 16-pin SOIC package. The RHD5901 design uses specific circuit topology and layout methods to mitigate total ionizing dose effects and single event latchup. These characteristics make the RHD5901 especially suited for the harsh environment encountered in Deep Space missions. It is guaranteed operational from -55 C to 125 C. Available screened in accordance with MIL-PRF Class K, the RHD5901 is ideal for demanding military and space applications. ORGANIZATION AND APPLICATION The RHD5901 amplifiers are capable of rail-to-rail input and outputs. Performance characteristics listed are for general purpose operational 5V CMOS amplifier applications. The amplifiers will drive substantial resistive or capacitive loads and are unity gain stable under normal conditions. Resistive loads in the low kohm range can be handled without gain derating and capacitive loads of several nf can be tolerated. CMOS device drive has a negative temperature coefficient and the devices are therefore inherently tolerant to momentary shorts, although on chip thermal shutdown is not provided. All inputs and outputs are diode protected. The devices will not latch with SEU events to above 100 MeV-cm 2 /mg. Total dose degradation is minimal to above 1Mrad(Si). Displacement damage environments to neutron fluence equivalents in the mid neutrons per cm 2 range are readily tolerated. There is no sensitivity to low-dose rate (ELDRS) effects. SEU effects are application dependent. The RHD5901 is configured with enable/disable control. Pairs of amplifiers are put in a power-down condition with their outputs in a high impedance state. Several useful operational amplifier configurations are supported where more than one amplifier can feed an output with others disabled. SCD5901 Rev F
11 VCC IN_A -IN_A A 1 OUT_A EN_AB IN_B -IN_B B 7 OUT_B IN_C -IN_C C 10 OUT_C EN_CD 9 IN_D -IN_D D OUT_D VEE FIGURE 1: BLOCK DIAGRAM OUT_A 1 16 OUT_D -IN_A IN_D IN_A 3 14 IN_D VCC IN_B 4 5 RHD VEE IN_C -IN_B IN_C OUT_B 7 10 OUT_C EN_AB 8 9 EN_CD 16-Pin SOIC FIGURE 2: PACKAGE PIN-OUT Notes: 1. Package and lid are electrically isolated from signal pads. 2. EN_AB enables amplifiers A & B. EN_CD enables amplifiers C & D. SCD5901 Rev F 4/8/13 2 Aeroflex Plainview
12 ABSOLUTE MAXIMUM RATINGS Parameter Range Units Case Operating Temperature Range -55 to 125 C Storage Temperature Range -65 to 150 C Junction Temperature 150 C Supply Voltage VCC - VEE 6.0 V Input Voltage VCC 0.4 VEE -0.4 V Lead Temperature (soldering, 10 seconds) 300 C Thermal Resistance, Junction to Case,jc 7 C/W ESD Rating (MIL-STD-883, Method 3015, class 2) 2,000-3,999 V 25 C 200 mw NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress rating only; functional operation beyond the Operation Conditions is not recommended and extended exposure beyond the Operation Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Typical Units VCC Power Supply Voltage 3.3 to 5.0 V VCM Input Common Mode Range VCC to VEE V ELECTRICAL PERFORMANCE CHARACTERISTICS (TC = -55 C TO 125 C, VCC = 5.0V -- UNLESS OTHERWISE SPECIFIED) Parameter Symbol Conditions Min Typ Max Units Quiescent Supply Current 1/ ICCQ EN = 1, No Load ma EN = 0, 2/ 300 na Input Offset Voltage 1/ VOS mv Input Offset Current 1/ IOS pa Input Bias Current IB Tc = 25 C, -55 C 1/ Tc = 125 C pa Common Mode Rejection Ratio CMRR db Power Supply Rejection Ratio PSRR db Output Voltage High VOH ROUT = 3.6 Kohms to GND 4.9 V Output Voltage Low VOL ROUT = 3.6 Kohms to VCC 0.1 V Short Circuit Output Current 2/ IO(SINK) VOUT to VCC ma IO(SOURCE) VOUT to VEE ma Slew Rate 1/ SR RL = 8K, Gain = V/uS SCD5901 Rev F 4/8/13 3 Aeroflex Plainview
13 ELECTRICAL PERFORMANCE CHARACTERISTICS (continued) (TC = -55 C TO 125 C, VCC = 5.0V -- UNLESS OTHERWISE SPECIFIED) Parameter Symbol Conditions Min Typ Max Units Open Loop Gain 1/ AOL No Load db Unity Gain Bandwidth 1/ UGBW RL = 10K MHz Input Voltage - Enable (EN_AB, EN_CD) Input Current - Enable (EN_AB, EN_CD) VHI High (Enabled) 3.5 V VLO Low (Disabled) 1.5 V IEN 10 na Channel Separation 2/ RL = 2K, f = 1.0KHz 84 db Input-Referred Voltage Noise 2/ e n F = 5 khz 15 nv/ Hz Phase Margin 2/ m Tc = 25 C, No load 30 Deg Notes: 1/ Specification derated to reflect Total Dose exposure to 1 25 C. 2/ Not tested. Shall be guaranteed by design, characterization, or correlation to other test parameters. SWITCHING CHARACTERISTICS (TC = -55 C TO 125 C, VCC = 5.0V -- UNLESS OTHERWISE SPECIFIED) Parameter Symbol Conditions Min Max Units Output Delay (Enabled) 2/ t ON EN 500 ns Output Delay (Disabled) 2/ t OFF EN 100 ns ENABLES (EN_AB or EN_CD) VCC 50% GND VOUT (VOUT_A&B or VOUT_C&D) t ON EN HI Z HI Z t OFF EN VCC GND SCD5901 Rev F 4/8/13 FIGURE 3: RHD5901 SWITCHING DIAGRAM 4 Aeroflex Plainview
14 RHD5901 QUAD OPERATIONAL AMPLIFIER APPLICATION NOTES APPLICATION NOTE 1: DUAL POWER SUPPLY AMPLIFIER VIN Inverting Amplifier VOUT= VIN R R1 R1 R2 EN 2.5V VIN Non Inverting Amplifier R2 VOUT= VIN R1 EN 2.5V VOUT VOUT -2.5V R2-2.5V R1 APPLICATION NOTE 2: SINGLE POWER SUPPLY AMPLIFIER Inverting Amplifier VOUT= VIN R R1 R2 Non Inverting Amplifier R2 VOUT= VIN R1 5V R1 EN 5V R3 EN 5V VIN 5V R3 Vbias VOUT VIN R4 Vbias R2 VOUT R4 R1 Note: For VOUT mid range of common mode voltage range, VBIAS = 2.5/(1R2/R1), VBIAS = 5*R4/(R3R4) SCD5901 Rev F 4/8/13 5 Aeroflex Plainview
15 APPLICATION NOTE 3: DIFFERENTIAL INPUT AMPLIFIER APPLICATION NOTE 4: MULTIPLE AMPLIFIERS VOUT = Differential Input Amplifier R4 V R3 R4 R R1 V1 R R1 R1 R2 V1 VCC Multiple Amplifiers - Selectable Output 5V A/B V1 V2 R3 EN R4 VEE VOUT ENV1 V2 C/D VOUT Note: Package and lid are electrically isolated from signal pads. FIGURE 4: PACKAGE OUTLINE SCD5901 Rev F 4/8/13 6 Aeroflex Plainview
16 ORDERING INFORMATION Model DLA SMD # Screening Package RHD Commercial Flow, 25 C testing only RHD5901-S - RHD S KXC RHD S KXA Military Temperature, -55 C to 125 C Screened in accordance with the individual Test Methods of MIL-STD-883 for Space Applications In accordance with DLA SMD 16-pin SOIC Package RHD S RHD S 5962H KXC 5962H KXA In accordance with DLA Certified RHA Program Plan to RHA Level "H", 1Mrad(Si) EXPORT CONTROL: This product is controlled for export under the International Traffic in Arms Regulations (ITAR). A license from the U.S. Department of State is required prior to the export of this product from the United States. EXPORT WARNING: Aeroflex s military and space products are controlled for export under the International Traffic in Arms Regulations (ITAR) and may not be sold or proposed or offered for sale to certain countries. (See ITAR for complete information.) PLAINVIEW, NEW YORK Toll Free: 800-THE-1553 Fax: SE AND MID-ATLANTIC Tel: Fax: INTERNATIONAL Tel: Fax: WEST COAST Tel: Fax: NORTHEAST Tel: Fax: CENTRAL Tel: Fax: info-ams@aeroflex.com Aeroflex Microelectronic Solutions reserves the right to change at any time without notice the specifications, design, function, or form of its products described herein. All parameters must be validated for each customer's application by engineering. No liability is assumed as a result of use of this product. No patent licenses are implied. Our passion for performance is defined by three attributes represented by these three icons: solution-minded, performance-driven and customer-focused SCD5901 Rev F 4/8/13 7
17 Standard Products RadHard-by-Design RHD5902 Quad Operational Amplifier High Speed with Enables March 25, 2013 FEATURES Single power supply operation (3.3V to 5.0V) or dual power supply operation (±1.65 to ±2.5V) Radiation performance - Total dose: > 1 Mrad(Si); Dose rate = rads(si)/s - ELDRS Immune - SEL Immune > 100 MeV-cm 2 /mg - Neutron Displacement Damage > neutrons/cm 2 Unity Gain Bandwidth 35 MHz Typical Rail-to-Rail input and output range Enable pin to Enable/Disable amplifiers in pairs. Short Circuit Tolerant Full military temperature range Designed for aerospace and high reliability space applications Packaging Hermetic ceramic SOIC - 16-pin,.411"L x.293"w x.105"ht - Weight grams max Aeroflex Plainview s Radiation Hardness Assurance Plan is DLA Certified to MIL-PRF-38534, Appendix G. GENERAL DESCRIPTION Aeroflex RHD5902 is a radiation hardened, single supply, high speed quad operational amplifier with enable in a 16-pin SOIC package. The RHD5902 design uses specific circuit topology and layout methods to mitigate total ionizing dose effects and single event latchup. These characteristics make the RHD5902 especially suited for the harsh environment encountered in Deep Space missions. It is guaranteed operational from -55 C to 125 C. Available screened in accordance with MIL-PRF Class K, the RHD5902 is ideal for demanding military and space applications. ORGANIZATION AND APPLICATION The RHD5902 amplifiers are capable of rail-to-rail input and outputs. Performance characteristics listed are for general purpose operational 5V CMOS amplifier applications. The amplifiers will drive substantial resistive or capacitive loads and are unity gain stable under normal conditions. Resistive loads in the low kohm range can be handled without gain derating and capacitive loads of several nf can be tolerated. CMOS device drive has a negative temperature coefficient and the devices are therefore inherently tolerant to momentary shorts, although on chip thermal shutdown is not provided. All inputs and outputs are diode protected. The devices will not latch with SEU events to above 100 MeV-cm 2 /mg. Total dose degradation is minimal to above 1 Mrad(Si). Displacement damage environments to neutron fluence equivalents in the mid neutrons per cm 2 range are readily tolerated. There is no sensitivity to low-dose rate (ELDRS) effects. SEU effects are application Dependant. The RHD5902 is configured with enable/disable control. Pairs of amplifiers are put in a power-down condition with their outputs in a high impedance state. Several useful operational amplifier configurations are supported where more than one amplifier can feed an output with others disabled. SCD5902 Rev B
18 IN_A -IN_A EN_AB IN_B -IN_B IN_C -IN_C EN_CD IN_D -IN_D A B C D 8 9 VCC 4 13 VEE OUT_A OUT_B OUT_C OUT_D FIGURE 1: BLOCK DIAGRAM OUT_A -IN_A IN_A VCC IN_B -IN_B OUT_B EN_AB RHD Pin SOIC Notes: 1. Package and Lid are electrically isolated from signal pads. 2. It is recommended that the Lid be grounded to prevent any ESD or static buildup. 3. EN_AB enables amplifiers A & B. EN_CD enables amplifiers C & D OUT_D -IN_D IN_D VEE IN_C -IN_C OUT_C EN_CD FIGURE 2: PACKAGE PIN-OUT Pin Signal Name Definition 1 OUT_A Output of Amplifier A. 2 -IN_A Inverting input of Amplifier A. 3 IN_A Non-Inverting input of Amplifier A. 4 VCC Voltage Supply. 5 IN_B Non-Inverting input of Amplifier B. 6 -IN_B Inverting input of Amplifier B. 7 OUT_B Output of Amplifier B. 8 EN_AB 9 EN_CD A Logic Low will disable Amplifiers A & B so that the outputs are high impedance. A Logic Low will disable Amplifiers C & D so that the outputs are high impedance. 10 OUT_C Output of Amplifier C. 11 -IN_C Inverting input of Amplifier C. 12 IN_C Non-Inverting input of Amplifier C. 13 VEE - Voltage Supply. 14 IN_D Non-Inverting input of Amplifier D. 15 -IN_D Inverting input of Amplifier D. 16 OUT_D Output of Amplifier D. TABLE 1: PIN-OUT DESCRIPTION SCD5902 Rev B 3/25/13 2 Aeroflex Plainview
19 ABSOLUTE MAXIMUM RATINGS Parameter Range Units Case Operating Temperature Range -55 to 125 C Storage Temperature Range -65 to 150 C Junction Temperature 150 C Supply Voltage VCC - VEE 6.0 V Input Voltage VCC 0.4 VEE -0.4 V Lead Temperature (soldering, 10 seconds) 300 C Thermal Resistance, Junction to Case,jc 7 C/W ESD Rating (MIL-STD-883, Method 3015, Class 2) 2,000-3,999 V 25 C 200 mw NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress rating only; functional operation beyond the Operation Conditions is not recommended and extended exposure beyond the Operation Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Typical Units VCC Power Supply Voltage 3.3 to 5.0 V Vcm Input Common Mode Range VCC to VEE V ELECTRICAL PERFORMANCE CHARACTERISTICS (TC = -55 C TO 125 C, VCC = 5.0V -- UNLESS OTHERWISE SPECIFIED) Parameter Symbol Conditions Min Max Units Input Offset Voltage 1/ VOS -4 4 mv Input Offset Current 1/ IOS pa Input Bias Current 1/ IB TC = 25 C, -55 C TC = 125 C pa Common Mode Rejection Ratio CMRR 60 db Power Supply Rejection Ratio PSRR 70 db Output Voltage High VOH ROUT = 720 ohms to GND 4.9 V Output Voltage Low VOL ROUT = 720 ohms to VCC 0.1 V Short Circuit Output Current 2/ IO(SINK) VOUT to VCC ma IO(SOURCE) VOUT to VEE ma Slew Rate 1/ SR RL = 8K, Gain = 1 12 V/uS Open Loop Gain 1/ AOL No Load 90 db Unity Gain Bandwidth 1/ UGBW 35 RL = 10K 23 MHz SCD5902 Rev B 3/25/13 3 Aeroflex Plainview
20 ELECTRICAL PERFORMANCE CHARACTERISTICS (continued) (TC = -55 C TO 125 C, VCC = 5.0V -- UNLESS OTHERWISE SPECIFIED) Parameter Symbol Conditions Min Max Units Input Voltage - Enable 2/ (EN_AB, EN_CD) Input Current - Enable 2/ (EN_AB, EN_CD) VHI High (Enabled) 3.5 V VLO Low (Disabled) 1.5 V IEN 10 na Quiescent Supply Current 1/ ICCQ All Amplifiers Enabled, No Load 5.5 ma All Amplifier Disabled 2/ 300 na Channel Separation 2/ RL = 2K, f = 1.0KHz 84 db Input-Referred Voltage Noise 2/ e n 46 F = 5 khz nv/ Hz Phase Margin 2/ m 30 Deg Notes: 1/ Specification derated to reflect Total Dose exposure to 1 25 C. 2/ Not tested. Shall be guaranteed by design, characterization, or correlation to other test parameters. SWITCHING CHARACTERISTICS (TC = -55 C TO 125 C, VCC = 5.0V -- UNLESS OTHERWISE SPECIFIED) Parameter Symbol Conditions Min Max Units Output Delay (Enabled) 2/ t ON EN 500 ns Output Delay (Disabled) 2/ t OFF EN 100 ns ENABLES (EN_AB or EN_CD) VCC 50% GND VOUT (VOUT_A&B or VOUT_C&D) t ON EN HI Z HI Z VCC GND t OFF EN FIGURE 3: RHD5902 SWITCHING DIAGRAM SCD5902 Rev B 3/25/13 4 Aeroflex Plainview
21 RHD5902 QUAD OPERATIONAL AMPLIFIER APPLICATION NOTES APPLICATION NOTE 1: DUAL POWER SUPPLY AMPLIFIER VIN Inverting Amplifier VOUT= VIN R R1 R1 R2 EN 2.5V VIN Non Inverting Amplifier R2 VOUT= VIN R1 EN 2.5V VOUT VOUT -2.5V R2-2.5V R1 APPLICATION NOTE 2: SINGLE POWER SUPPLY AMPLIFIER Inverting Amplifier VOUT= VIN R R1 R2 Non Inverting Amplifier R2 VOUT= VIN R1 5V R1 EN 5V R3 EN 5V VIN 5V R3 Vbias VOUT VIN R4 Vbias R2 VOUT R4 R1 Note: For VOUT mid range of common mode voltage range, VBIAS = 2.5/(1R2/R1), VBIAS = 5*R4/(R3R4) SCD5902 Rev B 3/25/13 5 Aeroflex Plainview
22 APPLICATION NOTE 3: DIFFERENTIAL INPUT AMPLIFIER APPLICATION NOTE 4: MULTIPLE AMPLIFIERS VOUT = Differential Input Amplifier R4 V R3 R4 R R1 V1 R R1 R1 R2 V1 VCC Multiple Amplifiers - Selectable Output 5V A/B V1 V2 R3 EN R4 VEE VOUT ENV1 V2 C/D VOUT Note: Package and lid are electrically isolated from signal pads. FIGURE 4: PACKAGE OUTLINE SCD5902 Rev B 3/25/13 6 Aeroflex Plainview
23 ORDERING INFORMATION Model DLA SMD # Screening Package RHD Commercial Flow, 25 C testing only RHD5902-S - RHD S KXC RHD S KXA Military Temperature, -55 C to 125 C Screened in accordance with the individual Test Methods of MIL-STD-883 for Space Applications DLA SMD 16-pin SOIC Package RHD S RHD S 5962H KXC 5962H KXA DLA SMD and Radiation Certification EXPORT CONTROL: This product is controlled for export under the International Traffic in Arms Regulations (ITAR). A license from the U.S. Department of State is required prior to the export of this product from the United States. EXPORT WARNING: Aeroflex s military and space products are controlled for export under the International Traffic in Arms Regulations (ITAR) and may not be sold or proposed or offered for sale to certain countries. (See ITAR for complete information.) PLAINVIEW, NEW YORK Toll Free: 800-THE-1553 Fax: SE AND MID-ATLANTIC Tel: Fax: INTERNATIONAL Tel: Fax: WEST COAST Tel: Fax: NORTHEAST Tel: Fax: CENTRAL Tel: Fax: info-ams@aeroflex.com Aeroflex Microelectronic Solutions reserves the right to change at any time without notice the specifications, design, function, or form of its products described herein. All parameters must be validated for each customer's application by engineering. No liability is assumed as a result of use of this product. No patent licenses are implied. Our passion for performance is defined by three attributes represented by these three icons: solution-minded, performance-driven and customer-focused SCD5902 Rev B 3/25/13 7
24 Aeroflex Microelectronic Solutions Aeroflex Plainview RadHard-by-Design Analog Series Radiation Test Report RHD5900/5901 Quad Operational Amplifiers Performed at: Air Force Research Laboratory (AFRL) Low Energy X-Ray (LEXR) facility Albuquerque, NM June 1-2, 2011
25 The Aeroflex RHD5900/5901 Quad Operational Amplifier The Aeroflex RHD5900/5901 is a Quad CMOS Operational Amplifier with Rail-To-Rail input/output capability. Several key characteristics of the Opamp are: Low voltage (3.3V to 5V), and Low Power (20mW) 2mV Offset Voltage 2V/μS Slew Rate 4MHz GBW Unity Gain Stable Deep Space Radiation Performance 1MRad (Si) Total Ionizing Dose (TID) Advertised but 10MRad (SiO 2 ) TID Tested Radiation Hardness Non-Critical for non-deep Space missions ELDRS Immune SEL Immunity > 100 MeV-cm 2 /mg Neutron displacement damage immunity > neutrons/cm 2 ESD protection qualified at 2kV Body Model Levels 2
26 The Aeroflex RHD5900/5901 Quad Operational Amplifier Sleep Mode by means of Enable Pins Power Savings Tri-State Offers logically controlled redundancy by Wire ORing outputs and inputs. Output Drive Flexibility Amplifiers can be wired in parallel to multiply output drive capability Radiation Hardened by Design using 0.5μm commercial CMOS technology. Edgeless/Annular nfet topology Full (Double) Guard Rings Full military temperature range (-55 C to 125 C) Ideal for all orbits (LEO, GEO, MEO) and deep space. Competitively priced 3
27 Radiation Performance Explanation The 5901 opamp (and all parts in the series) are characterized by rigorous application of annular nfets and double guardrings Annular nfets eliminate total dose induced edge leakage Degenerately doped guardrings around both nfets and pfets eliminate inter-device leakage Guardrings also produce excellent single event and prompt dose latchup immunity These layout techniques produce multi-mrad TID hardness; the data reported here indicate the RHD5901 opamp is good to at least 10 MRad(SiO 2 ) RHD Series parts are hardness non-critical for typical space applications and are uniquely suited for strategic and/or deep space missions. The design is CMOS-only and consequently ELDRS immune and robust to neutron displacement damage to fluencies on the order of n/cm 2. 4
28 The RHD5900 and 5901 Layout RHD5900 RHD5901 5
29 Top Level Block A IN IN IN50B IN50D VCC VEE VEE VCC EN EN PAD LOCATIONS FOR ILLUSTRATION ONLY ACTUAL LOCATIONS WILL BE DETERMINED DURING LAYOUT NIN2 OUT2 OUT4 NIN4 D22 D24 D26 D28 D30 D32 D34 D36 R07 1 R08 1 D21 D23 D25 D27 D29 D31 D33 D35 VCC D20 D19 D18 D17 UGAMP U02 U04 UGAMP D39 D40 B BIASET VCC IN50A ENA IN50B ENB IN50C VEE IN50D U05 D16 D15 D14 D13 C D12 VCC VEE VEE VCC IN50A IN50C IN IN D10 D09 D47 D48 D41 D42 R R09 D37 D38 PIN2 PIN4 NIN2I NIN4I PIN2I PIN4I VCC VEE VCC VCC ENAI ENBI VEE IN50A IN50B IN50C IN50D UGAMP EN U01 U03 UGAMP EN PIN1 D11 D43 D44 R05 1 D45 ENAI ENBI 1 R10 PIN3 D46 PIN1I PIN3I NIN1I IN3I NIN1 R R11 NIN3 D07 D05 D04 D01 D55 D53 D51 D49 1 R03 1 R12 D08 D06 D03 D02 D56 D54 D52 D50 OUT1 ENA ENB OUT3 D TECHNOLOGY APPLICATION GROUP 351 W. Country Hills Dr. La Habra, CA OP_PS 6 4OP_PS Date: 6/8/ :10:10 PM Name: Sheet 01 of 01
30 RHD5900/5901 Functionality N and P Input stages are superimposed Quiescent currents and voltages for matching transistors are equal, swings are very small. For a common mode input near the negative rail, the N input stage is Starved /Inactive. For a common mode input near the positive rail, the P input stage is Starved /Inactive. Capacitors/Bias-levels determine slew rate and bandwidth. Virtually all voltage gain occurs in the output stage. 7
31 RHD5900/5901 TID Test Background Radiation testing was performed using the Low Energy X-Ray (LEXR) facility at AFRL in Albuquerque, NM. LEXR energy ~ 0.01 MeV Exposures were done to a dose of 18 MRad(Si) Dosimetry performed by AFRL using a Silicon diode dosimeter Assuming Charged Particle Equilibrium*, A LEXR exposure to 18 Mrad(Si) corresponds to a dose of 10MRad(SiO 2 ) for the device oxide layers. 18MRad Si /1.793 Si SiO 2 ~ 10MRad(SiO 2 ) * Charged Particle Equilibrium is an approximation. Actual dose in device oxide layers depends on proximity to other materials, interface and other non-equilibrium effects and may in fact be higher than 10MRad(SiO 2 ) in some areas. 8
32 RHD5900/5901 TID Characterization Five packaged parts (20 amplifiers) were exposed to the X- Ray Environment provided by the Low Energy X-Ray (LEXR) Facility at Kirtland Air Force Base. Four packages (16 amplifiers) were irradiated in a functional gain of -5 (or -4). Half (eight) of the amplifiers (two from each package) were irradiated in a small signal linear configuration. The other two amplifiers from each package were irradiated in an extreme input overload condition to apply an extreme worst case bias mismatch condition. One package (four amplifiers) were irradiated in an unpowered configuration. 9
33 RHD5900/5901 TID Procedure Data was taken from a total of 8 packages (32 amplifiers) including 16 amplifiers irradiated in operating conditions, 4 unpowered amplifiers, and 12 spares/controls. Data taken at levels of: Pre-Rad, 10k, 30k, 50k, 100k, 300k, 500k, 1M, 2M, 5M and 10MRad SiO 2 and after a powered anneal (100 C for 168 hours). Standard Kirtland Air Force Base dosimetry was employed and all parts were exposed de-lidded. Operation of the parts was observed during radiation and parts and boards were transported from the exposure area to the characterization test apparatus after each incremental exposure. LEXR source exposure area was calibrated using special photo paper. 10
34 LEXR Calibration Paper Calibration paper used for LEXR Source: 11
35 RHD5900/5901 TID Exposure Board #1 Exposure board #1 (Original) picture: 12
36 RHD5900/5901 TID Exposure Board #1 Exposure board schematic (Original): 13
37 RHD5900/5901 TID Exposure Board #2 Exposure board #2 (Rev A) picture: 14
38 RHD5900/5901 TID Exposure Board #2 Exposure board schematic (Rev A): 15
39 RHD5900/5901 TID Test Board Test Board Picture: 16
40 RHD5900/5901 TID Test Board Schematic 17
41 RHD5900/5901 TID Exposure Board Radiation exposure cell: 18
42 LEXR Facility at AFRL 19
43 RHD5900/5901 TID Test Results Exposure to 10MRad(SiO 2 ) required two days of test time. No hard failures occurred. Discontinuity in data at 2MRad(SiO 2 ) occurred because of overnight anneal. The most significant parameter shifts measured for devices irradiated in small signal conditions were offset changes on the order of 2-3mV, operating supply current variations of approx 30% (lower than operating temperature variations). Sleep current rose from a value beyond the noise floor of the test equipment to a maximum of < 10µA at 10MRad(SiO 2 ). Sleep current annealed back to very small values at room temperature or 100 C. 20
44 RHD5900/5901 TID Test Results Intentional ABUSIVE input overload bias conditions were included during the irradiation conditions. Quality device performance is obtained even under ABUSIVE bias to levels of 300kRads(SiO 2 ). Moderate attention to application configuration allows the amplifiers to perform at levels typical of high performance commercial operational amplifiers to 10MRad(SiO 2 ) and beyond. Input stage overload bias conditions are detailed on the following slide. 21
45 Input Stage Overload Bias Conditions 100U I_8 IDC 5 VDC () 1.0 VDC (-) 1.0 VDC 1.5 VDC (-) () - INPUT (-) () 1.7 VDC 0.8 VDC () 1.7 VDC (-) I_4 10K I_3 10K 1.6 VDC () (-) 100U 2.5 VDC 2.5 VDC INPUT - INPUT INPUT () I_10 IDC 3.4 VDC 5 VDC () 0.9 VDC (-) 0.8 VDC 1.8 VDC 4.3 VDC (-) () (-) I_6 10K I_5 10K 100U I_7 IDC 100U I_9 IDC LEFT RIGHT AMPLIFIER OFFSET LEFT RIGHT AMPLIFIER OFFSET P VDC 1.5 VDC GOES POSITIVE P 1.6 VDC VDC GOES NEGATIVE N VDC 0.8 VDC GOES POSITIVE N 0.8 VDC VDC GOES NEGATIVE NEGATIVE INPUT OVERLOAD POSITIVE INPUT OVERLOAD 22
46 RHD5900/5901 TID Supply Currents All devices active and each half of the devices active are plotted in one graph. The bias generator curve is the classic nfet V TH curve Four conditions are reported for supply voltages of 5, 4 and 3.3 volts. They are: All Devices Active Half of the devices inactive The opposite half of the devices inactive Sleep 23
47 RHD5900/5901 TID Supply Currents The amplifiers share a common bias current generation in each package. The current reference elements are two diode connected nfets in series. Bias current levels follow the two FET Diode Drops The bias current level can be used as a dosimeter and to serve the threshold shift behavior of the nfets. The form of the supply variation exactly follows the class nfet threshold shift and Turn Around. 24
48 IDD (Vcc = 5) vs Rads (SiO 2 ) 5. 0 POWER SUPPLY CURRENT (m A) v s RADS (Si02) ALL DEVI CES ACTI VE; HALF ACTI VE 4. 0 SUPPLY CURRENT ( m A) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 25
49 Sleep Current (Vcc = 5) vs Rads (SiO 2 ) POWER SUPPLY SLEEP CURRENT (ua) v s RADS (Si02) SUPPLY CURRENT ( ua) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 26
50 IDD (Vcc = 4) vs Rads (SiO 2 ) 5. 0 POWER SUPPLY CURRENT (m A) v s RADS (Si02) ALL DEVI CES ACTI VE; HALF ACTI VE 4. 0 SUPPLY CURRENT ( m A) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 4; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 27
51 Sleep Current (Vcc = 4) vs Rads (SiO 2 ) POWER SUPPLY SLEEP CURRENT (ua) v s RADS (Si02) SUPPLY CURRENT ( ua) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 4; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 28
52 IDD (Vcc = 3.3) vs Rads (SiO 2 ) 5. 0 POWER SUPPLY CURRENT (m A) v s RADS (Si02) ALL DEVI CES ACTI VE; HALF ACTI VE 4. 0 SUPPLY CURRENT ( m A) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 3. 3; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 29
53 Sleep Current (Vcc = 3.3) vs Rads (SiO 2 ) POWER SUPPLY SLEEP CURRENT (ua) v s RADS (Si02) SUPPLY CURRENT ( ua) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 3. 3; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 30
54 RHD5900/5901 TID Input Leakage Currents Input leakage is generated only by the diodes and diffused resistors used in the input protection structures. The currents are NOT bias currents. They are bulk and surface leakage. Measuring currents in the 10pA are difficult to measure due to noise. Leakage typical behavior: Initial leakage currents are at noise floor limits of the test equipment Leakages rise to hundreds of pa when large doses are accumulated in times extremely short compared to system lifetimes. Leakages anneal back to immeasurable or, at worst, 10-20pA levels at room temperature or 100 C. Input leakage will remain in the 10pA range for any system accumulated dose including and beyond 10MRad(SiO 2 ) under any bias conditions. Offset leakage currents are in the pa range for any dose. 31
55 Input leakage: Radiation biases measured at Vdd = 5,V CM = INPUT LEAKAGE (pa) v s RADS (Si02) ALL BIAS CONDI TIONS, VCM = LEAKAG E CURRENT ( pa) (- INPUT) ( INPUT) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; VCM = 2. 5, T = 25C FO UR PACKAG ES, 16 AM PLI FI ERS, 32 LEADS 32
56 Input Leakage Current Measurement Problems Input leakage was measured by closing an operational amplifier server loop around the device under test. A resistor was inserted in one or the other (or both) input leads. The voltage required to return the output of the device under test to a set voltage was measured with resistors present or shorted. The feedback voltage plus/minus the amplifier voltage offset and the resistor value was used to device the input leakage. Leakage measurements were compromised for two reasons: Scale factors had been chosen to allow for considerably higher initial and radiation caused leakage. The offset voltage was measured at common mode voltage increments 0.5 volts away from the common mode input where current was measured. The correction for offset was then improper and when combined with the scale factor caused leakage measurements for any common mode other than Vdd/2 to be incorrect and high. Post test action: All parts were annealed at 100 C for 168 hours following irradiation. Post anneal leakage currents for all parts (irradiated to 10MRad(SiO 2 )) were measured over the rail-to-rail common mode range The resulting data is shown in the following chart Leakages are well behaved and very low 33
57 Input leakage: Radiation biases vs V CM = 2.5, 10MRad(SiO 2 ) Post Anneal 34
58 RHD5900/5901 Offset Voltage Shift The amplifiers are designed with matched transistors and bias voltages to optimize nominal performance parameters and total dose radiation tolerance. Initial offsets have a 3-Sigma distribution of approximately /- 2mV Under normal closed loop conditions (input not in overload), the changes in offset is less than 2mV to at least 10MRad(SiO 2 ). The data for eight amplifiers (four packages) are shown in the following charts. For most applications, minimal device derating is required to 10MRad(SiO 2 ) or more. For maximum hardness, devices should only be allowed to incur input overload for a small percentage of their system lifetime (by system design). Input overload behavior is described in subsequent pages. 35
59 Offset (Small Signal Bias), VDD = 5, VCM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; VCM = 4. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 36
60 Offset (Small Signal Bias), VDD = 5, V CM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; VCM = 2. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 37
61 Offset (Small Signal Bias), VDD = 5, VCM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; VCM = 0. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 38
62 Offset (Small Signal Bias), VDD = 4, VCM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 4; VCM = 3. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 39
63 Offset (Small Signal Bias), VDD = 4, V CM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 4; VCM = 2, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 40
64 Offset (Small Signal Bias), VDD = 4, VCM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 4; VCM = 0. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 41
65 Offset (Small Signal Bias) VDD = 3.3, VCM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 3. 3; VCM = 2. 8, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 42
66 Offset (Small Signal Bias) VDD = 3.3, V CM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 3. 3; VCM = 1. 65, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 43
67 Offset (Small Signal Bias) VDD = 3.3, V CM = OFFSET VOLTAGE (m V) v s RADS (Si02) SMALL SIGNAL BIAS DURI NG IRRADIATION 3. 0 O FFSET VO LTAG E ( m V) PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 3. 3; VCM = 0. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 44
68 Average Offset (Small Signal Bias) 10 MRad(SiO 2 ) Post Anneal 45
69 RHD5900/5901 TID Offset vs Bias Overload input voltage conditions maximizes input stage shift mismatch. Two input stages are active for V(Pin) = 2.5. A pfet and an nfet stage with summed currents. The offset is the difference of the differences. The input stage transistors operate with small Vg-Vth. Since threshold shifts nearing 200mV will occur at 1MRad(SiO 2 ) under high input overload, the input stage will lose control of the circuit under abusive bias conditions. Even under the worst conditions, operation to above 100kRad(SiO 2 ) is possible. Limiting or eliminating overload makes operation to 10MRad(SiO 2 ) or more without appreciable derating a real option. The following chart illustrates the extreme overload conditions. During normal operation, all FET voltages are equal and remain equal regardless of parameter changes. 46
70 Offset (Overload Bias), VDD = 5, VCM = OFFSET VOLTAGE (m V) v s RADS (Si02) OVERLOADBIAS DURI NG IRRADIATION 0. 0 O FFSET VO LTAG E ( m V) C(-) B () PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; VCM = 4. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 47
71 Offset (Overload Bias), VDD = 5, V CM = OFFSET VOLTAGE (m V) v s RADS (Si02) OVERLOADBIAS DURI NG IRRADIATION C(-) O FFSET VO LTAG E ( m V) B() PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; VCM = 2. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 48
72 Offset (Overload Bias), VDD = 5, V CM = OFFSET VOLTAGE (m V) v s RADS (Si02) OVERLOADBIAS DURI NG IRRADIATION O FFSET VO LTAG E ( m V) C(-) B () PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; VCM = 0. 5, T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 49
73 Average Offset (Overload Bias) 10MRad(SiO 2 ) Post-Anneal 50
74 Input Overload Avoidance Non-inverting unity gain amplifiers do not experience overload. Servo systems in linear controls do not experience prolonged overload Scaling amplifiers do not experience overload Filters, power supplies, signal processing systems do no experience prolonged overload. Sensor systems do not experience prolonged overload Clipping/clamping/signal-scaling can eliminate overload in most cases System engineering is the best solution for avoiding overload. 51
75 Offset Voltage vs Overload Voltage During Irradiation Half of the samples were irradiated with /- Vdd/2 input voltage overload. The overload condition is highly unrealistic for operating small signal linear circuits. The amplifiers are not intended to be comparators. However, good performance can be obtained to several hundred krad(sio 2 ) even with large input overload and if the input overload duty cycle is less than 100%, the offset as a comparator is the same as that presented for an amplifier. 52
76 Open Loop Gain Gain is load dependent. For loads above 100K, open loop gain approaches 120dB. Open loop gain measurement is difficult for levels above 100dB due to reading uncertainty. Data shown on following slides shows open loop gain for loads from moderate to heavy loading. Gain is shown as a function of Rads (SiO 2 ) for Vdd = 5, 4 and
77 Open Loop Gain (VCC = 5) vs Rads (SiO 2 ) OPEN LOOP GAIN v s RADS (Si02) LOADS: 75K, 10K K O PEN LO O P G AI N ( db) K PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 5; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 54
78 Open Loop Gain (VCC = 4) vs Rads (SiO 2 ) OPEN LOOP GAIN v s RADS (Si02) LOADS: 75K, 10K K O PEN LO O P G AI N ( db) K PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 4; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 55
79 Open Loop Gain (VCC = 3.3) vs Rads (SiO 2 ) OPEN LOOP GAIN v s RADS (Si02) LOADS: 75K, 10K K O PEN LO O P G AI N ( db) K PO ST RAD ANNEAL KAFB LEXR JUNE 2, 2011 TO TAL DO SE ( M EG ARADS SiO 2) 100C FO R 168 HO URS VDD = 3. 3; T = 25C FO UR PACKAG ES, 8 AM PLI FI ERS 56
80 RHD5900/5901 TID Power Supply Rejection Ratio Power supply rejection ration was measured by stepping the power supply from 5.0V to 3.3V. While this method is pessimistic, it results in a value which is representative of the rejection ratio for the full range of Vdd (5 to 3.3V). The average value of the PSRR for eight amplifiers is plotted. 57
81 Power Supply Rejection Ratio vs Rads (SiO 2 ) (VCC Step: 5.0 to 3.3) 58
82 RHD5900/5901 TID Common Mode Rejection Ratio Methodology: The common mode input voltage was stepped from 0.5 to 4.5Vdc for Vdd = 5, 0.5 to 3.5 for Vdd = 4 and 0.5 to 2.8 for Vdd=3.3 This method causes the common mode range to cross the maximum large signal swings of Vos. The resulting CMRR is very pessimistic compared to a small signal measurement. The average value of the CMRR for eight amplifiers and three power supply voltages is plotted. 59
83 Common Mode Rejection Ratio vs Rads (SiO 2 ) 60
84 RHD5900/5901 TID Gain Compression For voltages near the power supplies, resistive loads result in the A/B output stage transistors in the linear region. The output is just a resistor and the Vgs is large compared to the threshold shift with radiation. The data are for 0.02, 0.05 and 0.1 volts away from the rails and for pull-up and pull-down 2k loads respectively. Eight devices are averaged for each plotted point. Points are plotted for 10k, 100k, 1M and 10M. The input-output error is proportionately smaller for larger load resistance values. Pre-rad data can be used for any total dose. 61
85 Gain Compression (2K Up/Down Load) INPUT/OUTPUT ERROR (VOLTS) GAI NCOMPRESSI ONNEARTHE RAI LS (0. 01, 0. 1, 1, 10 MEGARADS) O UTPUT - I NPUT ( VO LTS) I NPUT VO LTAG E ( VO LTS) KAFB LEXR JUNE 2, 2011 VDD = 5; T = 25C AVERAG E O F EI G HT AM PLI FI ERS 62
86 RHD5900/5901 TID Pulse Test The device current drain is nearly proportional to both bandwidth and slew rate. Total dose changes in bandwidth and slew rate are no more than those caused by temperature extremes. High quality operational amplifier performance is obtained to 10MRad(SiO 2 ) and beyond. Input overload should be avoided, eliminated or the duty cycle should be minimized to avoid offset voltage shift. The following pre/post 10MRad(SiO 2 ) pulse waveforms are shown for a closed loop gain of -67(inverting) configuration. 63
87 RHD5900/5901 TID Pulse/Slew Rate Test Pulse response: Pulse response is shown pre-rad and post for inverting gains of 67 and 4.36 Gain values were convenient for characterization purposes High gain demonstrates GBW limited rise time Low gain demonstrates slew-rate limit and Ring Slew Rate: An input signal sufficient to cause the amplifier to step from overload at one supply to overload at the other supply. A time cursor is placed at 0.5 or 4.5 volts. A second time cursor is places 1µS later in time than the 0.5 or 4.5 volt crossing. The delta V between the two cursors is reported as slew rate in Volts per μs. 64
88 Pre and Post 10 MRad(SiO 2 ) Pulse Response Inverting 67x Pre-Irradiation Post-Irradiation 10 MRad (SiO 2 ) 65
89 Pre and Post 10 MRad(SiO 2 ) Step Response (4.36X) STEP - STEP Pre-Irradiation Post-Irradiation 10 MRad (SiO 2 ) 66
90 Pre and Post 10MRad(SiO 2 ) Slew Rate STEP - STEP Pre-Irradiation Post- Irradiation 10 MRad (SiO 2 ) 67
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