MC145443DW MC145443P. Freescale Semiconductor, Inc. MC145442

Transcription

1 Freescale Semiconductor, Inc. The MC45442 and MC4544 silicongate CMOS singlechip lowspeed modems contain a complete frequency shift keying (FSK) modulator, demodulator, and filter. These devices are with CCITT V.2 (MC45442) and Bell 0 (MC4544) specifications. Both devices provide fullduplex or halfduplex 00baud data communication over a pair of telephone lines. They also include a carrier detect circuit for the demodulator section and a duplexer circuit for direct operation on a telephone line through a simple transformer. MC45442 Compatible with CCITT V.2 MC4544 Compatible with Bell 0 LowBand and HighBand BandPass Filters OnChip Simplex, HalfDuplex, and FullDuplex Operation Originate and Answer Mode Analog Loopback Configuration for Self Test Hybrid Network Function OnChip Carrier Detect Circuit OnChip Adjustable Transmit Level and Delay Timing OnChip Crystal Oscillator (.59 MHz) Single 5 V Power Supply Operation Internal MidSupply Generator PowerDown Mode Pin Compatible with MM4HC94 Capable of Driving 9 dbm into a 600 Ω Load PIN ASSIGNMENT T RxD 5 A Xout Xin FB P SUFFIX PLASTIC DIP CASE 8 DW SUFFIX SOG PACKAGE CASE 5D ORDERING INFORMATION MC45442P MC4544P MC45442DW MC4544DW Plastic DIP Plastic DIP SOG Package SOG Package TLA VAG Exl RxA SQT MODE VSS REV 8/95 MC45442

2 Freescale Semiconductor, Inc. BLOCK DIAGRAM RxA 5 6 AAF S/H LOWBAND HIGHBAND AC AMP * CARRIER DETECT 4 0 T A DEMOD 5 RxD FB MODE SQT TLA Xout Xin OSCILLATOR MODE CONTROL MODULATOR CLOCK DIVIDER SAMPLING CLOCK:.82 khz SAMPLING CLOCK: 9.46 khz SMOOTHING FILTER INTERNAL VAG ANALOG GROUND GENERATOR ExI VAG VSS * Refer to the FB pin description. ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to VSS) Rating Symbol Value Unit Supply Voltage 0.5 to.0 V DC Input Voltage Vin 0.5 to 0.5 V DC Output Voltage Vout 0.5 to 0.5 V Clamp Diode Current, per Pin IIK, IOK ± ma DC Output Current, per Pin Iout ± 28 ma Power Dissipation PD 500 mw Operating Temperature Range TA 40 to 85 C Storage Temperature Range Tstg 65 to 50 C This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSS (Vin or Vout) ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or ). RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Unit Supply Voltage V DC Input or Output Voltage Vin, Vout 0 V Input Rise or Fall Time tr, tf 500 ns Crystal Frequency* fcrystal MHz * Changing the crystal frequency from.59 MHz will change the output frequencies. The change in output frequency will be proportional to the change in crystal frequency. MC4544

3 DC ELECTRICAL CHARACTERISTICS ( = 5.0 V ± 0%, TA = 40 to 85 C) HighLevel Input Voltage Freescale Semiconductor, Inc. Characteristic Symbol Min Typ Max Unit Xin,, Mode, SQT VIH V LowLevel Input Voltage Xin,, Mode, SQT VIL 0.8. V HighLevel Output Voltage VOH V IOH = µa, RxD 0. IOH = 2 ma, RxD. IOH = µa Xout 0.05 LowLevel Output Voltage VOL V IOL = µa, RxD 0. IOL = 2 ma, RxD 0.4 IOL = µa Xout 0.05 Input Current,, Mode, SQT Iin ±.0 µa RxA, Xin 0 ± 2 ± 0 Quiesent Supply Current (Xin or fcrystal =.59 MHz) IDD 0 ma PowerDown Supply Current 0 00 µa Input Capacitance Xin All Other Inputs Cin VAG Output Voltage (IO = ± 0 µa) VAG V A Output Voltage (IO = ± 0 µa) VA..2. V Line Driver Feedback Resistor Rf 0 0 kω 0 0 pf AC ELECTRICAL CHARACTERISTICS ( = 5.0 V ± 0%, TA = 40 to 85 C, Crystal Frequency =.59 MHz ± 0.%; See Figure ) TRANSMITTER Power Output on RL =.2 kω, RTLA = RL =.2 kω, RTLA = 5.5 kω Characteristic Min Typ Max Unit dbm Second Harmonic Power RL =.2 kω 56 dbm RECEIVE FILTER AND HYBRID Hybrid Input Impedance RxA, kω FB Output Impedance 6 kω Adjacent Channel Rejection 48 dbm DEMODULATOR Receive Carrier Amplitude 48 2 dbm Dynamic Range 6 db Bit Jitter (S/N = 0 db, Input = 8 dbm, Bit Rate = 00 baud) 00 µs Bit Bias 5 % Carrier Detect Threshold (A =.2 V or A grounded through a capacitor) On to Off Off to On 44 4 dbm MC45442

4 TEST INPUT RTLA 600 Ω 600 Ω 5 6 RxA TEST T OUTPUT 4.59 MHz ± 0.% 8 Xout TLA MC45442 MC4544 CT 9 Xin RxD 5 FB 0 CFB Figure. AC Characteristics Evaluation Circuit Freescale Semiconductor, Inc. Din Dout Table. Bell 0 and CCITT V.2 Frequency Characteristics Originate Mode Answer Mode Data Transmit Receive Transmit Receive Bell 0 (MC4544) Space 00 Hz 25 Hz 25 Hz 00 Hz Mark 20 Hz 2225 Hz 2225 Hz 20 Hz CCITT V.2 (MC45442) Space 80 Hz 850 Hz 850 Hz 80 Hz Mark 980 Hz 650 Hz 850 Hz 980 Hz NOTE: Actual frequencies may be ± 5 Hz assuming MHz crystal is used. MAXIMUM LEVEL OF OUTOFBAND ENERGY RELATIVE TO THE TRANSMIT CARRIER LEVEL INTO 600 Ω (khz) PIN DESCRIPTIONS Positive Power Supply (Pin 6) This pin is normally tied to 5.0 V. VSS Negative Power Supply (Pin 2) This pin is normally tied to 0 V. TRANSMIT CARRIER LEVEL (dbm) db/octave VAG Analog Ground (Pin 9) Analog ground is internally biased to ( VSS) / 2. This pin must be decoupled by a capacitor from VAG to VSS and a capacitor from VAG to. Analog ground is the common bias line used in the switched capacitor filters, limiter, and slicer in the demodulation circuitry. TLA Transmit Level Adjust (Pin ) This pin is used to adjust the transmit level. Transmit level adjustment range is typically from 2 dbm to 9 dbm. (See Applications Information.) Transmit Data (Pin ) Binary information is input to the transmit data pin. Data entered for transmission is modulated using FSK techniques. A logic high input level represents a mark and a logic low represents a space (see Table ). Transmit Carrier (Pin ) This is the output of the line driver amplifier. The transmit carrier is the digitally synthesized sine wave output of the modulator derived from a crystal oscillator reference. When a.59 MHz crystal is used the frequency outputs shown in Table apply. (See Applications Information.) Figure 2. OutofBand Energy ExI External Input (Pin 8) The external input is the noninverting input to the line driver. It is provided to combine an auxiliary audio signal or speech signal to the phone line using the line driver. This pin should be connected to VAG if not used. The average level must be the same as VAG to maintain proper operation. (See Applications Information.) Driver Summing Input (Pin ) The driver summing input may be used to connect an external signal, such as a DTMF dialer, to the phone line. A series resistor, R, is needed to define the voltage gain AV (see Applications Information and Figure 6). When applying a signal to do pin, the modulator should be squelched by bringing SQT (Pin 4) to a logic high level. The voltage gain, AV, is calculated by the formula AV = Rf/R (where Rf kω). For example, a kω resistor for R will provide unity gain (AV = kω/ kω = ). This pin must be left open if not used. RxD Receive Data (Pin 6) The receive data output pin presents the digital binary data resulting from the demodulation of the receive carrier. If no carrier is present, high, the receive data output (RxD) is clamped high. MC4544

5 , RxA Receive Carrier (Pins 5, 6) The receive carrier is the FSK input to the demodulator through the receive bandpass filter. RxA is the noninverting input and is the inverting input of the receive hybrid (duplexer) operational amplifier. Analog Loopback (Pin 2) When a high level is applied to this pin (SQT must be low), the analog loopback test is enabled. The analog loopback test connects the pin to the pin and the RxA to analog ground. In loopback, the demodulator frequencies are switched to the modulation frequencies for the selected mode. (See Tables and 2 and Figures 4c and 4d.) When is connected to analog ground (VAG), the modulator generates an echo cancellation tone of 0 Hz for MC45442 CCITT V.2 and 2225 Hz for MC4544 Bell 0 systems. For normal operation, this pin should be at a logic low level (VSS). The powerdown mode is enabled when both and SQT are connected to a logic high level (see Table 2). MODE Pin SQT Pin 4 Table 2. Functional Table Pin 2 Operating Mode 0 0 Originate Mode Answer Mode X 0 VAG (/2) Echo Tone X 0 Analog Loopback X 0 Squelch Mode X VAG (/2) Squelch Mode X Power Down MODE Mode (Pin ) This input selects the pair of transmit and frequencies used during modulation and demodulation. When a logic high level is placed on this input, originate (Bell) or channel (CCITT) is selected. When a low level is placed on this input, answer (Bell) or channel 2 (CCITT) is selected. (See Tables and 2 and Figure 4.) T Carrier Detect Timing (Pin 4) A capacitor on this pin to VSS sets the amount of time the carrier must be present before goes low (see Applications Information for the capacitor values). Freescale Semiconductor, Inc. by T, Pin 4). This pin is held at the logic low level until the signal falls below the maximum threshold level for longer than the turn off time. (See Applications Information and Figure 5.) A Carrier Detect Adjust (Pin ) An external voltage may be applied to this pin to adjust the carrier detect threshold. The threshold hysteresis is internally fixed at db (see Applications Information). Xout, Xin Crystal Oscillator (Pins 8, 9) A crystal reference oscillator is formed when a.59 MHz crystal is connected between these two pins. Xout (Pin 8) is the output of the oscillator circuit, and Xin (Pin 9) is the input to the oscillator circuit. When using an external clock, apply the clock to the Xin (Pin 9) pin and leave Xout (Pin 8) open. An internal 0 MΩ resistor and internal capacitors, typically 0 pf on Xin and 6 pf on Xout, allow the crystal to be connected without any other external components. Printed circuit board layout should keep external stray capacitance to a minimum. FB Filter Bias (Pin 0) This is the negative input to the ac amplifier. In normal operation, this pin is connected to analog ground through a bypass capacitor in order to cancel the input offset voltage of the limiter. It has a nominal input impedance of 6 kω. (see Figure ). SQT Transmit Squelch (Pin 4) When this input pin is at a logic high level, the modulator is disabled. The line driver remains active if is at a logic low level (see Table 2). When both and SQT are connected to a logic high level, see Table 2, the entire chip is in a power down state and all circuitry except the crystal oscillator is disabled. Total power supply current decreases from 0 ma (Max) to 00 µa (Max). FROM BANDPASS FILTER 6 kω 490 kω TO CARRIER DETECT CIRCUIT AND DEMODULATOR Carrier Detect Output (Pin ) This output is used to indicate when a carrier has been sensed by the carrier detect circuit. This output goes to a logic low level when a valid signal above the maximum threshold level (defined by A, Pin ) is maintained on the input to the hybrid circuit longer then the response (defined 0 FB Figure. ac Amplifier Circuit MC

6 GENERAL DESCRIPTION The MC45442 and MC4544 are fullduplex lowspeed modems. They provide a 00baud FSK signal for bidirectional data transmission over the telephone network. They can be operated in one of four basic configurations as determined by the state of MODE (Pin ) and (Pin 2). The normal (nonloopback) and self test (loopback) modes in both answer and originate modes will be discussed. For an originate or channel mode, a logic high level is placed on MODE (Pin ) and a logic low level is placed on (Pin 2). In this mode, transmit data is input on, where it is converted to a FSK signal and routed through a low band bandpass filter. The filtered output signal is then buffered by the Tx opamp line driver, which is capable of driving 9 dbm onto a 600 Ω line. The receive signal is connected through a hybrid duplexer circuit on Pins 5 and 6, and RxA. The signal then passes through the antialiasing filter, the sampleandhold circuit, is switched into the high band bandpass filter, and then switched into the ac amplifier circuit. The output of the ac amplifier circuit is routed to the demodulator circuit and demodulated. The resulting digital data is then output through RxD (Pin 5). The carrier detect circuit receives its signal from the output of the ac amplifier circuit and goes low when the incoming signal is detected (see Figure 4a). Freescale Semiconductor, Inc. In the answer or channel 2 mode, a logic low level is placed on MODE (Pin ) and on (Pin 2). In this mode, the data follows the same path except the FSK signal is routed to the highband bandpass filter and the sample andhold signal is routed through the lowband bandpass filter. (See Figure 4b.) In the analog loopback originate or channel mode, a logic high level is placed on MODE (Pin ) and on (Pin 2). This mode is used for a self check of the modulator, demodulator, and lowband passband filter circuit. The modulator side is configured exactly like the originate mode above except the line driver output (, Pin ) is switched to the negative input of the hybrid opamp. The input pin is open in this mode and the noninverting input of the hybrid circuit is connected to VAG. The sampleandhold output bypasses the filter so that the demodulator receives the modulated Tx data (see Figure 4c). This test checks all internal device components except the highband bandpass filter, which can be checked in the answer or channel 2 mode test. In the analog loopback or channel 2 mode, a logic low level is placed on MODE (Pin ) and a logic high level on (Pin 2). This mode is used for a self check of the modulator, demodulator, and highband passband filter circuit. This configuration is exactly like the originate loopback mode above, except the signal is routed through the highband passband filter (see Figure 4d). MC4544

7 RxA 5 6 AAF Freescale Semiconductor, Inc. S/H LOWBAND AC AMP CARRIER DETECT DEMOD 5 RxD MODULATOR HIGHBAND SMOOTHING FILTER (a) Originate/Channel Mode (MODE = High, = Low) 8 Exl RxA 5 6 AAF S/H LOWBAND AC AMP CARRIER DETECT DEMOD 5 RxD MODULATOR HIGHBAND SMOOTHING FILTER (b) Answer/Channel 2 Mode (MODE = Low, = Low) 8 Exl RxA 5 6 AAF S/H LOWBAND AC AMP CARRIER DETECT DEMOD 5 RxD MODULATOR HIGHBAND SMOOTHING FILTER (c) Originate/Channel Mode and Analog Loopback State (MODE = High, = Low) 8 Exl RxA 5 6 AAF S/H LOWBAND AC AMP CARRIER DETECT DEMOD 5 RxD MODULATOR HIGHBAND SMOOTHING FILTER (d) Answer/Channel 2 Mode and Analog Loopback State (MODE = Low, = Low) Figure 4. Basic Operating Modes 8 Exl MC45442

8 APPLICATIONS INFORMATION CARRIER DETECT TIMING ADJUSTMENT The value of a capacitor, CT at T (Pin 4) determines how long a received modem signal must be present above the minimum threshold level before (Pin ) goes low. The CT capacitor also determines how long the pin stays low after the received modem signal goes below the minimum threshold. The pin is used to distinguish a strong modem signal from random noise. The following equations show the relationship between tl, the time in seconds required for to go low; th, the time in seconds required for to go high; and CT, the capacitor value in µf. Valid signal to response time: tl 6.4 CT Invalid signal to off time: th 0.54 CT Example: tl seconds th seconds CARRIER DETECT THRESHOLD ADJUSTMENT The carrier detect threshold is set by internal resistors to activate with a typical 44 dbm (into 600 Ω) signal and deactivate with a typical 4 dbm signal applied to the input of the hybrid circuit. The carrier detect threshold level can be adjusted by applying an external voltage on A (Pin ). The following equations may be used to find the A voltage required for a given threshold voltage. (Von and Voff are in Vrms.) Example (Internally Set) VA = 244 Von VA = 45 Voff Von = 4.9 mv 44 dbm: VA = mv =.2 V Voff =.5 mv 4 dbm: VA = 45.5 mv =.2 V Example (Externally Set) Von =. mv 40 dbm: VA = 244. mv =.9 V Voff = 5.4 mv 4 dbm: VA = mv =.9 V The A pin has an approximate Thevenin equivalent voltage of.2 V and an output impedance of 00 kω. When using the internal.2 V reference a capacitor should be connected between this pin and VSS (see Figure 5). TRANSMIT LEVEL ADJUSTMENT The power output at (Pin ) is determined by the value of resistor RTLA that is connected between TLA (Pin Freescale Semiconductor, Inc. ) to (Pin 6). Table shows the RTLA values and the corresponding power output for a 600 Ω load. The voltage at is twice the value of that at ring and tip because feeds the signal through a 600 Ω resistor RTx to a 600 Ω line transformer (see Figure ). When choosing resistor RTLA, keep in mind that 9 dbm is the maximum output level allowed from a modem onto the telephone line (in the U.S.). In addition, keep in mind that maximizing the power output from the modem optimizes the signaltonoise ratio, improving accurate data transmission. THE LINE DRIVER Table. Transmit Level Adjust Output Transmit Level (Typical into 600 Ω) RTLA 2 dbm dbm 9.8 kω 0 dbm 9.2 kω 9 dbm 5.5 kω The line driver is a power amplifier used for driving the telephone line. Both the inverting and noninverting input to the line driver are available for transmitting externally generated tones. Exl (Pin 8) is the noninverting input to the line driver and gives a fixed gain of 2 (Ri = 50 kω). The average signal level must be the same as VAG to maintain proper operation. This pin should be connected to VAG if not used. The driver summing input (, Pin ) may be used to connect an external signal, such as a DTMF dialer, to the phone line. When applying a signal to the pin, the modulator should be squelched by bringing SQT (Pin 4) to a logic high level. must be left open if not used. In addition, the pin is the inverting side of the line driver and allows adjustable gain with a series resistor R (see Figure 6). The voltage gain, AV, is determined by the equation: where Rf kω. AV = Rf R Example: A resistor value of kω for R will provide unity gain. AV = ( kω/ kω) = MC4544

9 Freescale Semiconductor, Inc. 6 RxA HYBRID ac AMP AUTONULLED COMPARATOR 6 ms RETRIGGERABLE ONESHOT Vref A VA.2 V THRESHOLD CONTROL SAMPLING CLOCK CA 4 T CT Figure 5. Carrier Detect Circuit MODULATOR OUTPUT R0 = Rf R R0 Rf ExI 8 VAG 9 Ri Figure 6. Line Driver Using the Input MC

10 Freescale Semiconductor, Inc. 5 V DTMF INPUT TIP RING 0 Ω R kω * SI 0 µf RTLA 5 RTx 600 Ω CFB TLA RxA Exl FB VAG 6 MC45442/ Xin Xout RxD SQT MODE kω 0 kω 0 kω.58 MHz 5 9 VCC C C C C 8 DI2 Tx2 0 DO MC Rx DI TxEN Tx 8 STBY Rx2 Rx 9 MMBZ5VDLT X EIA22D DB25 CONNECTOR 8 2 CT T 4 2 GND A CA GND VSS 2 4 * Line Protection Circuit Figure. Typical MC45442/MC4544 Applications Circuit MC4544

11 Freescale Semiconductor, Inc. PACKAGE DIMENSIONS P SUFFIX PLASTIC DIP CASE 80 -A- 0 B C L NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH.. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. -T- SEATING PLANE G E F D PL N K 0.25 (0.00) M T A M J PL M 0.25 (0.00) M T B M DIM A B C D E F G J K L M N MIN INCHES MAX BSC BSC BSC MILLIMETERS MIN MAX BSC BSC BSC DW SUFFIX SOG PACKAGE CASE 5D04 A 0 B 0X P 0.00 (0.25) M B M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER.. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.50 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0. (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. X D 0.00 (0.25) M T A S B S 8X G K C T SEATING PLANE J F M R X 45 MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.2 BSC BSC J K M 0 0 P R MC45442

12 Freescale Semiconductor, Inc. MC4544