Bus Protection Fundamentals

Transcription

1 Bus Protection Fundamentals Terrence Smith GE Grid Solutions 2017 Texas A&M Protective Relay Conference

2 Bus Protection Requirements High bus fault currents due to large number of circuits connected: CT saturation often becomes a problem as the CT may not be sufficiently rated Large dynamic forces associated with bus faults call for fast clearing times in order to reduce damage due to a bus fault High incident energy/arc flash False trip by bus protection may create serious problems: Service interruption to a large number of customers (distribution and sub-transmission voltage levels) System-wide stability problems (transmission voltage levels) With both dependability and security important, preference is always given to security

3 Bus Protection Techniques Interlocking schemes Overcurrent (unrestrained, unbiased) differential Overcurrent percent (restrained, biased) differential High-Impedance schemes Low-Impedance microprocessor-based schemes

4 The Over-Current Problem 60 MVA 11 kv Gen Bus1 Bus CT1 F-1 F-2 CT2 F-2 F-3 Load Load Load Load F60-1 F Bus 3 Load = 5 MVA FS1 75 A F kva 11kV/.44 kv 2.5 Phase TOC_ Upstream Relay 52-1 Downstream Fuse FS1 Time to operate (s) Phase TOC_ Downstream Relay 52-2 Phase IOC_ Upstream Relay Phase IOC_ Downstream Relay Fault current at 11 kv

5 The Over-Current Problem

6 The CT Problem

7 Fault with full DC offset: The CT Problem

8 The Re-Configurable Bus Problem C-3 C-5 NORTH BUS B-1 S-1 S-3 S-5 B-5 CT-1 CT-2 B-2 CT-3 B-3 CT-4 B-4 CT-5 CT-7 B-7 CT-6 CT-8 S-2 S-4 S-6 B-6 SOUTH BUS C-1 C-2 C-4

9 Interlocking Schemes Blocking scheme typically used BLOCK Short coordination time required Practically, not affected by CT saturation The blocking signal could be sent over communications ports This technique is limited to simple one-incomer distribution buses

10 Overcurrent (unrestrained) Differential Differential signal formed by summation of the bus currents CT ratio matching may be required 51 On external faults saturated CTs yield spurious differential current Time delay used to cope with CT saturation Instantaneous (unrestrained) differential OC function useful on integrated microprocessor based relays

11 Percent (restrained) Differential Percent characteristic used to cope with CT saturation Restraining signal can be formed in a number of ways 87 No dedicated CTs needed Protection of re-configurable buses possible I I I I... DIF 1 2 I n I I... RES 1 2 I n I max I, I2,..., RES 1 I n

12 Sloped Diff & CT Saturation Problem differential t 2 t restraining 0

13 Sloped Diff & CT Saturation Problem differential t 2 t 0 restraining

14 Low Impedance Bus Protection No need for dedicated CTs High Internal CT ratio compensation Advanced algorithms supplement the percent differential protection function making the relay very secure Protection of re-configurable busbars becomes easy as the dynamic bus replica (bus image) can be accomplished without switching physically secondary current circuits Integrated Breaker Fail (BF) function can provide optimal tripping strategy depending on the actual configuration of a busbar Distributed architectures replace CT wires with fiber

15 High Impedance Bus Differential CB 1 CB 2 CB 3 CB n i1 i2 i3 in id = 0 vd = 0 High Impedance Bus Differential Relay I1 I2 I3 In I1 + I2 + I3 + + In = Id = 0 i1 + i2 + i in = id = 0 v1 +v2 + v3 + + vn = vd = 0 The vectorial sum of all primary currents in and out of the bus equals zero The vectorial sum of all CT secondary currents (assuming same CT ratio and no CT saturation) in and out of the bus equals zero The vectorial sum of all voltages induced on all CT secondary windings during normal load or external fault (no CT saturation) equals zero

16 High Impedance Bus Protection Fast, secure and proven Require dedicated CTs, preferably with the same CT ratio. Cannot handle nicely inputs from CTs set on different taps. Input from not fully distributed CT winding creates danger for the equipment, because of inducing very high voltages autotransformer effect Can be applied to small buses Depending on bus internal and external fault currents, they may not provide adequate settings for sensitivity and security Cannot be easily applied to re-configurable buses Require a voltage limiting varistor capable of absorbing significant energy Does not provide benefits of a microprocessor based relay (e.g. metering, monitoring, oscillography, breaker fail)

17 Thank You Questions?