What About Switched Capacitor Converters?

Transcription

1 What About Switched Capacitor Converters? Grad Students: Michael Seeman, Vincent Ng, and Hanh-Phuc Le Profs. Seth Sanders and Elad Alon EECS Department, UC Berkeley

2 Switched Capacitor Power Converters Only switches and capacitors Simple low freq model as an ideal transformer with Thevenin impedance neglects freq dependent loss and leakage Would model leakage, dynamic losses with shunt imped. Using no inductors has advantages: Simplified full integration potential Works well over a wide power range Single mode, can adjust clock rate No minimum load No inductive switching losses Open-loop loadline regulation: Output impedance has R-C characteristic, with R naturally designed to meet efficiency spec

3 Why Not S-C? Difficult regulation? Not suited for high current/power? Lots of difficult gate drive details? Interconnect difficulty for many caps? Voltage rating of CMOS processes? Magnetic-based ckts = higher performance?

4 SC Analysis: Simplest Example Slow Switching Limit (SSL): Impulsive currents (charge transfers) Resistance negligible (assume R = 0) This (SSL) impedance is the switching loss! Fast Switching Limit (FSL): Constant current through switches Model capacitors as voltage sources (C ) i = f sw Δq i = = f 1 4 sw CΔv 1 R ( Δv = V IN VOUT Δv )

5 Comparing Converters Need a metric to compare converters of different types! Example: How much power can we get out of a converter with 10% voltage drop? P OUT = I OUT V OUT = ( 0.1G OUTVOUT ) VOUT = 0.1 GOUTVOUT Power performance related to GV We can make a unitless performance metric by comparing converter GV to component GV f SSL Metric: G V C v OUT i caps OUT c, i( rated ) FSL Metric: G V G v OUT i switches OUT r, i( rated )

6 Analysis via Charge Multipliers Capacitor Charge Multiplier: a j c, i = charge flow in cap i, phase j output charge flow, both phases Phase 1: 1 = a c a r, 1 = 1 1 a r, 3 = 1 Switch Charge Multiplier: a r, i = charge flow in switch i, when on output charge flow, both phases Phase : a c = a r, = 1 1 a r, 4 = 1

7 Output Impedance ~ Power Loss M. Seeman, S. Sanders, IEEE T-PELS, March 008 An SC converter s power loss is the sum of component energy (power) losses: 1 P SSL fsw ΔqiΔvi = RSSLi P = OUT FSL Ri q = ( ) i f sw capacitors switches The converter s output impedance can be determined in terms of just the charge multiplier components: 7 R SSL = capacitors a ( c, i ) R = FSL Ri ( ar, i ) Ci fsw switches

8 Output Impedance and Optimization Tellegen s theorem and energy conservation used to find R OUT : SSL: R OUT = 1 f sw i capacitors ( a 1 c, i ) C i FSL: R OUT = i i switches R ( a r, i ) Minimize output impedance while keeping component cost constant: E Cost constraint TOT = 1 C v i capacitors c, i( rated ) Optimized components C * i v a c, i c, i( rated ) Optimized output impedance R * SSL 1 = a ETOT fsw c, i capacitors v c, i( rated ) A TOT = G v i r, i( rated ) G * i a r, i R = a * FSL ATOT r, i switches v r, i( rated ) switches vr, i( rated ) In the optimal case: Capacitor voltage ripple and switch voltage drop are proportional to rated voltage Output impedance proportional to the square of the sum of the component V-A products

9 Comparison with Magnetic Designs Ladder-type switchedcap converter Transformer-bridge converter Boost or Buck converter Switch sizes optimized for a given conversion ratio n for all converters

10 Switch Utilization Conduction Loss Comparison Performance compared with switch GV metric: G V OUT OUT G ivr, i( rated ) Magnetic components modeled with zero conduction loss, and no switching loss impact Ladder/Dickson Ideal transformer ckt: 1/3 Boost/buck

11 D.H. Wolaver, PhD dissertation,mit,1969 proves fundamental thms on dc-dc conv.: G = voltage or current gain Switches (resistors): v k k dc active i k G 1 P G Ladder/Dickson are optimal O k ac active G 1 G ( v ) ( ) k vk ik i k PO Reactive Elements: 1 G 1 vkik G k reactive P O Meaning for -phase ckts: k C V k q k + k L I k λ k 1 G 1 f G P O

12 Utilization of Reactive Elements: For boost or buck, derate inductor by 1000x relative to cap due to practical energy density, assert that S-C examples exhibit % voltage drop relative to mag ckts

13 The Submicron Opportunity Rate device by ratio: G V Essentially an Ft type parameter for a power switch reflecting power gain, exposes opportunity in scaling Suggests that we should look for opportunities to build our ckts with scaled CMOS based devices, but: Low voltage rating per device Inadequate metal/interconnect for high current? s s CV g

14 Regulation Considerations Open-Loop Loadline Regulation Droop matching resistive output impedance effective for loadline VR type reg. Dominant First Order Dynamics Simulation Example: 8-phase -to-1 converter Tap Changing for Line Regulation Feedforward Multi-mode Operation for Apps like Voltage Scaling

15 Example 1 Point-of-Load:1V-to-1.5V Dickson Circuit Illustrates tap-changing technique for line regulation. V.W. Ng, A 98% peak efficiency 1.5A 1V-to-1.5V Switched Capacitor dc-dc converter in 0.18 um CMOS technology, Master Thesis Report, EECS Dept, UC Berkeley, Dec

16 Layout in Triple-Well 0.18 um CMOS 16

17 Design vs. Performance

18 POL Design : Flip Chip Packaging Scheme

19 Cost and PCB Area Comparison

20 Ex. - Ultra-low-power Conversion in PicoCube Wireless Sensor Node Shaker 15mah NiMH v.0.8v charge pump radio PA power enable shunt regulator Radio digital power (GPIO pin) 1.0v analog switch linear regulator 0.65v PicoCube Power IC Reduced Quiescent Power Smaller Size Greater Efficiency JTAG external IF TPMS Sensor SPI serial IF Wakeup MSP430 uc SPI pwr on/off PA pwr on/off SPI serial IF Tx data power switches level shifters SPI VDD Tx VDD SPI serial IF Tx data radio Sensor/Digital Interface RF PicoCube: A 1cm3 Sensor Node Powered by Harvested Energy, 008 DAC/ISSCC Student Design Contest

21 PicoCube Power Management Chip Block Diagram Analog/Control Circuits Shaker Power Circuits Current Reference Synchronous Rectifier Voltage Reference Battery 0.7V (3:) Converter Linear Regulators Radio Feedback.1V (1:) Converter Microcontroller Sensors Seeman, Sanders, Rabaey, An Ultra-Low-Power Power Management IC for Wireless Sensor Nodes, CICC 007.

22 PicoCube Converter Topology Microcontroller + sensors 3: converter 1: converter Level shifters PicoRadio Linear Regulators (LDOs) further regulate and reduce ripple on outputs

23 Hysteretic Feedback Regulates output voltage On/off clocking control Thermostat-type control Improves efficiency by reducing f sw for small loads 1 MΩ 1 MΩ 10 kω 1 MΩ kω 70 Ω Converter leaves regulation for only large loads

24 Converter Performance Unregulated Regulated Regulated Unregulated V DD = 1.144V Regulation is effective at controlling output voltage and increasing efficiency at low power levels!

25 Ex. 3: Microprocessor SC Converter P1b P4b P7b P1a Core 1 P1d P4a Core 4 P4d P7a Core 7 P7d P1c P4c P7c Pb P5b P8b Pa Core Pd P5a Core 5 P5d P8a Core 8 P8d Pc P5c P8c P3b P6b P9b P3a Core 3 P3d P6a Core 6 P6d P9a Core 9 P9d P3c P6c P9c A power density of 1 W/mm is achievable in 65nm process. A tiled design improves output ripple and ESR performance Creates a scalable IP platform Ideal for microprocessor supplies: Ultra-fast transient response Package I/O at higher voltage/lower current Independent core voltage control

26 Design Optimization Example: 0.4 W/sq.mm Representative 0.13um tech.4-to-1.v Conversion 1 sq mm M-I-M cap ( nf) Losses SSL (main caps) FSL (conduction) Gate cap Cap Bottom plate Junction cap

27 Switched Cap Take-Aways Theoretical performance exceeds magnetic-based converters, and this is being realized in research Very simple low power operation reduce clk Integration convenient for v. low power app s to v. high current app s Moderate (high) voltage capability by stacking devices triple-well, SOI Regulation challenges nominal fixed ratio, but can operate with multiple Taps Further on-chip integration via aggressive clk scaling

28 Tap Changing for Line Regulation Feedforward Multi-mode Operation for Apps like Voltage Scaling

29 Conduction Loss Comparison M. Seeman, S. Sanders, IEEE T-PELS, March 008 Performance compared with switch GV metric: G V OUT OUT G ivr, i( rated ) Since converters are bidirectional, graph applies equally to step-down converters Magnetic components modeled with zero conduction loss, and no switching loss impact