Comparative Study of various LNA topologies Used for CMOS LNA Design

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1 Compaative Study of vaious LNA topologies Used fo CMOS LNA Design Sunny Gyamlani #1, Sameena Zafa *2, Jigisa Sueja #3, Jiga Chaudhai *4 # Electonics & Communication Depatment, R.G.P.V Univesity,Bhopal,India Electonics & Communication Depatment, R.G.P.V Univesity,Bhopal,India # Electonics & Communication Depatment, G.T.U,Gujaat,India # Electonics & Communication Depatment, G.U,Gujaat,India 1 sunny_ec84@yahoo.com, 4 jigachaudhai@yahoo.com 3 j_sueja@yahoo.co.in 41 Abstact This pape analyzes vaious CMOS UWB LNA topologies. The pape pesents an exclusive guideline fo UWB LNA eseach wok. The pape descibes selection pocedue of LNA configuation fo desied specifications as the UWB LNA has a majo tadeoff among five main design paametes viz Bandwidth, NF, Gain, Powe dissipation and Lineaity. Keywods -CMOS LNA, topology, UWB. 1. Intuction The communication system that compises of tansmitte and eceive will expeience not only attenuation but also the intefeence at the eceive end. The signal stength will be nomally in milli-volt ange hence unable to dive the demulato cicuity; hence it is mandatoy to amplify the signal befoe giving it to the demulato cicuit. But the amplifie will not only amplify the signal but also amplify the noise as well. Hence amplifie with minimum noise addition is equied. So LNA is essential & fist active block in eceive font end chain. a) Ulta-Wide Band Ove the last decade, the availability of the GHz spectum fo ulta-wideband (UWB) communications has diven both eseach and industy towad the development of a novel set of mass-maket applications. Indeed, the hi achievable thouput capacity of the multi-gigahetz bandwidth povides hi-data ate (HDR) (100 Mb/s) wieless connection at shot anges (1 10m) fo ad hoc connectivity among potable consume electonics and communication devices. A diffeent me of opeation exploits the hi time esolution of UWB pulse signals to enable localization/tacking capabilities fo low-data ate (LDR) communications. In these applications, oiented to wieless senso netwoks (WSNs), the data ate can be fom 1 Kbps to 1 Mbps with an opeating ange aound m. To manage the ulta-wide spectum and opeate at a low powe at the same time poses sevee challenges in the design of an UWB tansceive. Such Intenational Jounal of Compute Science & Emeging Technologies IJCSET, E-ISSN: Copyit ExcelingTech, Pub, UK ( issues can be managed if hi technology pefomance is combined with pope cicuit solutions and suitable tansceive achitectue [1]. Many published woks deal with the 3 5-GHz bandwidth, demonstating the feasibility of both standalone cicuit blocks [1], and fully integated tansceive solutions, wheeas less woks ae available in the 3 10-GHz ange due to a moe citical RF section. Especially fo LNAs used in Ulta Wideband Application must povide the Wide bandwidth, meate but Flat Gain ove entie BW, low NF, Go Lineaity, e powe consumption fo potable applications and low silicon aea. This pape pesents vaious LNA topologies, well suited fo both 3 5 and 3 10-GHz UWB lowpowe applications. The suggested topologies exploit ad hoc design pocedue to povide wideband impedance and noise matching. The LNA can be designed and fabicated in use defined CMOS technology as topologies ae the genealized schematic of cicuit. Then afte complete cicuit can be designed using conventional analog RF cicuit designing pocedue fo desied fequency band and specifications. This pape is oganized as follows. Section II eviews geneal infomation about existing LNAs. Section III explains a vaiety of LNA topology cicuit analysis. Finally, Section IV is conclusion. 2.Design Oveview fo LNAS. a) Oveview of existing LNA stuctue The LNA design includes thee sections to be designed 1. Input matching netwok. 2. Main amplifie section. 3. Output matching netwok. The ole of the input matching netwok is to make the input etun loss (S 11 ) minimized without intucing additional noise. The inteface between the antenna and the LNA entails an inteesting issue that divides analog designes and micowave enginees. Consideing the LNA as a voltage

2 42 amplifie, we may expect that the ideal value of its input impedance is infinite. Fom the noise point of view, we may equie a tansfomation netwok to pecede the LNA so as to obtain minimum NF. Fom signal powe point of view, we may utilize conjugate matching between the antenna and the LNA. While each of these choices has cetain meits and dawbacks, the last one is dominant in tay's systems, i.e., the LNA is designed to have a 50Ω esistive input impedance. Amplifie section ensues a hi gain, hi lineaity, low noise facto and low powe consumption and at the same time it povides input impedance that can be conducive to the ealization of boadband matching. The output buffe guaantee the output impedance is 50 Ω in ode to test. The design of matching netwok cicuity is called the topology of LNA. Many elementay widband amplifies exploit the widband tans-conductance of the MOS tansisto to detemine thei pefomance, amplifies that can be meled as cicuits with 2 Voltage Contolled Cuent Souce (VCCS) ae geneated in a systematic fashion. Methology is aleady exploited in past, which endes all 2VCCS widband amplifies that can be found in a database containing all the potentially useful 2VCCS cicuits, which was made available fom pevious wok of Klumpeink [2]. This is done selecting into the 2VCCS database all two-pot cicuits having cetain non-zeo tansmission paametes {A, B, C, D} accoding to a set of popely defined amplifie functional equiements and given the souce/load impedance. Limiting ouselves to the impotant case of elementay 2VCCS cicuits exploiting 2 MOSFETs leads to 2 well-know and 2 unknown widband amplifie cicuits [2]. b) Design Consideations fo UWB LNAs The main design taget of an LNA fo UWB applications is to povide 50 Ω input matching on the whole GHz fequency band, thus minimizing signal eflections back to the eceive antenna. Of couse, hi gain and low NF ae also necessay to educe the noise contibution of subsequent stages and impove the eceive sensitivity. Fo UWB amplifies, the impotance of a small goup delay, which is a diect measue of phase vaiation, is not always pointed out. A small-vaying goup delay guaantees that the UWB signal expeiences the same time delay ove the wide fequency band, so that the signal may be ecoveed popely. If the goup delay vaies significantly with fequency, the timdomain wavefom will be distoted, especially in case of UWB pulse signals that occupy a seveal-gigahetz spectum. Thus, diffeent fom a naowband amplifie design, a 3 10 GHz UWB LNA has to povide flat gain, as well as flat goup delay thouout the opeating bandwidth. Finally, limits on powe consumption and cost suggest simplifying the topology and educing the use of on-chip lage passive components. As a consequence, diffeential cicuits, which ae often adopted fo thei immunity to common-me spuious signals and assembling paasitic, ae less attactive since they intuce a twofold penalty. Indeed, a diffeential LNA equies aound twice the cuent budget compaed to a singlended vesion to achieve a simila pefomance. Moeove, it also needs a wideband passive netwok to povide the singlended-to-diffeential convesion between the antenna and LNA. To this aim, both off-chip baluns and integated tansfomes ae not viable solutions since the fome exhibit hi-fequency limitations and the latte intuce losses that diectly add to the NF of the LNA, heavily degading the pefomance of the whole eceive. Moeove, off-chip baluns and integated tansfomes incease complexity and silicon aea, espectively. The choice to implement a singlended LNA, even if not compulsoy, then gives a fundamental advantage in fulfilling the sevee specifications imposed by low-powe and low-cost UWB applications[1]. In the following, some of the most popula wideband LNA topologies in the ecent liteatue ae eviewed biefly, hiliting advantages and dawbacks within the actual UWB systems. 3. Vaious LNA Topologies The two well-known topology stuctue found in [2] ae common souce (CS) topology and common gate topology (CG). Thee ae vaious othe possible topologies as well which is discussed hee in detail along with existing CG and CS configuations. Hee we would like to indicate that along with basic topology some topology ae esulted due to Bandwidth extension techniques, Input matching techniques and Noise cancellation techniques when applied on basic topologies. a) Distibuted Amplifie (DA) topology The distibuted topology incopoating T-lines was oiginally poposed by Ginzton [3]. Insufficient technological capability to design aea-efficient distibuted cicuits delayed the usability of these cicuits fo a long time. They made thei eappeaance in 1980 s in a vaiety of advanced pocesses, such as GaAs o othe III-V technologies, and ecently, in CMOS pocess. Examples include distibuted amplifies, distibuted mixes, and distibuted oscillatos. The enewed inteest in distibuted cicuits is mainly due to the capability of designing on-chip T-lines, and hi-q inductos [3]. As a fundamental popety, integated cicuits incopoating on-chip T-lines tade delay fo bandwidth. In fequency domain, the tansisto s

3 43 paasitic capacitances ae absobed into the constants of the T-line. Hence, until the cut-off fequency of the line itself is eached, the cicuit s bandwidth emains appoximately constant. The genealized schematic fo distibutive amplifies is shown in fig-1. and the CG LNA s effective tansconductance unde an input-matching condition is Figue 2 - Common gate configuation [5]. Figue 1 - Genealized stuctue of distibuted LNA [1]. Distibuted cicuits ae capable of poviding a wideband input/output matching. This popety is essential in the UWB LNA design. The main advantages of a distibuted amplifie (DA) ae its intinsic boadband chaacteistic that goes all the way down to DC, and go input and output matching. But, hi powe consumption and lage aea have limited its application space. Howeve, when one consides the tadoff between the five main design paametes of an LNA: powe dain, gain, bandwidth, noise, and lineaity, it becomes evident that the taditional way of biasing a MOS DA in stong invesion, is not the optimal choice fo educing powe consumption. So it will be beneficial to bias DA in meate invesion egion [4]. The majo dawbacks of DAs is the lage silicon aea, which is due to the pesence of seveal on-chip inductos and/o tansmission lines and hi powe consumption that is elated to the numbe of stages equied to enhance the gain, often appoaching hunded of milli-watts [1]. b) Common Gate (CG) Topology Figue 2 shows the conventional CG-LNA whee the inducto esonates with the paasitic capacitance of the Impedancmatching device and the input pad. Within the signal bandwidth, the eactive pat of the input impedance is then cancelled and the eal pat of 1 / g. the input impedance is detemined by m g mb Also, the input-matching netwok of the CG- LNA is a paallel esonance as opposed to the seies esonance of the inducto-degeneated LNA. Hence, a low Q (quality facto) of the input-matching netwok esults in a wide bandwidth and the CG- LNA is moe obust to pocess, voltage, and tempeatue (PVT) vaiations [5]. The powe gain of CG-LNAs is elatively low due to the impedancmatching constaint. Ignoing the tansconductance of the back-gate tansisto (g mb ), input impedance matching equies 1/gm=Rs CG-LNAs exhibit supeio stability and evese isolation due to the absence of the Mille effect. Althou CG-LNAs featue desiable popeties fo wideband opeation, thei hi NF unde the inputmatching condition pevents its extensive use. The NF including channel noise, induced gate noise, and esistive load unde the input-matching condition is expessed as NF CG-LNA T 2 4R R L S (1) Whee, γ, α & β ae bias-dependent paametes, R L is the load impedance, R s is the souce impedance, and ω o and ω T ae opeating and unity cuent gain fequencies, espectively. The dominant noise souce in the CG-LNA is due to the channel noise of the MOSFET device. The gate induced noise in a CG-LNA is usually negligible in contast to an inducto- degeneated LNA unde simultaneous noise and powe match condition. The fouth tem shows that a lage esistive load is desiable fo low NF, but this condition is usually detimental fo wideband opeation of LNAs. In summay, CG-LNAs achieve a boadband impedance match, supeio evese isolation, stability, and a hi lineaity. Recently epoted CG feedback amplifies aim at decoupling the noise and powe (input) match tadoff without degading othe elevant LNA paametes. -Noise Techniques Employing Feedback in CG- LNA The capacito coss-coupled CG-LNA in Fig. 3(b) educes its NF and powe consumption by employing negative feedback g m boosting with inveting amplification, A neg, educes the noise contibution due to the channel noise by a facto of 1+ A neg unde input-matching condition. At the same time, the intinsic tansconductance of the impedancmatching device can be halved, which educes the powe consumption by the same facto. The dawbacks of the capacito coss-coupled CG- LNA ae that the passive g m boosting dictates that the inveting amplification must be less than 1 taking

4 44 into account the paasitic capacitance C gs. Futhemoe, the unilateal behavio of the CG-LNA is affected by the scheme whee input output feedthou and stability is deteioated. Shunt shunt positive feedback is used to add a degee of feedom in detemining the g m of the impedancmatching device, as shown in Fig. 3(c). Howeve, the amplifie s stability must be caefully evaluated when the positive feedback is employed. Also, inceasing the loop gain in positive feedback educes the ovedive voltage of the tansisto, and consequently, its lineaity. Negativfeedback aound a common-base amplifie has been employed to beak the lowe bound of noise pefomance. The simplified CMOS vesion schematic of the LNA is shown in Fig. 3(d). In this topology, the feedback netwok is passive, limiting the choice of the g m of the impedancematching device. gain and a lage paasitic capacitance at the output ne makes this appoach unsuitable fo wideband LNAs. Positive feedback in combination with passive g m boosting can achieve the best theoetical noise pefomance with low powe. Fig. 3(e) equies half the powe consumption fo the same powe gain and featues futhe suppession of channel noise fom the impedancmatching device. featues futhe suppession of channel noise fom the impedancmatching device. All the epoted woks ae based on feedback amplifies taking advantage of the hi f t scaled CMOS devices. Howeve, none of these designs achieve the full decoupling of noise and powe match in CG-LNAs. Also, othe design paametes (e.g., stability, evese isolation, and wide bandwidth) ae sacificed in ode to impove noise pefomance. c) Inductively degeneated common souce topology (IDCS) The basic inductively degeneated commonsouce (IDCS) LNA shown in Fig.4 (a) has typically been the best choice fo naowband applications due to its noise and gain pefomance. Both the input matching and the esonato load ae capable of handling bandwidths (BW) of seveal hunded MHz. Howeve, the ulta-wideband (UWB) systems, which have ecently gained a lot of inteest due to thei capability to tansmit hi-speed data fo shot anges, set new challenges. The band allocated fo the UWB coves the fequencies between GHz. Accoding to Multiband OFDM Alliance (MBOA) the UWB is divided into 14 sub-bands, which ae collected to 5 band goups (BG) [1]. At fist, the UWB devices must suppot the lowest thee sub-bands. Thus, the LNA should have at least 1.6- GHz opeational band, which is difficult to achieve with the IDCS LNA. Figue 4 (a) - Conventional inductively degeneated common souce configuation fo naow band applications (b) inductive degeneated CS fo UWB [6]. Figue 3 - Conventional CG-LNA and low-noise techniques employing feedback [5]. Positive feedback in combination with passive g m boosting can achieve the best theoetical noise pefomance with low powe. Fig. 3(e) equies half the powe consumption fo the same powe gain and Figue 4(b) shows one of the fist CMOS LNAs designed fo the UWB. The coe of that LNA is also based on IDCS topology. To have a wide opeation BW, a Chebyshev input matching technique and a shunt-peaked load ae utilized. The dawback of using wideband input matching is the numbe of onchip inductos. Wideband input matching cicuit in Fig. 4(b) becomes moe toublesome when designing a balanced o diffeential LNA. Then, all inductos at the input matching cannot be diffeential which leads to even lage numbe of inductos. To minimize the noise fom input matching cicuit and to pevent the cuent signal leakage into the esonato L 2 C 2,

5 inductos having hi Q-value ae equied. As a esult, the aea of the input matching cicuit becomes lage. A dawback of this appoach fo UWB is the lage goup-delay vaiation that the signal can expeience, due to seveal esonances in the inputmatching netwok. Moeove, it equies meate to lage silicon aea and intuces a hi insetion-loss that degades the amplifie NF and gain. 45 Complement UWB inductively degeneated common souce topology The use of complementay, o known as cuent use, meth has been demonstated in CMOS low noise amplifie (LNA) design to achieve boadband input matching whee the equivalent 50 Ω input impedance is made possible by the coupled gatedain inductos and the loading capacito. Since the extenal esistive dain bias cicuit is not moe needed in the complementay topology, not only the signal loss can be minimized but also noise pefomance of the amplifie can also be impoved. Howeve, since the two coupled inductos ae themselves lage and lossy, the unavoidable signal attenuation will aise the amplifie s noise figue. The ulta-wideband LNA mainly utilizes shunt-shunt esistive feedback to achieve input matching; howeve, the use of the feedback esisto inevitably deteioates the amplifie s noise. In this lette, we popose a new wideband CMOS LNA design meth that is combining the complementay topology with asymmetical inductive souce degeneation. By omitting the use of lage inductos and a feedback esisto, supeb noise pefomance can now be expected. d) Casce Topology The casce is a combination of a commonsouce device with a common-gate load. This has the effect of inceasing the voltage gain of the LNA and the output impedance while poviding shielding as well. The additional casce device consists of a tansisto M2 biased as common-gate, poviding a lage active load to impove voltage gain at hi fequency. It is nomal to set the casce device with the same W/L (channel width vesus length) atio as the fist singlstage LNA. In the design of a casced CMOS LNA, NF and lineaity of a LNA ae diectly affected by the gate width (M 1 & M 2 ) and Vgs of common-souce tansisto. The tansisto M1 dominates the noise pefomance. Howeve, the tansisto M2 contibutes to the lineaity pefomance as well as the impovement of the evese isolation due to hi output impedance. Futhemoe, a multi-finge layout patten is applied to educe the gatinduced noise. The casce amplifie is shown in the Fig 5. Whee M 1 is CS amplifie and M 2 is CG load. Figue 5 - Casce configuation [7]. Casced Common Souce Amplifie The most commonly used topology fo LNA design tay is the casce amplifie with inductive souce degeneation shown in the Fig. 5. This type of casce amplifie is called the telescopic casce amplifie since the casce tansisto is the same type as the input tansisto. On the othe hand, a folded casce amplifie has a casce tansisto with a diffeent type fom the input tansisto. The casce topology esults in a hie gain, due to the incease in the output impedance, as well as bette isolation between the input and output pots. The casce tansisto M2 suppesses the Mille capacitance of M1 theeby inceasing the evese isolation. The suppession of the paasitic capacitances of the input tansisto also impoves the hi fequency opeation of the amplifie. The fomula fo the input impedance of the casced common-souce LNA is given in (1) whee gm, Cgs, Lg and Ls ae the input tansisto s tansconductance, input tansisto s gatto-souce capacitance, gate inductance, and souce inductance espectively. At the esonant fequency, given in (2), the fomula fo the input impedance educes to (3). The width of the input tansisto M 1 that will give the equied tansconductance was set based on (2). The degeneating inducto Ls, which gives the LNA its puely eal input impedance, was computed based on (3). With the value of Ls detemined, the value of the gate inductance, Lg, that will set the esonant fequency, can be calculated. The width of the casce tansisto M 2, was set equal to the width of the input tansisto to take advantage of the educed junction capacitance in the layout. Finally, the output matching netwok, composed of the dain inducto, L d, and the output capacitos, C 1 and C 2, can be designed. Fig. 5 shows the final schematic design of the casced common-souce with device sizes and bias voltages. [10]

6 46 Z in= g m L s. L c gs s 1 1 s. c gs ω 0 = Lg Ls C gs g C Z in = m L gs s g Ls (2) (3) (4) The casced common-souce also achieved the lowest powe dissipation since it contains only one cuent banch [10]. The casced achitectue allows us to achieve simultaneously hi gain, low noise, and hi lineaity ove a wide fequency ange. Since this design doesn t use any off-chip components, it can be easily integated as one pat of a complete lowvoltage tansceive. e) Folded Casce Topology With the unpaalleled advantages in tems of gain, isolation, stability, and impedance matching, a casce stage is consideed one of the most widely used topologies fo the implementation of LNA cicuits at multi-gigahetz fequencies. Howeve, with the stacking achitectue of the common-souce and common gate tansistos, elatively lage bias voltage is equied in the LNA design, and the pefomance degades significantly as the supply voltage deceases. The basic cicuit schematic of folded-casce LNA is composed of one NMOS tansisto and one PMOS tansisto. Fig. 6 shows the schematic of the topology. The supply voltage of taditional casce cicuits must be moe than 2V T. In this cicuit, a single 0.8V voltage souce is used to supply the whole cicuit. The gate bias of input common-souce stage is fed thou the inductos L 1, L 2 and L 3 by the 0.8V voltage souce. Hee, seveal additional bypass capacitos ae connected to the supply voltage souce to make DC bias not susceptible to RF signals and hence noise figues sustain evaluated values. Conventional cascade topology equies a lage supply voltage because of stacking a lage numbe of tansistos. To avoid this poblem, one can use a PMOS tansisto instead of NMOS tansisto. By stacking folded casce stage on the top of the common souce (CS) amplifie, the total tansconductance is inceased with the same cuent consumption. Compaed with othe low-voltage LNA topologies, the folded casce one possesses exclusive advantages in tems of amplifie lineaity, noise figue, and bias stability. Howeve, the inheently low gain is one of the majo concens, especially fo applications whee the cuent consumption is limited. In this study, gainenhancement techniques ae poposed fo the folded casce topology and hi-gain LNAs ae ealized fo low-voltage and low-powe RF applications. The best lineaity whee only one single tansisto exists in each DC path which inceases the voltage swing and consequently impoves the cicuit lineaity. This impoves the cicuit lineaity, inceases the input tansconductance and consequently the powe gain. f) Cascade Topology The cascading topology many a times found in multi section o multi stage cicuit topology, whee two o moe stages ae connected in cascade to achieve the hi gain. Many a times it is also found in some of the IEEE papes that two tansistos ae connected in cascade fo hie amplification pupose. Mostly in casce stuctue CG and CS stages ae connected in cascading only. The supply voltage equiement is moe in cascade topology. And it will consume lage silicon aea as compaed to casce topology. In some of the pape confusion is thee in between two tems cascade and casce stuctue. g) Cuent euse topology The typical schematic of cuent-euse LNA is shown in the Fig. 7. The technique of cuent-euse can educe the powe consumption of LNA while peseve hi-gain. Howeve, since the second stage of the taditional cuent-eused LNA topology equies a DC bias as well as biasing esisto, they will esult in exta noise and signal leakage [9]. Figue 6 - Folded casce configuation [8].

7 The capacito coss-coupled gm-boosted UWB LNA featues the diffeential configuation, and can povide the input matching and low noise figue, but the powe gain of dB (o dB) is insufficient to suppess the noise of the subsequent components. Owing to employing the noisecancelling, the LNA has achieved input matching, hi powe gain, and low noise figue unde the wideband condition. Howeve, the singlend configuation will cause sevee 2nd-ode nonlineaity which is vey detimental fo zeo-if eceives. In ode to suppess this nonlineaity, the noiscancelling technique is employed in pseudiffeential configuation. Howeve, this configuation suffes fom vaiable input commonme level and is only suitable fo the naow band LNA [11]. 47 The diffeential capacitive coss coupled LNA is shown in Fig 8. Figue 7 - Conventional cuent euse configuation [9]. By using the cuent-euse technique, the powe consumption, noise and the IIP3 can be impoved. Cuent Reuse topology can be used with any cicuit configuation like casce topology, common souce o common gate, and feedback topologies o even with multi stage cascaded stuctues to educe the DC powe consumption. Recently, cuent euse cascaded amplifie has been pesented in liteatue as a suitable configuation fo LNA implementation because of its low DC powe consumption, hi and flat gain, low NF and hi evese isolation. The cuent euse cicuit is followed by a CG stage used as a buffe to impove the output impedance matching and flatten the LNA gain. A majo dawback of this design is its hi input and output impedances, thus equiing extenal impedance matching netwoks. This pevents the use of this LNA in fully integated applications. Due to the hi gain popety, the stong Mille effect educes the evese isolation of this LNA. In the actual design, two identical stages ae cascaded to impove the evese isolation. h) Diffeential topology Figue.8. Diffeential capacitive coss coupled configuation [11]. LNA exhibits supeio pefomances ove the fequency ange of GHz to the LNA s epoted in [1-3]. The diffeential configuation can hily diminish the 2nd-ode nonlineaity and make the input common-me level invaiable. The shuntseies tiple esonance peaking technique is adopted to achieve wideband flat gain in ou LNA. The noiscancelling technique can decouple the input matching with the NF by cancelling the output noise fom the matching device. The simplified illustation of the noiscancelling pinciple is shown in Figue 9. By employing the noiscancelling technique, the taditional link between the input matching and the noise figue is decoupled, and the equivalent tansconductance is inceased. They ae so powe-hungy and hence not suitable fo low-powe applications. Singlstage LNA s consume low powe but thei output bandwidth cannot povide the flat-hi-gain esponse. When the LNA is selected to opeate in the diffeential eceiving me, the cicuit pesents a balanced esponse. Both M 1 and M 2 ae configued as common-gate (CG) amplifies. The diffeential signal fom the off-chip balun is AC-coupled to the souce nes of M 1 and M 2, which ae connected to the gound thou two extenal lage inductos fo DC cuent sink.

8 48 The diffeential LNA is pefeed ove othe topologies as it offes bette immunity to envionmental noise, impoved lineaity, low powe consumption. Fistly, the effect of the paasitic gound inductances is educed by the vitual gound fomed at the tail.secondly the diffeential amplification of the signal ensues attenuation of the common me signal, and in most systems this common me signal will be noise. Table 1 - Compaison of vaious LNA topologies. Topology Distibuti ve Amplifie Ban d widt h Ga in Noise Figue Pow e Cons u- mpti on Imp danc e matc h- ing Lin ait y Go A e a Common Gate (CG) Lo w M ate Bes t M a te Common Souce (CS) Best Go M a te Casce CS M ate Best Bes t M a te Folded Casce Lo w Best Bes t Figue 9 - Noise cancelling pincipal of diffeential topology [11]. Thidly, the use of mixes and image ejection schemes equie to be fed fom a diffeential souce. i) Novel topology Few novel topologies ae also possible othe then the topologies discussed above. Novel topology is nothing but the combination of above basic topology with eithe bandwidth extension techniques o noise cancelling techniques. Even in few papes topology is invented to optimize BW, gain and NF simultaneously at the cost of othe paametes. 4. Conclusion Resistive Feedback Diffeenti al Configua tion Cuent Reuse NA Mo at e Lo w Goo d Goo d Go M a te The table 1 shows compaison between vaious commonly used UWB LNA topologies which will be vey helpful to decide the topology in ode to achieve the desied specifications. N A In case of UWB LNA topology, only few topologies ae basic, while othes ae the mifications of basic naowband LNA and majoity ae the esult of bandwidth extension and noise cancelling techniques. Even two o moe topology can be simultaneously applied in design to achieve the desied specifications of LNA. This pape pesented guidelines fo selection of LNA topologies fo designing LNA. A table showing compaison of vaious LNA topologies is as shown below:

9 Refeences [1] G. Sapone, G. Palmisano, A 3 10-GHz - Powe CMOS -Noise Amplifie fo Ulta- Wideband Communication, IEEE Tansactions On Micowave Theoy And Techniques, Vol. 59, No. 3, Mach [2] E.A.M. Klumpeink, et al, Finding all the elementay cicuits exploiting tansconductance, IEEE Tansaction on Cicuits and Systems, CAS-II, Vol. 48, No. 11, pp , Nov [3] P.Heydai, D.Lin, A Pefomance Optimized CMOS Distibuted LNA fo UWB Receives, Custom Integated Cicuits Confeence, IEEE [4] F.Zhang, P.Kinget, Powe Pogammabl Gain CMOS Distibuted LNA fo Ulta- Wideband Applications, Symposium on VLSI Cicuits Digest of Technical Papes, 2005 [5] J.Kim,, S.Hoyos, and Jose S.Matinez, Wideband Common-Gate CMOS LNA EmployingDual Negative Feedback With Simultaneous Noise, Gain, and Bandwidth Optimization, IEEE Tansactions On Micowave Theoy And Techniques, Vol. 58, No. 9, Septembe [6] J.Kaukovuoi, J.Ryynanen, and K.Halonen, CMOS -Noise Amplifie Analysis andoptimization fo Wideband Applications, IEEE 2006 [7] R.Wang, M.Lin, C.Lin, C. Yang, A 1V Fullband Casced UWB LNA with Resistive Feedback, RFIT2007-IEEE Intenational Wokshop on Radio-Fequency Integation Technology, Dec. 9-11, 2007, Singapoe [8] R.Wang, S.Chen, C.Lin, Y.Lin, A 0.8V Folded-Casce Noise Amplifie fomultiband Applications, IEEE.2008 [9] C.Wu, Y.Lin, A -Powe CMOS Noise Amplifie fo UWB Applications, Poceedings of 2010 IEEE Intenational Confeence on Ulta-Wideband (ICUWB2010), IEEE [10] M. Loenzo, M. Leon, Compaison of LNA Topologies fo WiMAX Applications in a Standad 90-nm CMOS Pocess, 12th Intenational Confeence on Compute Melling and Simulation, IEEE 2010 [11] Z.Liu, G.Chen, R.Zhang, Design of a Noisecanceling Diffeential CMOS LNAfo GHz UWB Receives, IEEE

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