Int. J. Electron. Commun. (AEÜ)

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1 Int. J. Electron. Commun. (AEÜ) 64 (200) Contents lists available at ScienceDirect Int. J. Electron. Commun. (AEÜ) journal homepage: An inductorless wideband noise-cancelling CMOS low noise amplifier with variable-gain technique for DTV tuner application Yuh-Shyan Hwang, San-Fu Wang, Shou-Chung Yan, Jiann-Jong Chen Department of Electronic Engineering, National Taipei University of Technology, Taipei 06, Taiwan, ROC article info Article history: Received 7 September 2009 Accepted 23 October 2009 Keywords: Wideband Low noise amplifier (LNA) Current reuse Input matching device noise cancellation Gain control abstract In this paper, we propose an inductorless CMOS wideband low noise amplifier (LNA), operated in the range from 00 to 900 MHz, with current reuse, mirror bias, gain control and input matching device using noise-cancellation technologies. The traditional wideband LNAs have different input reflection coefficient parameters (S) at different gain control modes, and they always implement with inductors for wideband matching. Therefore, the proposed LNA which can save power consumption at low gain mode, and implement without inductor on its design. Moreover, its S parameter has smaller variation at different gain control modes. The wideband CMOS LNA for digital video broadcasting-handheld (DVB-H), terrestrial-digital multimedia broadcasting (T-DMB), and digital video broadcasting-cable (DVB-C) tuner application is designed using TSMC 0:8 mm RF CMOS process. The post-simulation results at high gain mode show that the gain is 325:8 db, the noise figure (NF) is less than 2.75 db. The LNA consumes power between 7.25 mw (low gain mode) and 7.8 mw (high gain mode) at.8 V power supply. The core area is 0:435 0:67 mm 2. & 2009 Elsevier GmbH. All rights reserved.. Introduction Most research and design of RFIC mainly focus on narrow band system, such as using for GSM (global system for mobile communications) or GPS (global positioning system). However, the current trend is integration of different functions in the same terminal, for example, the receiver which integrates DVB-H, DVB-C and T-DMB standards in the same terminal needs about 800 MHz bandwidth. Therefore, narrowband receivers cannot meet our needs, and it increases the design difficulty comparing with narrowband receiver. In addition, the application of mobile TV is more and more popular, especially in the more advanced society, so the mobile TV will become an everyday part of human life. Based on the foregoing consideration, we need to always carry the mobile receiver, it may be used in different places with different input powers, and it will be required to have higher performance at low costs, low power consumption, high dynamic range, and smaller size on its design. But on the application of mobile system, it not only meets the above demands, but also needs to satisfy in wider bandwidth, low noise, good gain flatness and small variation in parameter S at the same time. Because of these reasons, we need to develop a new technology for the new compound TV products. Corresponding author. address: yshwang@ntut.edu.tw (Y.-S. Hwang). A good LNA design becomes very important because it is one of key circuit blocks in radio receiver system. Since the LNA can be directly added to the first stage in the receive path, it usually dominates the NF and bandwidth in the receiver, and a variable gain LNA can improve the dynamic range of the whole receiver []. Especially in mobile communication or video electronic products, we need an LNA which has good NF performance wide bandwidth and larger dynamic range in its specification. However, it is not necessary to meet these specifications at the same time. For example, the most important thing of mobile TV application is to deal with input signal. In this condition, we will try to reduce the power consumption and cost. In other words, we need more power consumption to improve the performance of gain and noise figure at low input signal power, but we will sacrifice the performance of the gain and noise figure to reduce the power consumption at high input signal power. It is because the high input signal power has higher gain and better signal-tonoise ratio than lower input signal power, and the higher input signal power does not need higher gain and better noise figure. Therefore, we care the noise figure at minimum input signal power, and reduce the gain and power consumption at maximum input signal power. The traditional wideband LNA technology always is designed based on inductors and capacitors for wideband matching [2,3], which implements with large size and higher cost. Another issue worth exploring is the inductors and the capacitors variation because it usually damages the gain flatness of wideband LNA /$ - see front matter & 2009 Elsevier GmbH. All rights reserved. doi:0.06/j.aeue

2 00 Y.-S. Hwang et al. / Int. J. Electron. Commun. (AEÜ) 64 (200) Especially when inductors and the capacitors were produced on the chip, the inductance and capacitance of the variation will be more serious. Because of this reason, the inductorless CMOS wideband LNA is proposed. It is usually designed based on the shunt feedback amplifier technique [4 7]. And the shunt feedback amplifier technique usually has a good bandwidth and implement without inductor. However, this technology has the inherent disadvantage of low trans-conductance, which not only reduces the gain performance but also degrades the noise performance. In this paper, we propose an on chip inductorless CMOS wideband LNA, which integrates several kinds of technologies on its design. And the LNA can achieve the requirement of low noise figure, gain control function, wider bandwidth, less inductor and save the power consumption at higher input signal power. In addition, the S parameter has smaller variation at different gain control modes. 2. Proposed circuit analysis An on-chip CMOS LNA with features of wide-band matching, gain flatness, small size, wider dynamic range, low power consumption, and low noise is required for mobile TV application. In order to make the on-chip CMOS LNA to meet specifications for mobile TV, we analyze and employ several techniques on the proposed LNA circuit. Fig. shows the proposed wideband gain control LNA circuit. The analysis of this circuit is shown as follows. capacitance) Z in;trad: ¼ jol þ þ gm M L n joc gs;mn C gs;mn == jol 2 þ þ gm M L p 2 : ðþ joc gs;mp C gs;mp Eq. () shows that the input reflection coefficient (S) of traditional LNA will change with different gate source capacitances and trans-conductances [9]. So, the S has variation from different gate source capacitances and trans-conductances. In Fig., the drain currents of Mp and Mp2 are reused in Mn and Mn2. So, focusing on the proposed LNA, the trans-conductance in this stage is 0 þgm Mp3 ro Mp3 gm ¼ gm Mp þgm A þ rom p3 R7! þgm Mn3 ro Mn3 þgm Mn þgm Mn2 : ð2þ þ rom n3 R Current reused technique The current reuse technique increases amplifier trans-conductance (gm) for the LNA without increasing power dissipation, compared with the standard topologies [4,8]. Fig. 2(a) is the traditional current reused LNA, and Fig. 2(b) is the simplified equivalent circuit. The input impedance of traditional current reused LNA can be derived as (disregard the gate drain Fig. 2. (a) The schematic of traditional current reused LNA and (b) its simplified equivalent circuit. Bias and gain control Current reuse VDD Input matching device M p5 I a C R 3 4 R 6 Mp4 C 4 M p M p2 M n3 5 R 5 I n3 Zin R s signal Vout noise M n4 R 2 M n M n2 M p3 I p3 C 2 R 3 C 5 R 7 R L GND VDD R V ref M p7 M p6 C V o Mn7 M n6 GND Feedback Fig.. The schematic of the proposed wide-band gain control LNA circuit.

3 Y.-S. Hwang et al. / Int. J. Electron. Commun. (AEÜ) 64 (200) I Ma3 R 7 + = Y M n2 V b Ma3 In,Ma3 R s X M n Fig. 4. (a) The schematic of current reuse LNA. (b) The schematic of current reuse technique with cascode current source. And the gain of the proposed LNA shown in Fig. is A ¼ gmr L : Fig. 3. Principle of noise-canceling technique. Eq. (2) shows that the trans-conductance of the proposed LNA in Fig. 2 would be increased by the current reuse technique. Where gm Mp, gm Mp2, gm Mp3, gm Mn, gm Mn2 and gm Mn3 are the transconductance of devices M p, M p2, M p3, M n, M n2 and M n3, respectively, and the ro Mp3 and ro Mn3 are the output resistances of devices M p3 and M n3, respectively. Described above illustrates the current reuse method, and the goal is to achieve the higher gain by using the same current, compared with the standard topologies Noise-cancelling technique Nowadays, feedforward [0,] and matching device noisecancelling [2 4] techniques are usually referred in LNA design. In the proposed circuit, the matching device noise-cancelling technique is used, and it is to decouple the input matching with the noise figure by cancelling the output noise from the matching device. Fig. 3 illustrates an example, which is based on a commongate LNA. The input matching is accomplished by setting =gm Ma3 to 50O. In order to meet the condition, the current flowing through M a3 must be large enough. So, it is imperative to reduce the current flowing through M a3 [4]. The proposed schematic of LNA and the principle of noise-cancelling technique are shown in Fig. which incorporates PMOS M p3 with NMOS M n3 in the common-gate stage to realize the cancellation of second-order distortion. Also, the DC bias current of the PMOS NMOS cascode is reused. We compare the input impedance and trans-conductance (gm) fromfigs. and 3. The input is matched to source resistance (R s )byusingm a3 (Fig. 3) orm n3 ==M p3 (Fig. ). The matching condition of proposed LNA (Fig. ) can be written by the following formula R s ¼ Z in ¼ == == == ; ð4þ gm Mp3 gm Mn3 joc gs;mp joc gs;mn where C gs;mp and C gs;mn are the gate source capacitances of the input transistors and o is the input frequency. When oc gs;mn ð3þ and oc gs;mp are smaller enough, the proposed LNA input impedance (Z in ) will be dominant by the impedance ð=gm Mp4 Þ==ð=gm Mn3 Þ, so the input impedance will have smaller variable, when the trans-conductance gm Mp, gm Mp2, gm Mn, gm Mn2 are changed by different gain control modes. Therefore, the input reflection coefficient of proposed LNA will be more stable. Next we design that gm Mp3 is equal to gm Mn3,so! R s ¼ ¼ == ¼ ; ð5þ gm Ma3 gm Mp5 2gm Mn7 gm Mn7 where ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi gm Ma3 W 2m n C ox L IMa3 and I Mp3 ¼ I Mn3 4 I Ma3; 2gm Mp3 2gm Mp5 ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi W 2 2m n C ox L IMp3 where the dimension of the gate along the source drain path is called the length, L, and that perpendicular to the length is called the width, W, andm n C ox is the constant of technology. According to Eq. (7), I Mp3 (from Fig. ) is smaller than I Ma3 (from Fig. 3). I Ma3 is the current flowing through M a3, I Mp3 is the current flowing through M p3, and which is reused to the current I Mn3 flowing through M n3. And the input matching device current can be set by R 6 and R 7. Besides, we analyze the noise-cancelling technique in Fig., the input signal is added at the output stage, and thermal noise will be cancelled at the output stage. So, the signal and noise through M p, M p2, M n and M n2 need to be integrated. Input signals voltage and thermal noise voltage are shown in Fig.. These two voltages are converted to current by M p, M p2, M n and M n2. By properly designing gm Mn3 and gm Mp3, the noise contributed by M p3 and M n3 can be cancelled at the output. By applying the noise-cancelling technique [2], the NF of the proposed LNA is dominated by R 6, R 7, M p, M p2, M p3, M n, M n2 and M n3. Reducing the matching device current, the resistances value of R 6 and R 7 will be increased at the same time. Because of this reason, the total noise factor will be reduced substantially. And according to Eqs. (2) and (3), the gain of the proposed LNA can be improved by higher resistances of R 6 and R Bias circuit and gain control The self bias of the current reuse technique is interesting to be discussed. The schematics of self bias are shown in Figs. 4(a) and (b), which are popular design in current reuse LNA. Fig. 4(a) has ð6þ ð7þ

4 02 Y.-S. Hwang et al. / Int. J. Electron. Commun. (AEÜ) 64 (200) Fig. 8. Simulation third-order intercept point of the proposed LNA. Fig. 5. Simulation input reflection coefficient of the proposed LNA. Fig. 6. Simulation gain at different control modes of the proposed LNA. Fig. 9. Chip layout of the proposed LNA. Table The specification of proposed LNA. The MHz wideband LNA for DVB-H and FM application Specification Post-simulation Operation frequency (MHz) S (db) 0.3 S variable at different control modes (db) 0.9 Gain variable (db) 2.8 Maximum gain (db) 4.6 NF (db) 2.75 IIP3 (dbm) 5.2 at 500 MHz Power dissipation (mw) 7:2527:8 Gain tunning range (db) 8:824:6 at 500 MHz Chip size GW ðmmþlðmmþ¼mm 2 0:435 0:67 Fig. 7. Simulation noise figure at different control modes of the proposed LNA. better output swings than Fig. 4(b) [0,5], but the size of devices M p and M n are restricted by the current. So, it can achieve higher linearity, but the gain and power consumption cannot be changed. On the other hand, Fig. 4(b) has good elasticity of design on gain control and power consumption, but it has lower linearity due to cascode device or current I rs. The current of proposed LNA is dominance by I ref, so we can increase the linearity and transconductance by increase the size of devices M p6, M p7, M n6 and M n7, and the proposed circuit in Fig. has both higher linearity and good elasticity of design on gain control. The proposed LNA shown in Fig. has a bias feedback amplifier that is used to set the dc output voltage V out equal to the reference V ref, and it guarantees that output swing voltage and linearity are not decreased by the process variation. A low-pass filter from the bias feedback loop is composed of R and C, which provides the dc output voltage from V out. So, the dc output voltage would be set up to the reference voltage V ref, and it can be adjusted to maximize output linearity or match to mixer without AC couple capacitor. In Fig., the devices M p6, M p7, M n6 and M n7 are used to steer bias current into M n4. The bias reference I ref and the current mirror which are composed of devices M p4 and M n4 are used to establish the desired bias current in devices M p, M p2, M n and M n2, and it can change through the current (I ref ) to adjust the gain of the proposed LNA. Current steering technique has the advantage about the gain control of LNA. According to the above concept, changing the bias

5 Y.-S. Hwang et al. / Int. J. Electron. Commun. (AEÜ) 64 (200) Table 2 The performance comparison of Wideband LNA. Specification [3] [6] [7] [9] [] This work Technology 0:6 mm CMOS Measured 0:8 mm CMOS Postsimulation 0:8 mm CMOS Measured 0:8 mm CMOS simulation 0:8 mm CMOS Postsimulation 0:8 mm CMOS Postsimulation Operation frequency (MHz) S (db) S2 (db) NF (db) IIP3 (dbm) NA Operation voltage (V) Gain control function Yes Yes No No No Yes Power dissipation 83.4 mw 22.8 ma 20 mw 5.3 mw 4.7 ma 7.8 mw Die size (mm 2 ) NA current I ref can verify the trans-conductance gm to achieve gain control technique. Thus the LNA can save the current and improve the linearity at high input signal power. 3. Simulation results We simulated the wide-band LNA with Cadence s EDA-Spectre RF using TSMC 0:8 mm RF CMOS process. The following figures show the results. Figs. 5 8 illustrated the post-simulation results for the input reflection coefficient (S), power gain (S2), noise figure (NF) and third-order intercept point (IIP3). Fig. 5 shows the post-simulation input reflection coefficient (S) which is less than 0:3 db, it verifies the input impedance of the proposed LNA which is close to 50 O over the band between 00 and 900 MHz. It also verifies that the input reflection coefficient of traditional LNA will change with different gate source capacitances and trans-conductances, but the proposed LNA only has smaller variable at different gain control modes. Fig. 6 shows the post-simulation gain of the proposed LNA which can achieve the gain control function by different power consumption. The maximum gain is better than 3 db over the bandwidth, and the maximum gain variable is less than 2.8 db. The power gain of the LNA can be varied from 8.8 to 4.6 db (at 500 MHz). Fig. 7 shows the post-simulation NF of the entire LNA, and the NF at maximum gain control mode is below 2.75 db over the bandwidth. To check the linear requirement, a two-tone test for IIP3 is performed on the LNA. The two-tone test is applied at frequencies of 500 and 50 MHz respectively with equal power. The achieved IIP3 is about 5:2 dbm and shown in Fig. 8. The chip layout of the proposed LNA is shown in Fig. 9. The total area is 0:435 0:67 mm 2. A summary of the proposed LNAs characteristics is given in Table. Table 2 compares the proposed wideband LNA to other existing wideband LNAs. 4. Conclusion This paper has discussed the performance of the wideband and low NF on the LNA. The architecture of wideband LNA using current reuse, bias gain control function and input device noisecancelling topology are proposed in order to achieve a wideband, low NF, gain control and small S variation LNA for the video applications. And the proposed CMOS wideband low noise amplifier implements without inductor for wideband matching. Therefore, it can reduce size and avoid inductor process variation on its design. The NF is less than 2.75 db at operating frequencies whose range is MHz. According to the concept of changing the bias current, we can get a wideband gain control function. Therefore, the sensitivity, power consumption and the higher dynamic range in the receiver would be improved. And the S parameter will not change much, when the proposed LNA operates in gain control mode. Because of these reasons, the performance of mobile receiver will be increased. Acknowledgments The authors would like to thank the National Science Council and Chip Implementation Chip of Taiwan for financial and technical supports. This work was sponsored by NSC E References [] Mehr I, Rose S, Nesterenko S, Paterson D, Schreier R, L Bahy H, et al. A dualconversion tuner for multi-standard terrestrial and cable reception. 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6 04 Y.-S. Hwang et al. / Int. J. Electron. Commun. (AEÜ) 64 (200) [4] Hwang Y-S, Wang S-F, Chen J-J. A differential multi-band CMOS low noise amplifier with noise cancellation and interference rejection. AEU International Journal of Electronics and Communications, 2009, in press, doi:0.06/ j.aeue [5] Karanicolas AN. A 27-V 900 MHz CMOS LNA and mixer. IEEE Journal of Solid- State Circuits 996;3(2): Shou-Chung Yan was born in Taipei, Taiwan, in 978. He received the M.S. degree in the Department of Electronic Engineering and the Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei, in Yuh-Shyan Hwang was born in Taipei, Taiwan, in 966. He received the Ph.D. degree from the Department of Electrical Engineering, National Taiwan University, Taipei, in 996. He is currently an Associate Professor with the Department of Electronic Engineering and the Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei. His current research interests include analog integrated circuits, mixed-signal integrated circuits, power integrated circuits, and analog signal processing. San-Fu Wang was born in Changhua, Taiwan, in 976. He received the M.S. degree in the Department of Electronic Engineering and the Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei, in He is currently working toward the Ph.D. degree in the Department of Electronic Engineering and the Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei. His current research interests include RF and analog integrated circuits. Jiann-Jong Chen was born in Keelong, Taiwan, in 966. He received the M.S. and Ph.D. degrees in Electrical Engineering from National Taiwan University, Taipei, Taiwan, in 992 and 995, respectively. From 994 to 2004, he was with the faculty of Lunghwa University of Science and Technology, Taoyuan, Taiwan. Since August 2004, he has been with the Department of Electronic Engineering, National Taipei University of Technology, Taipei, where he is currently an Associate Professor. His research interests are in the area of mixed-signal integrated circuits and systems for power management.