Noise George Yuan Hong Kong University of Science and Technology Fall 2010
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1 Lecture 3 Noise George Yuan Hong Kong University of Science and Technology Fall
2 Outline Introduction Device noise models Circuit noise analysis Other noise sources Power noise Substrate noise Noise reduction Chopping 2
3 Main circuit problems Linearity & Noise THD 3
4 Characterization SNR P P s n Vout SNDR THD SINAD N i2 P P s di P d P s P n 4
5 Noise in frequency domain S V f 5
6 Noise correlation Equivalent noise V eq V 1 V 2 Noise power uncorrelated 2 V eq 2 V eq V V V V V V 2VV V V
7 Power Spectral Density X t H f Y t S Y f S f H f 2 X 7
8 Noise Bandwidth Noise power integration bandwidth? 8
9 Outline Introduction Device noise models Circuit noise analysis Other noise sources Power noise Substrate noise Noise reduction Chopping 9
10 Noise of a Resistor 10
11 Integrated Noise of a Resistor (1) 11
12 Integrated Noise of a Resistor (2) 12
13 Integrated Noise of a Resistor (3) 13
14 1/f Noise of a Resistor 14
15 Shot Noise of a Diode 15
16 1/f Noise of a Diode 16
17 Noise of a MOS 17
18 Equivalent Input Noise of a MOS 18
19 Noise By Source Resistor R 19
20 Source Resistance Rs 20
21 Equivalent input noise: 1/f noise 21
22 Noise vs. Current : corner fequency 22
23 Outline Introduction Device noise models Circuit noise analysis Other noise sources Power noise Substrate noise Noise reduction Chopping 23
24 Noise of an amplifier with active load 24
25 1/f Noise of an amplifier with active load 25
26 Noise figure of an amplifier 26
27 Resistive noise matching 27
28 Noise of a Cascode Amplifier 28
29 29 Input referred Noise of a Cascode N S s ds m out ds L L s ds m i R i g g v g R R R g g 1
30 Noise of a Folded Cascode 30
31 Noise of a Cascode with Linear M1 dv 2 1 4kT R on 1 g 2 m 4kTV V 1 eff 2 DS1 31
32 Analysis 32
33 Noise of Current Mirror 33
34 Noise of Current Mirror with series R di 2 out R R 2 2 m2 g R g R m di di 2 in di 2 R1 1 m1 di 2 2 R2 2 di 2 m1 34
35 Noise Reduction of Current Mirror with series R 35
36 Noise Reduction of CMOS Current Mirror with series R 36
37 Noise of differential pair 37
38 Noise of differential pair with active load 38
39 Noise of differential pair with source resistor 39
40 Noise of an OPAMP 40
41 Capacitive Source Amplifier 41
42 Capacitive Noise Matching (1) 42
43 Capacitive Noise Matching (2) 43
44 Capacitive Noise Matching (3) 44
45 Outline Introduction Device noise models Circuit noise analysis Other noise sources Power noise Substrate noise Noise reduction Chopping 45
46 Ground 1inch wire: 20nH/inch, a transient current: SR=10mA/ns Δi 10mA Δv = L = 20 nh Δt ns = 200 mv 46
47 Analog and Digital Ground 47
48 Star Ground Separate analog, digital 48
49 Grounding for Mixed-signal IC Separate digital output and data bus by a register Limiting current resistor R DGND for mixed-signal IC should connect to analog ground plane DGND couples to AGND VD separate to VA by ferrite bead Digital switching current absorbed by the decoupling cap path 49
50 Grounding Mixed-Signal IC with Low Internal Digital Current 50
51 Grounding Mixed-Signal IC with High Internal Digital Current 51
52 Mixed-Signal PCB 52
53 On-chip Power Traces 53
54 Substrate Noise 1. R n->sub dominates if two n+ are far away (>100um) 2. Guard ring useless 54
55 Source, Bulk Connection? The disconnection of B and S reduces substrate noise injection 55
56 Pad Frame, Down Bonding 1. Tie the substrate to solid ground; 2. Down bonding low impedance; 56
57 Outline Introduction Device noise models Circuit noise analysis Other noise sources Power noise Substrate noise Noise reduction Chopping 57
58 Circuit Noise Minimization Increase input gm Enlarge other transistors to reduce the flicker noise and thermal noise Input transistor pair dominates the noise Reduce the flicker noise of input transistors 58
59 Chopping No noise aliasing 59
60 Chopping Example 60
61 Chopping Spikes 61
62 Chopping Spike Suppression Spectral filtering Temporal sampling 62
63 Chopper Stabilized OPAMP1 63
64 Notch Filter for Offset Current 64
65 Chopper Stabilized OPAMP2 65
66 Current Feedback Instrumentation Amplifier with Chopping 66
67 References 1. W. Sansen, Analog Design Essentials, Springer, W. Kester, The Data Conversion Handbook, Analog Devices, C. Enz, E. Vittoz, and F. Krummenacher, A CMOS chopper amplifier, IEEE J. Solid-State Circuits, Vol. SC-22, pp , Jun R. Yazicioglu, P. Merken, R. Puers, and C. Van Hoof, A 60uW 60nV/Hz 0.5 readout front-end for portable biopotential acquisition systems, IEEE J. Solid-State Circuits, Vol. 42, pp , May R. Burt, and J. Zhang, A micropower chopper-stablized operational amplifier using a SC notch filter with synchronous integration inside the continuous-time signal path, IEEE J. Solid-State Circuits, Vol. 41, pp , Dec J. Witte, J. Huijsing, and K. Makinwa, A current-feedback instrumentation amplifier with 5uV offset for bidirectional high-side current-sensing, IEEE J. Solid- State Circuits, Vol. 43, pp , Dec B. Owens, S. Adluri, P. Birrer, R. Shreeve, S. Arunachalam, K. Mayaram, and T. Fiez, Simulation and measurement of supply and substrate noise in mixed-signal ICs, IEEE J. Solid-State Circuits, Vol. 40, pp , Feb
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