CLC2011, CLC4011 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
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1 Comlinear CLC211, CLC411 Low Power, Low Cost, Rail-to-Rail I/O Amplifiers FEATURES n 136μA supply current n 4.9MHz bandwidth n Output swings to within 2mV of either rail n Input voltage range exceeds the rail by >25mV n 5.3V/μs slew rate n 21nV/ Hz input voltage noise n 16mA output current n Fully specified at 2.7V and 5V supplies APPLICATIONS n Portable/battery-powered applications n PCMCIA, USB n Mobile communications, cell phones, pagers n ADC buffer n Active filters n Portable test instruments n Notebooks and PDA s n Signal conditioning n Medical Equipment n Portable medical instrumentation Ordering Information General Description The COMLINEAR CLC211 (dual) and CLC411 (quad) are ultra-low cost, low power, voltage feedback amplifiers. At 2.7V, the CLCx11 family uses only 136μA of supply current per amplifier and are designed to operate from a supply range of 2.5V to 5.5V (1.25 to 2.75). The input voltage range exceeds the negative and positive rails. The CLCx11 family of amplifiers offer high bipolar performance at a low CMOS prices. They offer superior dynamic performance with 4.9MHz small signal bandwidths and 5.3V/μs slew rates. The combination of low power, high bandwidth, and rail-to-rail performance make the CLCx11 amplifiers well suited for battery-powered communication/computing systems. Typical Performance Examples Part Number Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method CLC211ISO8X SOIC-8 Yes Yes -4 C to +85 C Reel CLC211IMP8X MSOP-8 Yes Yes -4 C to +85 C Reel CLC411ISO14X SOIC-14 Yes Yes -4 C to +85 C Reel CLC411ITP14X TSSOP-14 Yes Yes -4 C to +85 C Reel Moisture sensitivity level for all parts is MSL-1. Large Signal Frequency Response Magnitude (1dB/div) V s = 5V V o = 4V pp V o = 2V pp V o = 1V pp Frequency (MHz) Output Swing vs. Load Output Voltage (.27V/div) 1.35 R L = 75Ω R L = 1Ω R L = 1kΩ R L = 1kΩ R L = 2Ω R L = 75/1Ω Input Voltage (.4V/div) Exar Corporation Kato Road, Fremont CA 94538, USA Tel Fax
2 CLC211 Pin Configuration CLC211 Pin Configuration OUT1 -IN1 +IN1 -V S CLC411 Pin Configuration OUT1 -IN1 +IN1 +VS +IN2 -IN2 OUT V S OUT2 -IN2 +IN2 OUT4 -IN4 +IN4 -VS 1 +IN IN3 OUT3 Pin No. Pin Name Description 1 OUT1 Output, channel 1 2 -IN1 Negative input, channel 1 3 +IN1 Positive input, channel 1 4 -V S Negative supply 5 +IN2 Positive input, channel 2 6 -IN2 Negative input, channel 2 7 OUT2 Output, channel 2 8 +V S Positive supply CLC411 Pin Configuration Pin No. Pin Name Description 1 OUT1 Output, channel 1 2 -IN1 Negative input, channel 1 3 +IN1 Positive input, channel 1 4 +VS Positive supply 5 +IN2 Positive input, channel 2 6 -IN2 Negative input, channel 2 7 OUT2 Output, channel 2 8 OUT3 Output, channel 3 9 -IN3 Negative input, channel 3 1 +IN3 Positive input, channel V S Negative supply 12 +IN4 Positive input, channel IN4 Negative input, channel 4 14 OUT4 Output, channel Exar Corporation 2/16 Rev 1C
3 Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the Absolute Maximum Ratings. The device should not be operated at these absolute limits. Adhere to the Recommended Operating Conditions for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Parameter Min Max Unit Supply Voltage 6 V Input Voltage Range -V s -.5V +V s +.5V V Continuous Output Current -4 4 ma Reliability Information Parameter Min Typ Max Unit Junction Temperature 175 C Storage Temperature Range C Lead Temperature (Soldering, 1s) 26 C Package Thermal Resistance 8-Lead SOIC 1 C/W 8-Lead MSOP 139 C/W 14-Lead SOIC 88 C/W 14-Lead TSSOP 96 C/W Notes: Package thermal resistance (q JA ), JDEC standard, multi-layer test boards, still air. ESD Protection Product Human Body Model (HBM) Charged Device Model (CDM) Recommended Operating Conditions SOIC-8 2kV 2kV Parameter Min Typ Max Unit Operating Temperature Range C Supply Voltage Range V Exar Corporation 3/16 Rev 1C
4 Electrical Characteristics at +2.7V T A = 25 C, V s = +2.7V, R f = R g =5kΩ, R L = 1kΩ to V S /2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response UGBW SS Unity Gain -3dB Bandwidth G = +1, V OUT =.2V pp 4.9 MHz BW SS -3dB Bandwidth G = +2, V OUT =.2V pp 3.2 MHz BW LS Large Signal Bandwidth G = +2, V OUT = 2V pp 1.4 MHz GBWP Gain Bandwdith Product G = +11, V OUT =.2V pp 2.5 MHz Time Domain Response t R, t F Rise and Fall Time V OUT = 1V step; (1% to 9%) 163 ns t S Settling Time to.1% V OUT = 1V step 5 ns OS Overshoot V OUT = 1V step <1 % SR Slew Rate 1V step 5.3 V/µs Distortion/Noise Response HD2 2nd Harmonic Distortion V OUT = 1V pp, 1kHz -72 dbc HD3 3rd Harmonic Distortion V OUT = 1V pp, 1kHz -72 dbc THD Total Harmonic Distortion V OUT = 1V pp, 1kHz.3 % e n Input Voltage Noise > 1kHz 21 nv/ Hz X TALK DC Performance Crosstalk Channel to Channel, V OUT = 2V pp, 1kHz 82 db Channel to Channel, V OUT = 2V pp, 5kHz 74 db V IO Input Offset Voltage.5 mv dv IO Average Drift 5 µv/ C I b Input Bias Current 9 na di b Average Drift 32 pa/ C PSRR Power Supply Rejection Ratio (1) DC db A OL Open-Loop Gain V OUT = V S / 2 9 db I S Supply Current per channel 136 μa Input Characteristics R IN Input Resistance Non-inverting 12 MΩ C IN Input Capacitance 2 pf CMIR Common Mode Input Range -.25 to 2.95 CMRR Common Mode Rejection Ratio DC 81 db Output Characteristics V OUT Output Voltage Swing R L = 1kΩ to V S / 2 R L = 1kΩ to V S / 2 R L = 2Ω to V S / 2 I OUT Output Current 3 ma Notes: 1. 1% tested at 25 C.2 to to to 2.52 V V V V Exar Corporation 4/16 Rev 1C
5 Electrical Characteristics at +5V T A = 25 C, V s = +5V, R f = R g =5kΩ, R L = 1kΩ to V S /2, G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response UGBW SS Unity Gain -3dB Bandwidth G = +1, V OUT =.2V pp 4.3 MHz BW SS -3dB Bandwidth G = +2, V OUT =.2V pp 3. MHz BW LS Large Signal Bandwidth G = +2, V OUT = 2V pp 2.3 MHz GBWP Gain Bandwdith Product G = +11, V OUT =.2V pp 2.5 MHz Time Domain Response t R, t F Rise and Fall Time V OUT = 1V step; (1% to 9%) 11 ns t S Settling Time to.1% V OUT = 2V step 47 ns OS Overshoot V OUT = 1V step <1 % SR Slew Rate 2V step 9 V/µs Distortion/Noise Response HD2 2nd Harmonic Distortion V OUT = 1V pp, 1kHz -73 dbc HD3 3rd Harmonic Distortion V OUT = 1V pp, 1kHz -75 dbc THD Total Harmonic Distortion V OUT = 1V pp, 1kHz.3 % e n Input Voltage Noise > 1kHz 22 nv/ Hz X TALK DC Performance Crosstalk Channel to Channel, V OUT = 2V pp, 1kHz 82 db Channel to Channel, V OUT = 2V pp, 5kHz 74 db V IO Input Offset Voltage (1) mv dv IO Average Drift 15 µv/ C I b Input Bias Current (1) 9 45 na di b Average Drift 4 pa/ C PSRR Power Supply Rejection Ratio (1) DC db A OL Open-Loop Gain V OUT = V S / 2 8 db I S Supply Current (1) per channel μa Input Characteristics R IN Input Resistance Non-inverting 12 MΩ C IN Input Capacitance 2 pf CMIR Common Mode Input Range -.25 to 5.25 CMRR Common Mode Rejection Ratio (1) DC 58 8 db Output Characteristics V OUT Output Voltage Swing R L = 1kΩ to V S / 2 (1) R L = 1kΩ to V S / 2 R L = 2Ω to V S / 2 I OUT Output Current 35 ma Notes: 1. 1% tested at 25 C.8 to to to to 4.67 V V V V Exar Corporation 5/16 Rev 1C
6 Typical Performance Characteristics T A = 25 C, V s = +2.7V, R f = R g =5kΩ, R L = 1kΩ to V S /2, G = 2; unless otherwise noted. Non-Inverting Frequency Response at V S = 5V Inverting Frequency Response at V S = 5V Normalized Magnitude (1dB/div) V o =.2V pp G = Frequency (MHz) Non-Inverting Frequency Response Normalized Magnitude (1dB/div) Frequency Response vs. C L Magnitude (1dB/div) V o =.2V pp G = 2 G = 2 G = 5 G = 1 R f = G = 1 R f = Frequency (MHz) V o =.5V 5kΩ + - 5kΩ Rs C LRs = 1Ω C L C LRs = Ω R L C LRs = Ω C L R s = Ω Normalized Magnitude (1dB/div) V o =.2V pp Frequency (MHz) Inverting Frequency Response Normalized Magnitude (1dB/div) G=-2 G=-1 G=-1 G= Frequency (MHz) Frequency Response vs. R L Magnitude (1dB/div) R L = 1kΩ R L = 1kΩ R L = 2Ω R L = 5Ω Frequency (MHz) Frequency (MHz) Exar Corporation 6/16 Rev 1C
7 Typical Performance Characteristics T A = 25 C, V s = +2.7V, R f = R g =5kΩ, R L = 1kΩ to V S /2, G = 2; unless otherwise noted. Frequency Response vs. V OUT Open Loop Gain & Phase vs. Frequency Magnitude (1dB/div) V s = 5V Frequency (MHz) 2nd Harmonic Distortion vs. V OUT Distortion (dbc) 2nd & 3rd Harmonic Distortion Distortion (dbc) V o = 4V pp V o = 2V pp Output Amplitude (V pp ) kHz 1kHz V o = 1V pp R L = 2Ω R L = 1kΩ 5kHz R L = 1kΩ 1kHz V o = 1V pp 1kHz, 2kHz R L = 2Ω Frequency (khz) R L = 1kΩ R L = 1kΩ Open Loop Gain (db) R L = 1kΩ R L = 1kΩ rd Harmonic Distortion vs. V OUT Distortion (dbc) kHz 2kHz 1kHz Input Voltage Noise nv/ Hz No load No load Frequency (Hz) 5kHz Output Amplitude (V pp ) V s = 5V.1k 1k 1k 1k Frequency (Hz) M Open Loop Phase (deg) Exar Corporation 7/16 Rev 1C
8 Typical Performance Characteristics - Continued T A = 25 C, V s = 5V, R f = R g =15Ω, R L = 15Ω, G = 2; unless otherwise noted. CMRR PSRR CMRR (db) Output Swing vs. Load Output Voltage (.27V/div) Frequency (Hz) 1.35 R L = 75Ω R L = 1Ω Input Voltage (.4V/div) Crosstalk vs. Frequency Crosstalk (db) R L = 1kΩ R L = 1kΩ R L = 2Ω R L = 75/1Ω PSRR (db) Frequency (Hz) Pulse Response vs. Common Mode Voltage Output Voltage (.5V/div) 1.2V offset.6v offset No offset -.6V offset -1.2V offset Time (1µs/div) , Frequency (khz) Exar Corporation 8/16 Rev 1C
9 Application Information General Description +V s 6.8uF The CLCx11 family of amplifiers are single supply, general purpose, voltage-feedback amplifiers. They are fabricated on a complimentary bipolar process, feature a rail-to-rail input and output, and are unity gain stable. Basic Operation Figures 1, 2, and 3 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. Figure 4 shows the typical non-inverting gain circuit for single supply applicaitons. Input R g + - +V s -V s 6.8μF.1μF.1μF 6.8μF R f R L Output G = 1 + (R f/r g) Figure 1. Typical Non-Inverting Gain Circuit Input R 1 R g + - +V s -V s 6.8μF.1μF.1μF 6.8μF R f R L G = - (R f/r g) Output For optimum input offset voltage set R 1 = R f R g Figure 2. Typical Inverting Gain Circuit Input + - -V s.1uf.1uf 6.8uF G = 1 Figure 3. Unity Gain Circuit In R g + - +V s 6.8μF +.1μF R f Out R L Output Figure 4. Single Supply Non-Inverting Gain Circuit Power Dissipation Power dissipation should not be a factor when operating under the stated 1k ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it s intended operating range. Maximum power levels are set by the absolute maximum junction rating of 15 C. To calculate the junction temperature, the package thermal resistance value Theta JA (Ө JA ) is used along with the total die power dissipation. T Junction = T Ambient + (Ө JA P D ) Where T Ambient is the temperature of the working environment Exar Corporation 9/16 Rev 1C
10 In order to determine P D, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. P D = P supply - P load Supply power is calculated by the standard power equation. P supply = V supply I RMS supply V supply = V S+ - V S- Power delivered to a purely resistive load is: P load = ((V LOAD ) RMS 2 )/Rloadeff The effective load resistor (Rload eff ) will need to include the effect of the feedback network. For instance, Rload eff in figure 3 would be calculated as: R L (R f + R g ) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, P D can be found from P D = P Quiescent + P Dynamic - P Load Quiescent power can be derived from the specified I S values along with known supply voltage, V Supply. Load power can be calculated as above with the desired signal amplitudes using: (V LOAD ) RMS = V PEAK / 2 ( I LOAD ) RMS = ( V LOAD ) RMS / Rload eff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: P DYNAMIC = (V S+ - V LOAD ) RMS ( I LOAD ) RMS Assuming the load is referenced in the middle of the power rails or V supply /2. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. Maximum Power Dissipation (W) MSOP-8 SOT23-6 SOIC-8 SOT Ambient Temperature ( C) Figure 4. Maximum Power Derating Input Common Mode Voltage The common mode input range extends to 25mV below ground and to 25mV above Vs, in single supply operation. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than.5v, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. If the absolute maximum input voltage (7mV beyond either rail) is exceeded, externally limit the input current to 5mA as shown in Figure 5. Input 1k Output Figure 5. Circuit for Input Current Protection Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, R S, between the amplifier and the load to help improve stability and settling performance. Refer to Figure Exar Corporation 1/16 Rev 1C
11 Input R g + - R f R s C L R L Output Figure 6. Addition of R S for Driving Capacitive Loads Table 1 provides the recommended R S for various capacitive loads. The recommended R S values result in approximately <1dB peaking in the frequency response. The Frequency Response vs. C L plot, on page 6, illustrates the response of the CLCx11. C L (pf) R S (Ω) -3dB BW (khz) 1pF 2.2 2pF 2.4 5pF 2.5 1pF 1 2 Table 1: Recommended R S vs. C L For a given load capacitance, adjust R S to optimize the tradeoff between settling time and bandwidth. In general, reducing R S will increase bandwidth at the expense of additional overshoot and ringing. Overdrive Recovery An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx11 will typically recover in less than 5ns from an overdrive condition. Figure 7 shows the CLC211 in an overdriven condition. Input/Output Voltage (V) Input Output Layout Considerations Time (us) G = 5 Figure 7. Overdrive Recovery General layout and supply bypassing play major roles in high frequency performance. CADEKA has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8µF and.1µf ceramic capacitors for power supply decoupling Place the 6.8µF capacitor within.75 inches of the power pin Place the.1µf capacitor within.1 inches of the power pin Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # CEB6 CEB1 CEB18 CEB17 Products CLC211 in SOIC CLC211 in MSOP CLC411 in SOIC CLC411 in TSSOP Exar Corporation 11/16 Rev 1C
12 Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a single-supply application: 1. Short -Vs to ground. 2. Use C3 and C4, if the -V S pin of the amplifier is not directly connected to the ground plane. Figure 8. CEB6 & CEB1 Schematic Figure 1. CEB6 Bottom View Figure 11. CEB1 Top View Figure 9. CEB6 Top View Figure 12. CEB1 Bottom View Exar Corporation 12/16 Rev 1C
13 Figure 13. CEB18 & CEB17 Schematic Figure 15. CEB18 Bottom View Figure 14. CEB18 Top View Exar Corporation 13/16 Rev 1C
14 Mechanical Dimensions SOIC-8 Package MSOP-8 Package E3 E4 aaa A E/2 2X e D2 b bbb M A B C D 4 3 S 2 Ð C Ð E1 3 7 Ð B Ð 2 ccc A B C A2 A A1 Ð A Ð c b b1 Plane.25mm Section A - A 5 A A Ð H Ð c1 t2 t1 E2 E1 E 2 3 L1 Scale 4:1 L R1 R 1 Detail A Symbol Min Max Ð Dimension "E1" and "E2" does not include interlead flash or protrusion Exar Corporation 14/16 Rev 1C
15 Mechanical Dimensions continued SOIC-14 Package Exar Corporation 15/16 Rev 1C
16 Mechanical Dimensions continued TSSOP-14 Package For Further Assistance: Exar Corporation Headquarters and Sales Offices 4872 Kato Road Tel.: +1 (51) Fremont, CA USA Fax: +1 (51) NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited Exar Corporation 16/16 Rev 1C
17 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Exar: CLC211ISO8X CLC211IMP8MTR CLC411ITP14X CLC411ITP14 CLC211IMP8X CLC411ISO14MTR CLC411ITP14MTR
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