Data Converter Fundamentals

Transcription

1 IsLab Analog Integrated Circuit Design Basic-25 Data Converter Fundamentals כ Kyungpook National University IsLab Analog Integrated Circuit Design Basic-1 A/D Converters in Signal Processing Signal Sources Sensors Audio signals Video signals Thermocouples Pressure cells Chemical cells Analog computer MUX S/H ADC Digital Systems Memory Processor Computer Microcomputer System control Transmission link Numerical machine

2 IsLab Analog Integrated Circuit Design Basic-2 D/A Converters in Signal Processing Digital Systems Memory Processor Computer Microcomputer System control Transmission link Numerical machine DAC Filter AMP Output Transducers Actuators Controllers Servomotors XY plotters CRT displays Audio systems Test fixtures IsLab Analog Integrated Circuit Design Basic-3 Practical Applications of Data Converters Camcorder Digital camera CATV, HDTV SVGA display, PDP CMOS wireless transceiver design Hard disk read channel

3 IsLab Analog Integrated Circuit Design Basic-4 Ideal D/A Converter N-bit D/A converter digital signal B in, reference voltage, analog output signal V out B in DAC V out = B in V out = (b b b N 2 N ) 2 N 1 LSB 1 2 N IsLab Analog Integrated Circuit Design Basic-5 Transfer function for an ideal 2-bit digital-to-analog converter V out FS 3/4 2/4 1/ (100) B in

4 IsLab Analog Integrated Circuit Design Basic-6 Ideal A/D Converter N-bit A/D converter analog input signal V in, reference voltage, digital output B out V in ADC B out V in + V Q = B out = (b b b N 2 N ) Quantization error: 1 2 V Q < 1 2 IsLab Analog Integrated Circuit Design Basic-7 Transfer function for an ideal 2-bit analog-to-digital converter B out 11 V V V /4 2/4 3/4 FS V in

5 IsLab Analog Integrated Circuit Design Basic-8 Quantization Noise of Ideal A/D Converters Quantization noise: equivalent noise for quantization error V in ADC DAC V out + + V Q Quantization noise = V Q = V out V in V out = V in + V Q = signal + noise IsLab Analog Integrated Circuit Design Basic-9 Deterministic approach for a ramp signal [ 1/2 [ 1 T V Q(rms) = V 2 2 T/2 T Qdt] = T V Q 0 0 ( tvlsb T ) ] 2 1/2 dt = 12 3 V in V out V Q = V out V in 0 T 2T 3T t

6 IsLab Analog Integrated Circuit Design Basic-10 Stochastic approach for a random signal PDF for V Q = f Q (v) = 1 so that V Q(avg) = for v 2 f Q (v)dv = 1 (normalization) vf Q (v)dv = 1 [ [ 1/2 V Q(rms) = v 2 f Q (v)dv] = 1 VLSB /2 /2 VLSB /2 /2 vdv = 0 ] 1/2 v 2 dv = 12 Deterministic approach = Stochastic approach Noise power decreases by 6.02 db for each additional bit IsLab Analog Integrated Circuit Design Basic-11 Signal-to-Noise Ratio in A/D Converters Definition SNR 10 log ( ) ( ) signal power Vs(rms) = 20 log noise power V n(rms) V in = sawtooth wave bounded by ± /2 ( / ) 12 SNR = 20 log / = 20 log(2 N ) = 6.02N db 12 V in = sinusoidal wave bounded by ± /2 ( /2 ) 2 ( SNR = 20 log / = 20 log 2 N ) 3/2 = 6.02N db 12

7 IsLab Analog Integrated Circuit Design Basic-12 Signed Codes for Data Converters Sign magnitude Negative number = complement of MSB for positive numbers 1 s complement Negative # = complement of all the bits for positive numbers Offset binary Assigning 000 to the most negative number and then counting up as in the unipolar code V out of DAC = (b b b N 2 N ) s complement: subtraction is performed using addition Negative number = 1 s complement + 1 Complement of the MSB for offset-binary numbers IsLab Analog Integrated Circuit Design Basic-13 3-bit signed digital codes Sign 1 s Offset 2 s Number magnitude complement binary complement +3 = = = = ( 0) (100) (111) 1 = = = = 100 (011)

8 IsLab Analog Integrated Circuit Design Basic-14 Performances of Data Converters Resolution: N-bit resolution number of distinct analog levels Offset error: V out (0 0) 0, V 0 01 = first transition level E off(d/a) = V out E off(a/d) = V LSB Gain error: when E off 0, V 1 1 = highest transition level. E gain(d/a) = V out V out ( 2 N 1 ) E gain(a/d) = V 1 1 E off(a/d) = V 1 1 V 0 01 ( 2 N 2 ) ( 2 N 1 1 ) 2 IsLab Analog Integrated Circuit Design Basic-15 Illustration of offset and gain errors for a 2-bit DAC V out FS 3/4 2/4 Ideal Actual Gain error 1/4 Offset error (100) B in

9 IsLab Analog Integrated Circuit Design Basic-16 Illustration of offset and gain errors for a 2-bit ADC B out 11 V ideal V actual E gain(a/d) = V actual V ideal /4 2/4 3/4 FS Offset error V in IsLab Analog Integrated Circuit Design Basic-17 Absolute accuracy The difference between ideal and actual transfer function offset + gain + linearity + other errors Relative accuracy = maximum integral nonlinearity error The accuracy after offset and gain errors have been removed. Expression of accuracy A % error of FS value, the effective number of bits (ENOB), a fraction of an LSB ENOB = SNR bit resolution with 12-bit accuracy 12-bit resolution with 10-bit accuracy

10 IsLab Analog Integrated Circuit Design Basic-18 Differential nonlinearity (DNL) error The variation in analog step sizes from ideal step size (1 LSB) after the gain and offset errors have been removed. DNLE = maximum magnitude of the DNL values in units of LSBs Integral nonlinearity (INL) error The deviation of code midpoints from a straight line after the gain and offset errors have been removed. A straight line = ideal transfer function, endpoints, best-fit line INLE = maximum magnitude of the INL values in units of LSBs The INL error represents the sum (integral) of the DNL errors for inputs up to the given input. IsLab Analog Integrated Circuit Design Basic-19 Integral nonlinearity error in a 2-bit D/A converter V out FS 3/4 Ideal Best-fit Endpoint 2/4 1/4 INL errors (100) B in

11 IsLab Analog Integrated Circuit Design Basic-20 A D/A converter transfer characteristics: = 1 V Digital Ideal DAC A DAC Step Size DNLE INLE Input Output Output (LSB) (LSB) (LSB) IsLab Analog Integrated Circuit Design Basic-21 An A/D converter transfer characteristics: = 1 V Ideal ADC An ADC Digital Transition Transition Step Size DNLE INLE Output Point Point (LSB) (LSB) (LSB)

12 IsLab Analog Integrated Circuit Design Basic-22 Monotonicity for DACs The slope of transfer function > 0 DNLE < 1 LSB or INLE < 0.5 LSB Missing codes for ADCs The ability to correspond all possible digital codes to an analog input DNLE < 1 LSB or INLE < 0.5 LSB A/D conversion time and sampling rate The time taken to complete a single conversion including acquisition time of the input signal (multiplexing). Sampling rate 1 Conversion time IsLab Analog Integrated Circuit Design Basic-23 D/A settling time and conversion rate The time taken to settle to within some specified amount (usually 0.5 LSB) of the final value. Conversion rate 1 Settling time Sampling-time uncertainty = aperture jitter For sinusoidal waveforms, v = 2 sin(2πft), v t = πf max During some sampling-time uncertainty, to keep v < Aperture jitter t < πf = 1 2 N πf

13 IsLab Analog Integrated Circuit Design Basic-24 Dynamic range The ratio of the rms value of maximum amplitude input sinusoidal signal to the rms output noise plus distortion (SNDR). The rms output noise plus distortion is obtained by eliminating the sinusoid from the measured output. For a D/A converter, the output sinusoid can be eliminated by using a spectrum analyzer. For an A/D converter, a similar approach can be taken by using FFT. The dynamic range may be a function of the frequency of the sinusoidal input and the input signal level. The dynamic range can be expressed as an effective number of bits (ENOB). SNDR = 6.02N eff Example: fundamental power = 1 W, remaining power = 0.5 µw SNDR = 10 log(1/0.5µ) = 63 db, N eff = ( )/6.02 = 10.2 bits IsLab Analog Integrated Circuit Design Basic-25 Homework Problems 11.2, 11.3, 11.7, 11.8, 11.12