Flip-Flopping Fractional Flux Quanta

Transcription

1 Flip-Flopping Fractional Flux Quanta Th. Ortlepp 1, Ariando 2, O. Mielke, 1 C. J. M. Verwijs 2, K. Foo 2, H. Rogalla 2, F. H. Uhlmann 1, H. Hilgenkamp 2 1 Institute of Information Technology, RSFQ design group, University of Technology Ilmenau, P.O. Box , D Ilmenau, Germany, 2 Faculty of Science and Technology and MESA + Institute for Nanotechnology, University of Twente, P.O. Box 217, 7500 AE Enschede, The Netherlands thomas.ortlepp@tu-ilmenau.de. The d-wave pairing symmetry in high-t c superconductors provides the possibility to realize superconducting rings with built-in π-phase shifts. Such rings have a two-fold degenerate ground state characterized by the spontaneous generation of fractional magnetic flux quanta with either up- or down-polarity. We have incorporated π-phase biased superconducting rings in a logic circuit, a Flip-Flop, in which the fractional flux polarity is controllably toggled by applying single flux quantum pulses at the input channel. Integration into conventional Rapid Single Flux Quantum-logic as natural two-state devices should alleviate the need for bias current lines, improve device symmetry, and enhance the operation margins. 1

2 Superconducting Josephson electronics is based on the storage and transmission of magnetic flux quanta, and makes use of one of the unique aspects of superconductivity, its macroscopic phase coherence. To comply with the requirement that the superconducting wave function is single valued, its phase ϕ can only vary by multiples of 2π when going around a closed superconducting ring structure. In the standard case, contributions to phase variations ϕ can arise from magnetic flux Φ enclosed by the ring, through ϕ = 2πΦ/Φ 0, and from the phase drop over Josephson junctions incorporated in the ring, through ϕ = arcsin(i J /I c ), with I J and I c the supercurrent and the critical current of the junction, respectively, and Φ 0 = Wb the magnetic flux quantum. The resulting periodic dependence of the maximum supercurrent that can pass through the ring on the applied magnetic flux forms the basis for the Superconducting Quantum Interference Device (SQUID), the prime building block for superconducting electronics and sensors. The introduction of additional phase-shifting elements in such superconducting loops leads to remarkable effects. For example, by incorporating a π-phase shift the ring is set to the twofold degenerate state that otherwise would be obtained by the application of a magnetic flux of exactly 1 Φ 2 0 (1, 2), see Fig. 1. To compensate for this built-in π-phase shift a spontaneous circulating current flows in the ring, in either the clockwise or counter-clockwise direction. The magnetic flux associated with this persistent circulating current is a fraction of a flux quantum, growing asymptotically to a half flux quantum in the large inductance limit (3). The polarity of this spontaneous flux can be used to store information. In isolated π-rings, fabricated with high-t c grain boundaries (4) or with connections between high-t c and low-t c superconductors (5), the generation and manipulation of fractional flux quanta has already been demonstrated using scanning SQUID microscopy. An important step towards its application in electronic circuitry is the incorporation of π-loops in superconducting logic gates, in which a controlled operation on an electronically applied input signal 2

3 leads to a predefined output signal (6, 7). Here, we report on the realization of a Toggle Flip-Flop (TFF) based on Josephson contacts between high-t c and low-t c superconductors, in which the polarity of the fractional flux quantum provides the internal memory, and discuss the benefits of incorporating such elements in Rapid Single Flux Quantum (RSFQ) superconducting electronic circuitry (8). Figure 2 shows a schematic of the device and an optical micrograph of the chip taken just before the deposition of a Nb ground plane. The state of the Flip-Flop is represented by polarity of the flux in the storage-loop with an inductance of L store 10 ph and junctions J 2 and J 3 with a critical current of I c = 90 µa. The ring with junctions J 4 and J 5 will carry a current in the opposite direction to L store, and its main role is to enhance the stability of the device. In the initial state, one of the stable flux states is generated by the built-in π-phase shifts. The Flip- Flop toggles between both stable states when a Single Flux Quantum (SFQ)-pulse is applied through it. These pulses are generated by a dc/sfq converter on the rising ramp of an input current I in and transferred via a Josephson Transmission Line (JTL) to the input junction J 1 of the Flip-Flop. To clarify the device operation, let us presume that the Flip-Flop is in the state with a clockwise current in the storage loop. The Flip-Flop is designed such that when an SFQpulse enters through J 1, the associated currents give rise to a switching of J 3 and J 4, causing the flux state in L store to reverse. If a second pulse arrives at the input, it causes a switching of J 2 and J 5, which toggles the Flip-Flop back to the original state. The Flip-Flop internal state can be read out with a two-junction SQUID loop, as a sensitive sensor for magnetic fields, nested in the middle of the storing loop. Its operating point can be adjusted to create a voltage signal for an upward fractional flux and no voltage for a downward fractional flux inside the loop. The Flip-Flop is fabricated by connecting the d-wave superconductor YBa 2 Cu 3 O 7 δ and the s-wave superconductor Nb separated by a Au barrier layer in a thin-film ramp-type Josephson junction configuration (9, 10). The measurements have been performed in a well-shielded flow 3

4 cryostat at a temperature of T = 5.3 K. To demonstrate the correct operation, SFQ-pulses are generated in a standard dc/sfqconverter and are fed to the Flip-Flop via a Josephson Transmission Line. An SFQ-pulse will be generated by the dc/sfq circuit every time the current in the input loop is increased exceeding a value corresponding to a flux quantum Φ 0 in the dc/sfq inductance. Figure 3A shows the triangular input signal to the dc/sfq converter and the output voltage over the read-out SQUID as a function of time, clearly demonstrating the toggling of the Flip-Flop at every incoming single flux quantum pulse generated at the rising edge of the periodic input signal. Several experiments with the generation of multiple input pulses at any ramp of an enlarged input signal confirm the correct operation with the corresponding number of output switchings as shown in Fig. 3B. In this figure, the amplitude of the input current is increased to generate three SFQ pulses on the rising ramp. By switching the TFF for each of these pulses the output shows a transition between its voltage states. Small deviations in the voltage level in this oversteered mode of operation are caused by a parasitic coupling between adjacent lines in the experimental setup. The maximum frequency of the circuit is similar to conventional RSFQ circuits with a comparable characteristic voltage I c R n. This specific sample shows an I c R n of about 110 µv, which limits the output voltage to 55 µv. In this sample, an extra groundplane layer was introduced for the first time to the standard fabrication process, which may influence the I c R n products and still needs to be optimized. Nevertheless, I c R n values up to 0.7 mv have been shown using a similar fabrication process (9). This corresponds to a Josephson frequency of 340 GHz, which sets the scale for the speed of digital operation. The operation of RSFQ circuits is based on three different elementary blocks, for transport, decision, and storage of information bits (11). In the design process, the mode of RSFQ digital operation is defined by creating topological schemes with the three mentioned functional ele- 4

5 ments and a specification of their parameters. A complication in standard RSFQ is the fact that superconducting ring structures without built-in π-phase shifts have one lowest energy state, i.e. the zero-flux state, and a degenerate first order state with a flux of ±Φ 0 (see Fig. 1). To reach an operating-point with a two-fold degenerate lowest energy state, a bias current is asymmetrically injected (Fig. 1B). However, this requires additional bias lines and control over these currents. In principle, the Flip-Flop can work without this bias current (12), but this requires an even higher asymmetry in the critical currents of the junctions. This asymmetry imposes strict margins on the design-parameters, such as the junction critical currents and the inductance values. These factors have until now strongly hampered the development of large-scale RSFQ logic circuits. The spontaneous generation of fractional flux in the π-shift device eliminates the need for the asymmetrically injected bias current, which reduces the amount of connections to external control-electronics and allows for symmetry in the design parameters. This is illustrated in Fig. 4 showing an exemplary π-tff configuration with improved parameters, a design based on the initial experimental results presented above. This is of great benefit in the design-process and fabrication, and also leads to denser circuitry; our first realization needed only a quarter of the size of a standard Toggle Flip-Flop in established Niobium technology with the same feature size of 2.5 µm. To study the influence of parameter variations on the circuit performance, a Monte Carlo yield analysis was performed. Several thousand parameter-sets having normally distributed random values for all adjustable parameters (critical currents, inductances and bias currents) were assigned to the π-shift circuit, and its operation was checked by automatic circuit simulation runs. The π-shift devices show a strongly improved stability against possible parameter variations. This was also observed experimentally: the TFF showed correct operation even when the bias current I b4 was varied by ±18% from its operation point. By further optimizing 5

6 critical currents and inductances, this operation range can be increased to ±55% deviation from the mean value. The bistability of π-phase shift devices is of relevance for all logic cells with internal states. This also includes all Boolean operations (AND, OR, etc.) as, due to the fact that RSFQ is a pulse driven logic, input- and sometimes output-buffer stages are required for the temporary storage of information. There is no strong advantage in using π-loops in a JTL, splitter or confluence buffer, because these cells do not have an internal state and therefore the bistable character of π-loops is dispensable. The results above are obtained by exploiting the π-phase shift associated with the d x 2 y 2- symmetry in the high-t c superconductors. However, it can easily be adapted to other technologies providing the π-phase shift, such as superconductor-ferromagnet-superconductor Josephson junctions (13, 14). In conclusion, we realized Single Flux Quantum operation of a logic circuit with a twofold degenerate ground state created by using intrinsic π-phase shifts. Incorporating π-phase shifters in RSFQ circuits, we found a strongly improved stability against spread, a compact circuit realization due to the decreased size of large inductances and a reduction in bias current supplies. This enables a simplification in the RSFQ circuit design with relaxed requirements to the fabrication process. The realization of a natural bistable system addresses one of the most challenging tasks for the superconducting electronics; the setting up of memory. Our TFF realization needs only a quarter of the size of a typical TFF in established Niobium technology with the same feature size of about 2.5 µm. 6

7 References and Notes 1. C. C. Tsuei and J. R. Kirtley, Rev. Mod. Phys. 72, 969 (2000). 2. R. R. Schulz et al., Appl. Phys. Lett. 76, 912 (2000). 3. J. R. Kirtley, K. A. Moler, D. J. Scalapino, Phys. Rev. B 56, 886 (1997). 4. C. C. Tsuei et al., Phys. Rev. Lett. 73, 593 (1994). 5. H. Hilgenkamp et al., Nature 422, 50 (2003). 6. E. Terzioglu and M. R. Beasley, IEEE Trans. Appl. Supercond. 8, 48 (1998). 7. A. V. Ustinov and V. K. Kaplunenko, J. Appl. Phys. 94, 5405 (2003). 8. K. K. Likharev and V. K. Semenov, IEEE Trans. Appl. Supercond. 1, 3 (1991). 9. H. J. H. Smilde, H. Hilgenkamp, G. Rijnders, H. Rogalla, D. H. A. Blank, Appl. Phys. Lett. 80, 4579 (2002). 10. More information on the fabrication methods are available as supporting material on Science Online. 11. D. K. Brock, E. K. Track, J. M. Rowell, IEEE Spectrum 37, 40 (2000). 12. S. V. Polonsky et al., IEEE Trans. Appl. Supercond. 3, 2566 (1993). 13. V. V. Ryazanov et al., Phys. Rev. Lett. 86, 2427 (2001). 14. T. Kontos et al., Phys. Rev. Lett. 89, (2002). 15. This work has been supported by the Netherlands Organization for Scientific Research (NWO), the Dutch Foundation for Research on Matter (FOM), the Dutch STW NanoNed 7

8 programme, the European Science Foundation ESF PiShift programme, and the University of Technology Ilmenau Promotion of Excellency. Helpful discussions with S. Karthikeyan are gratefully acknowledged. 8

9 Fig. 1. Potential energy U as a function of enclosed magnetic flux for three different superconducting loop configurations; (A) a standard two-junction SQUID loop, (B) a conventional RSFQ storing loop, comprising of a SQUID with an external current source, and (C) the new configuration with an intrinsic π-phase shift. Fig. 2. (A) Schematic and (B) optical micrograph of the π-shift Toggle Flip-Flop. The Josephson junctions have designed critical currents between 90 and 130 µa controlled by the width between 7.5 and 11 µm. All lines to ground are connected in a phase-coherent manner by a superconducting ground plane, not shown in this photograph. Fig. 3. Measurement results for: (A) a triangular input current of about 1 ma amplitude. On each rising ramp of this input signal an SFQ pulse is generated, transferred to the TFF and toggling its internal state, and (B) a triangular input current of about 4 ma amplitude with three SFQ pulses generated on each rising ramp of the input signal. Fig. 4. Comparison of the circuit parameters for (A) a conventional and (B) an exemplary symmetric π-shift Toggle-Flip-Flop. 9

10 A 2 B B 1 A C 2 LU / C -1/2 1/2 0 E b

11 A dc/sfq converter JTL Iin Ib1 Ib2 Ib3 Ib4 J1 Jp1 B Iin Ib1 Ib2 Ib3 Ib4 Out Ib5 Ib6 YBCO Nb 80 m J2 J4 Ib5 Ib6 J3 Lstore J5 Out Jp2 Toggle Flip-Flop read-out SQUID

12 A I (ma) V ( V) Time (ms) B I (ma) V ( V) Time (ms)

13 A B Input 1pH 250 A 1pH 270 A Input 3pH 1.5pH 150 A 145 A 1.5pH 300 A 0.8pH 0.6pH 1.4pH 1.8pH 1.8pH 200 A 250 A 6pH 150 A 2pH 150 A 9pH 150 A 3pH 300 A 225 A Out 150 A 150 A Out

14 For the sample fabrication, first a 150 nm [001]-oriented YBa 2 Cu 3 O 7-δ and 70 nm SrTiO 3 bilayer is epitaxially grown by pulsed-laser deposition (PLD) on an edge-aligned [001]- oriented SrTiO 3 single crystal substrate. Then the Flip-Flop leads and junction ramps are structured using optical lithography and Ar-ion milling. To ensure a uniform ramp for both junction directions, the samples are rotated during ion-milling at an angle of 45 with respect to the Ar-beam. To achieve a high-quality interface, a 7 nm YBa 2 Cu 3 O 7- δ interlayer is deposited. This is followed by the in-situ PLD deposition of a 25 nm Au barrier layer. The 160 nm Nb counter-electrode is defined by optical lithography and sputtering using a lift-off mask, followed by the removal of the redundant Au layer by Ar-ion milling. After this, a 200 nm SiO 2 insulating layer is dc-sputtered before the definition of via holes by optical lithography and Ar-ion milling. Finally a 200 nm Nb groundplane is fabricated by optical lithography and sputtering using a lift-off mask. This defines the self inductances per square of the YBa 2 Cu 3 O 7- δ base-electrode and Nb counter-electrode with respect to ground to be approximately 2 ph and 1 ph, respectively. The YBa 2 Cu 3 O 7- δ and Nb films fabricated using this procedure have a typical critical temperature T c of 90 and 8.9 K, respectively.