BOOST UP OF RANDOM PULSE WIDTH MODULATION OVER SINUSOIDAL PULSE WIDTH MODULATION FOR THREE PHASE VOLTAGE SOURCE INVERTER

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1 Volume 119 No , ISSN: (printed version); ISSN: (on-line version) url: ijpam.eu BOOST UP OF RANDOM PULSE WIDTH MODULATION OVER SINUSOIDAL PULSE WIDTH MODULATION FOR THREE PHASE VOLTAGE SOURCE INVERTER Sreeja P 1 P.Muthukumar 2 L.Padmasuresh 3 1 Research scholar, Noorul Islam University, Chennai , India 2 Associate Professor, Dept of EEE, AMET University, Chennai,Tamilnadu , India 3 Professor, Dept of EEE, Baselios Mathew II College of Engineering, Sasthamkotta, Kerala ,India 1 sreejathambi0@gmail.com, 2 muthukumar.p@ametuniv.ac.in, 3 suresh_lps@yahoo.co.in Abstract One of the inexpensive concepts in modern power electronics is the principle of random pulse width modulation (RPWM) for control of semiconductor based power converters, accelerated by the steadily increasing concern with or regulations regarding emissions of acoustic noise, vibrations and electric fields. Novel co-simulation of random pulse width modulation generation for three phase inverter drive by using Modelsim6.3f and Matlab 7.10, in order to disperse the acoustic noise spectra of an induction motor drive is presented. This scheme is randomized by selecting the triangle arbitrarily among the two triangles. The arbitration selection is based 8 bit linear feedback shift register. The least bit of the register output decide the winning triangle which is to compare with sine reference wave to generate pulses. The results of co-simulation are presented for both RPWM and SPWM in terms of Fundamental, Total Harmonic Distortion(THD), Harmonic Spread Factor(HSF). In addition, Xilinx XC3S500E FPGA device synthesis results are presented. The experimental validation of SPWM and RPWM are presented at the end and compared. Keywords: Pulse width modulation, Random pulse width modulation, Total harmonic distortion, Field programmable gate array, Harmonic spread factor 1. INTRODUCTION In recent years, pulse width modulation (PWM) inverter fed induction motors have been widely applied as motor drives in industry[1]. Owing to the deterministic frequency PWM switching of the inverters, the motors generate an unpleasant acoustic switching noise 407

2 and a mechanical vibration. To solve this problem, Random PWM [2] [6] has attracted attention from The significant feature of an inverter adopting random PWM is that its output harmonic spectra are dispersed and distributed continuously. Hence, the acoustic noise and mechanical vibration can be greatly reduced. Generally, the existing random PWM can be classified into three categories : 1) random carrier frequency PWM scheme ; 2) random switching scheme ; and 3) random pulse position PWM scheme. In this paper presents the digital implementation of Sinusoidal pulse width modulation generation and random carrier pulse width modulation generation. The simulated environment for the proposed scheme having the co-simulation feature i.e. Random pulses is generated by using modelsim6.3f and MATLAB 7.10 is used for analysis. In this paper comprising of seven sections. Section 2 describes about the types of pulse width modulation. Section 3 explains the digital implementation of SPWM, Section 4 describes the proposed scheme implementation in digital processor. Section 5 shows the simulated environment and performance parameters. Section 6 deals with the simulation results and its comparison. Section 6 brings out the conclusion. 2. PULSE WIDTH MODULATION Because of advances in solid state high power devices and processors, switching power converters are used in more and more modern induction motor drives to convert and deliver the required energy to the motor. This energy is controlled by Pulse Width Modulated (PWM) signals applied to the gates of the power semiconductors. PWM signals are pulse trains with variable pulse width and fixed frequency. There is one pulse of fixed magnitude in every PWM period. However, the duration(width) of the pulses changes from pulse to pulse according to a modulating reference signal. When a PWM signal is applied to the gate or base of a power transistor, it cause the ON and OFF intervals of the transistor to change from one PWM period to another PWM period according to the same modulating reference signal. The frequency of a PWM signal must be much higher than that of the modulating reference signal, the fundamental frequency, such that the available energy delivered to the motor and its load depends mostly on the modulating signal. The advantages of PWM based switching power converter are 408

3 No temperature variation-and ageing-caused degradation in linearity or drifting, Compatible with modern digital controllers (VLSI/FPGA[7][10] and advanced processors) Easy to implement and control The basic PWM techniques are: 1. Single Pulse Width Modulation 2. Multi Pulse Width Modulation 3. Sinusoidal Pulse Width Modulation (SPWM ) But when the technology progresses some advanced modulation techniques is also proposed: 1. Space vector Modulation (SVPWM )[3] 2. Random PWM[4][6] 2.1 PRINCIPLE AND OPERATION OF SINUSOIDAL PULSE WIDTH MODULATION FOR THREE PHASE INVERTER Among all PWM schemes, SPWM is one of the most popular and simple methods utilized in power inverter and motor control drives. Its main features can be summarized as sine-triangle wave comparison. As shown in Figure 1, a sine wave (reference modulated wave) is compared with a triangle wave (high frequency carrier wave) and when the instantaneous value of the triangle wave is less than that of the sine wave, the PWM output signal is in high level ( 1 ). Otherwise it goes into the low level ( 0 ). The switching is produced at every moment the sine wave meet with the triangle wave[4]-[6]. Thus the different meeting positions result in variable duty cycle of the output waveform. Figure 1. SPWM waveform generation 409

4 3. DIGITAL IMPLEMENTATION OF SINUSOIDAL PULSE WIDTH MODULATION GENERATION In terms of the basic principle of SPWM illustrated in Figure 1, it s easy to implement using analog circuit (Figure 2). Sine reference and triangle carrier waves are respectively generated by specially designed circuits and then fed to the properly selected comparator which can output the desired SPWM signal. But the control precision and reliability of this scheme are always not so satisfying due to the complicated analog circuit structure as well as the instability of the parameters of all analog devices. Figure 2. Analog scheme for SPWM generation With the development of the digital VLSI, nowadays the software implementation for SPWM is completely adopted to realize high accuracy control. In Figure 3.shows a typical hardware of the SPWM generation circuit through the digital logic circuits combination. In the digital implementation of SPWM generation comprises of 3 major section. 1.Sinusoidal reference generation, 2. Triangle carrier generation section, 3.Comparison and Dead time insertion. In each of the above module comprises of derived clock generation module from the Master board clock. 410

5 Figure 3. Typical Sinusoidal pulse width modulation generator using digital logic circuits 411

6 3.1 REFERENCE SINE WAVE GENERATION In the 50 Hz Sine Reference generation module only one quarter (0 to 90 o ) sine sample values has been used to generate the four quadrant which will generate the bipolar reference wave.50 sine samples has been used in one quarter cycle, So each sampling rate is 90 o /50 = 1.8 o. shown in Figure 4. Figure 4. Sampling of sine reference This sine samples multiplied with chosen modulation index, then will get the reference sine wave. Sampling period calculation 200 sampling period=20 milliseconds for 50 Hz. 1 sample period=20 milliseconds/200 =100 µseconds. So that, 10 khz sampling frequency has been used to sample the data. 412

7 KHZ CLOCK GENERATION In the FPGA design, synchronous reset and 50 MHz board clock has been used. Figure.5. shows the flowchart to generate the 10 khz clock. This clock has been used to sample sine data from look up table. Figure 5 10kHz Clock Generation 3.3 TRIANGLE CARRIER WAVE GENERATION In Figure 3. shows the triangle carrier wave generation. Up down Counter based VHDL program has been used for carrier wave generation. Switching frequency is equal to the carrier frequency in SPWM. 3 khz switching frequency has been selected for this case. Modulation index means it is the ratio of amplitude of the modulating wave to the amplitude 413

8 of the Triangle wave. Positive peak of carrier wave is V c =V m in positive half cycle and V c =- V m for negative peak value. 3.4 COMPARISON AND DEAD TIME INSERTION Three comparator and three not gates has been used to generate the 6 pulses. As per SPWM approach, if modulating signal higher the triangle signal, then the pulse will be high otherwise low. The upper and lower devices of each phase leg cannot be gated on simultaneously either by purpose or by EMI noise. Otherwise, a shoot through would occur and destroy the devices. The shoot through problem due to electromagnetic interference (EMI) noise misgating on is a major killer to the inverter s reliability. Dead time to block both upper and lower devices has to be provided in the VSI. Here, 2.5 micro seconds has been used as a dead time. 4. RANDOM PULSE WIDTH MODULATION A random carrier is acquired by randomly composing two triangular carriers, each of the same fixed frequency, but of opposite phase. The random selection of two carriers is decided by low or high states of the random binary sequence (RBS) as listed in table 1. Table 1.Truth table of the multiplexer RBS Status Mux Output 0 C 1 C bar In Figure 6 shows that the random bit generation methodology. Two fixed frequency triangle generated and fed to the 2:1 multiplexer. Selection bit of multiplexer is based on the 8 bit linear feedback shift register. The output of the shift register has been changed every switching cycle. In this case 3 khz have taken as a switching frequency. The concept diagram is shown in Figure

9 . Figure 6. Random bit generation Figure 7. RPWM Generation In addition to the SPWM generation, random bit generation and inverted triangle generation are added for the digital implementation of the RPWM shown in Figure 8. The initial value of the triangle carrier is zero and the initial value of the inverted triangle carrier is the peak of the triangle. This is the only difference between the two triangles. Three xor gates and linear feedback shift register has been used to generate the random bit.. The interpretation selection of the two triangles is based on the output of the xor gate output which is normally call it as a pseudo random binary sequence(prbs) bit. 415

10 Figure 8. Typical random pulse width modulation generator 416

11 5. SIMULATION ENVIRONMENT In the developed co-simulation is time efficient method to describe mixed simulation. Two simulators and a synthesizer have been used to build this work. ModelsimSE 6.3f is used for digital design simulation. Matlab / Simulink tool incorporated three-phase inverter design modeling, analysis tool (FFT-Powergui) and an interface tool [8]. The functionality verification done by RTL based test bench also incorporated in the Modelsim-VHDL-design. 50MHz system clock has been used for all VHDL design modules. Active high reset is used for system design deactivation. Workspace is the area to stock up the data between two simulators. HDL Co-simulation is a powerful tool, used as interface between design and analysis environments shown in Figure.9. The scope of the real time implementation is analyzed by using Xilinx project navigator tool incorporated synthesis behavior analysis. MATLAB (R2010a) Modelsim6.3f- HDL Simulator VHDL - Digital Design for Proposed Pulse generation Xilinx Synthesis-Report SPEED/AREA/POWER W O R K S P A C E Three phase Inverter Analysis Figure 9. Co-simulation Environment The evaluation chart derived from voltage harmonic spectrum has been given for various modulation index (Ma) ranges from 0.2 to 1.0 shown in table 3. Modulation index is the ratio of the peaks of modulating wave and carrier wave. The table 4 gives the voltage harmonic spectrum evaluation chart for dominating harmonic order (D-H-O) and its amplitude value for Ma=0.8. The diagram clearly depicts that peak amplitude of the dominating harmonic is very less when compared with the conventional methods. Harmonic spread factor (HSF) is the performance evaluation indicators to investigate the acoustic noise power of the PWM based induction motors[4][6][9][10]. The concept of statistical deviation is employed for HSF 417

12 calculation for evaluating the harmonic spread effect of the random PWM. The HSF can be defined as follows (1) (2) Where, H j is amplitude of jth harmonics, H 0 is average value of all N-1 harmonics. The HSF quantifies the harmonic spectra spread effect of random PWM scheme and it should be small. For an ideally flat spectrum of white noise, the HSF would be zero (Young-cheol Lim et al 2010). The performance parameters (Fundamental voltage, THD and HSF) are carried out by using FFT window in matlab with one cycle. The THD is defined as the ratio of harmonic amplitude to the fundamental amplitude. The distortion of voltage/current waveforms can be quantified using total harmonic distortion (THD) and give as % THD V V... V rms 3 rms n rms 2 V 1 rms (3) Where, V 1 is the rms value of fundamental component of the output voltage and V 2, V 3,... are the rms values of second, third,... harmonics. 6. DISCUSSION ON SIMULATION AND EXPERIMENTAL RESULTS Figure.10 and Figure.11 shows the Sine reference wave generation output(f m =50 Hz) and random Carrier generation output(f s =3 khz). In Figure 12. depicts the all the switching pulses generation with corresponding carrier and reference wave. 418

13 Figure 10. Sinusoidal Reference Generation using Modelsim 6.3f Figure. 11. Carrier Generation with Random bit using Modelsim 6.3f Figure. 12. Pulse Generation of RPWM with Random bit using Modelsim 6.3f 419

14 Modulation Index m a=0.2 SPWM RPWM Modulation Index m a=0.4 Figure 13. Spectrum of SPWM and RPWM for Modulation index m a=0.2 and

15 Modulation Index m a=0.6 SPWM Modulation Index ma=0.8 RPWM Figure.14. Spectrum of SPWM and RPWM for Modulation index m a=0.2 and

16 SPWM RPWM Figure 15. Spectrum of SPWM and RPWM for Modulation index m a =1.0 Random bit also generated every 3 khz, which is also shown in Figure.11 and Figure In the performance comparison shown in table 2, some of the points can be arrived. 2 In the Fundamental voltage point of view there is no much degradation in the RPWM compare with counterpart SPWM. 422

17 Table 2. Performance Comparison for various modulation Indexes Ma PWM Techniques Performance Parameters SPWM Two Triangle RPWM Fundamental % THD HSF Dominating Voltage Harmonics 58,62,119,121,239, ,121,239,360 Fundamental % THD HSF Dominating voltage 58,62,119, 121,178, Harmonics ,121,239,120 Fundamental % THD HSF Dominating voltage 58,62,119, 121,177, Harmonics ,121,120,359 Fundamental % THD HSF Dominating voltage Harmonics 58,62,119, ,121,239,120 Fundamental % THD HSF Dominating voltage Harmonics 58,62,119, ,121,77,235 3 In the case of conventional SPWM shown in the Figure 13 to Figure 15 the cluster of harmonic peak appears at 3 khz and its multiples. But, as in the case of random triangle PWM shown in the Figure 7, the cluster of harmonics are considerably reduced at the switching frequency and its odd multiples of 3 i.e. 3, 9, 15, 21 etc. 4 Harmonic spread factor is the acoustic noise performance predictor shows the clear dominations of the RPWM. The value of HSF is less though out the modulation index range from 0.2 to 1.0. where are its range is high and large variation in the SPWM. 5 It is observed that this RPWM will be useful for high speed application where the acoustic noise is major impact. 423

18 Magnitude in Voltage -> International Journal of Pure and Applied Mathematics 6 In this RPWM digital implementation, 13 % of look up tables are utilized. 2 DSP based 18x18 multipliers are used for development of carrier and reference waves. A 50 MHz board clock has been used for sequential digital circuit design. Figure 16. Experimental setup 150 V 100 V 50 V order Figure 17. Harmonic spectrum of SPWM for m a =

19 Magnitude in Voltage -> International Journal of Pure and Applied Mathematics 150 V 100 V 50 V order Figure 18. Harmonic spectrum of RPWM for m a =0.8 The methods have been tested with the designed setup consisting of a FPGA based PWM inverter circuit. It contains a FPGA board, inverter module with driver circuits, an autotransformer and an induction motor drive. Yokogawa Digital Storage oscilloscope will be used for all the inverter output measurements. The experimental setup for control of an induction motor is shown in Figure 16. and the parameters required for the setup is listed in the Table 3. The inverter is fed with a DC voltage of 220 V with the help of an autotransformer and a rectifier. As explained in previous that the conventional and proposed method PWM signals have been generated by FPGA. A dead time of 2.9µ seconds is introduced between the switches of the same inverter leg in order to ensure smooth transition of the switching states of the inverter. Both the SPWM and RPWM schemes test were carried out with the fundamental frequency of the inverter voltage was set at 50 Hz. All the hardware results are analysed from modulation index ranges from 0.2 to

20 Table 3. Parameters of the system used in the hardware setup Inverter 3Φ Two level Inverter Switching Device IGBT Input Voltage 220 Volt Load 3 Φ Induction Motor Modulation Index 0.8 Dead Time 2.9 µs Control Open loop Filter No Table 4. Simulation and Experimental Result comparison Technique SPWM m a Simulation Results Output Voltage THD % HSF Output Hardware results Voltage THD % HSF In SPWM, When the frequency modulation index mf is an integer, the modulation scheme is known as synchronous PWM and is more sui for implementation in a FPGA digital processor. If mf is 9 and it is multiple of three, all the harmonics in line voltage with the order lower than mf-2 are eliminated. In SPWM, the harmonics are centred on mf and its multiples. i.e harmonics are presented mf,mf±2,2mf±2,3mf±2 as shown in Figure 17. The experimental results revealed that the output harmonics are presented at the centred around the 3 khz, 6 khz, 9 khz, 12 khz, 15 khz and 18 khz. In the harmonic spectrum each 426

21 line shows the 50 Hz. The HSF performance parameter of SPWM is giving the low value of HSF at 0.2 ma, whereas the highest value occurred at modulation index 0.8. So, this is compassionate of band of HSF between 3.5 to 5.5. Table 5. Simulation and Experimental Result comparison Technique m a Simulation Results Output Voltage THD % HSF RPWM Output Hardware results Voltage THD % HSF In the Two triangle RPWM method, the harmonics are presented at 2mf±2, 4mf±2. i.e the dominating harmonics are present at 6 khz and 12 khz and 18 khz. The counterpart SPWM is having the harmonics fashioned at 3 khz and 9 khz and 15 khz are suppressed in RPWM which is shown in Figure 18. In the Fundamental and THD point of view there is no much difference in the RPWM compare SPWM. But, in the HSF, is somewhat degraded compare SPWM, which makes the band between 3.27 to 4.75 as shown in Table CONCLUSION The digital implementation of the both sinusoidal pulse width modulation and random pulse width modulation are described. The detailed SPWM and two triangle RPWM generation of FPGA is spoken. The spectral analysis of the above methods is carefully examined in MATLAB environment. The validity of the simulated spectral analysis is examined through experimentation. Comparisons showed an excellent equivalency between simulation and actually measured spectra. At the end of this analysis, it is to conclude that two triangle random pulse width modulation outperforms. 427

22 References 1. Mahesh A Patel, Ankit R Patel, Dhaval R Vyas, Ketul M Patel, Use of PWM Techniques for Power Quality Improvement, International Journal of Recent Trends in Engineering, Vol. 1, No. 4. pp Muthukumar Paramasivan, Melba Mary Paulraj, Sankaragomathi Balasubramanian, Assorted carriervariable frequency-random PWM scheme for voltage source inverter, IET Power Electronics, vol. 10,No. 14, pp August Seung-Wook Hyun, Seok-Jin Hong, Jung-Hyo Lee, Chun-Bok Lee, and Chung-Yuen Won, A Method to Compensate the Distorted Space Vectors in the Unbalanced Neutral Point Voltage of 3-level NPC PWM Inverters, Journal of Power Electronics, Vol. 16, No. 2, pp , Ki-Seon Kim, Young-Gook Jung and Young-cheol Lim, A New Hybrid Random PWM Scheme, IEEE Transactions on Power Electronics, Vol. 24. No. 1, Nandhakumar R, Jeevananthan S, Inverted Sine Carrier Pulse Width Modulation for Fundamental Fortification in DC-AC Converters. Serbian Journal of Electrical Engineering, Vol. 4, No. 2, pp Young-cheol Lim, Seog-Oh Wi, Jong-Nam Kim, Young-Gook Jung, A Pseudo random Carrier Modulation Scheme. IEEE Transactions on Power Electronics, Vol. 25, No. 4, pp Amara Amara, Frederic Amiel and Thomas Ea, FPGA vs. ASIC for low power applications, Microelectronics Journal (Elsevier), Vol. 37, No. 8, pp Zheng WANG, Chau K.T and Cheng M, A chaotic PWM motor drive for electric propulsion, in IEEE, Vehicle Power and Propulsion Conference, Harbin, China: IEEE. pp Sep Boopathi R, Muthukumar P, Melba Mary P, Jeevananthan S, Investigations on Harmonic Spreading Effects of SVPWM Switching Patterns in VSI fed AC Drives. IEEE International Conference on Advances in Engineering, Science and Management (ICAESM): pp Valantina Stephen, L. Padma Suresh and P. Muthukumar, Field programmable gate array based RF- THI pulse width modulation control for three phase Inverter using matlab modelsim cosimulation, American Journal of Applied Sciences, Vol. 9, No. 11, pp ,

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