ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS

Transcription

1 Volume 120 No , ISSN: (on-line version) url: ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS Devineni Gireesh Kumar 1, Dr. C. Subbarami Reddy 2, Dr. N. Bhoopal 3 1 Assistant Professor, 2,3 Professor, Department of EEE BVRIT, Narsapur, Medak dist. Telangana July 18, 2018 Abstract A multilevel inverter is a power electronic device that is used for high voltage and high power applications such as flexible AC transmission systems, uninterruptible power supplies and PV systems and their performance is better to that of conventional two-level inverters due to higher number of dc voltage sources, reduced harmonic distortion and lower EMI. A Carrier phase-sifted PWM technique is used for the proposed multilevel inverter because it offers great advantages such as is improved output voltage waveforms, minimize total harmonic distortion, and control EMI when compared with other PWM techniques. The performance evaluation of a five level cascaded multilevel inverter (MLI) using advance pulse width modulation (PWM) techniques for constant switching frequency (CSF) operation are presented in this paper. Multilevel inverter operation for CFO with Phase disposition (PD), Phase opposition disposition (POD), Alternate phase opposition disposition (APOD) PWM control methods is simulated in MATLAB. Also variations in MLI performance parameters such as Total Harmonic Distortion (THD) in output voltage, peak

2 value of fundamental component of voltage, etc. are analyzed with each PWM control strategy. The effects of load perturbation on the profile of phase, line voltage and current in MLI are also described. A comparative study is presented in terms of THD, peak value of fundamental component of voltage and current under different load conditions. 1 INTRODUCTION Multilevel inverters are very popular because they had great advantages over conventional inverters[9]. The Multilevel inverters uses semiconductor switches for their circuit construction and provides high voltage and high power levels at their output. With the increase in number of levels in output, the harmonic content as well as the electromagnetic interference (EMI) will reduce. The need for designing the multilevel inverters is to achieve the high power output from low voltage batteries. The multilevel output seems like a staircase (stepped wave), which is almost similar to sinusoidal wave shape. The output of low distortion is thus obtained by providing control signals to the gates of semiconductor switches to control their switching frequencies. In this work the control signals to the semiconductor switches of multilevel inverters are generated from PWM schemes. This paper presenting a 5-level three phase cascaded H-bridge multilevel inverter, simulated for different control techniques (PD, POD, APOD) and the results are compared in terms of total harmonic distortion in each technique. The figure (1), shows the 5-level single phase cascaded multilevel inverter, here two full bridge inverters are cascaded to form a single phase 5-level H- bridge inverter, which uses eight semiconductor switches and two batteries or DC voltage sources. The resultant output magnitude of the cascaded inverter is equal to sum of the input battery voltages. The DC source voltage of inverter-1 is V 1 and inverter-2 is V 2. The cascaded connection provides the magnitude of voltage as V = V 1 + V

3 Figure 1: Single phase cascaded 5-level inverter 2 CONTROL SCHEMES FOR 3-PHASE 5-LEVEL INVERTER There are various control schemes available for cascaded H-bridge multilevel inverters, which are shown in figure (2). Figure 2: Control schemes for multilevel inverters The control schemes for MLI are classified as two types based on their switching frequencies, namely low switching frequency modulation scheme and high switching frequency modulation scheme. Low switching frequency control techniques are not much popu

4 lar, due to their lower dynamic response, whereas High frequency switching techniques are classified into three types, they are MC- SPWM, SVPWM and SHEPWM. Among these the MCSPWM gives better results which is further classified as PS-SPWM (Phase shifted SPWM) and LS-SPWM (Level shifted SPWM). The three categories of level shifted SPWM schemes, namely Phase Disposition (PD), Phase Opposition Disposition (POD) and Alternate Phase Opposition Disposition (APOD) are implemented for multilevel inverter. A general multi carrier based SPWM scheme is shown in figure (3). It consists of two carrier waves (triangular) and a reference wave (sinusoidal). Figure 3: Multi Carrier Sine Pulse Modulation Scheme The three phase multilevel inverter is designed with multi carrier based PWM schemes. Further the results of all these schemes are compared. The three phase 5-level inverter is shown in below figure (4). In consists of 3- single phase 5-level inverters, which are cascaded to get a three phase output. 2.1 Control Schemes For the 5-level inverter, the Phase Disposition technique requires 4- carrier waves and a reference wave. This control method is shown in below figure (5) with 4triangular carriers with one sinusoidal reference waveform. Here all the carrier waves are displaced with same phase

5 Figure 4: 3-Phase 5-level cascaded H-bridge inverter Figure 5: Phase Disposition carrier arrangement for 5- Level inverter Thus, the number of carrier wave forms required for an n level inverter is n-1. For an n level inverter is, n = 2N+1, Where N= number of full bridges and n = number of levels. This control scheme requires n-1 carrier waveforms, for an n- level output. In POD control scheme, there are 4-carrier waveforms are divided in two sets. Upper 2-carriers are set-1, which are in same phase. Lower 2-carriers are set-2, which are arranged with 1800 phase shift to upper set-1. This APOD control scheme requires n-1 carrier waveforms, for

6 Figure 6: Phase Opposition Disposition carrier arrangement for 5- Level inverter an n-level output, these are to be phase disposed by each other with 1800 phase shift alternatively as shown in figure (6). In this control scheme 4-carrier signals are considered as 2-sets. Each carrier signal in the set is 1800 out of phase with other, and the same will repeat for the remaining sets too. Figure 7: Alternate Phase Opposition and Disposition carrier arrangement for 5- Level inverter

7 Figure 8: Injection of 3rd harmonic Figure 9: 3-phase output voltage waveforms for 5-level inverter with PD Figure 10: 3-phase output voltage waveforms for 5-level inverter with POD

8 Figure 11: 3-phase output voltage waveforms for 5-level inverter with APOD Figure 12: Total Harmonic Distortion of 5-level inverter with PD

9 Figure 13: Total Harmonic Distortion of 5-level inverter with POD Figure 14: APOD Total Harmonic Distortion of 5-level inverter with

10 3 CONCLUSION In the present work, performance of cascaded five level inverter using advance pulse width modulation technique has been analyzed. The topology used in this technique reduces the number of power switches and switching losses. The cascaded H-bridge multilevel inverter become most popular in the multilevel inverter family. Among various PWM techniques multi carrier based PWM technique gives less harmonic distortion. In this paper, three different advanced PWM schemes named as PD, POD and APOD are simulated for 5-level cascaded H-bridge inverter. From the harmonic distortion analysis, it is seen that the Phase Disposition (PD) scheme has less harmonics in its output compared to remaining two schemes. From the FFT analysis we get minimum THD of 17.17% and the fundamental frequency 50Hz shows performance of the cascaded hybrid five level inverter with Phase Disposition control scheme at modulation index of 0.6. The simulation results show that this hybrid five level inverter topology can be applied for high power applications. Thus the proposed method will reduce the cost, and also used less number of switches, harmonic reduction and the heat losses. References [1] Georgios Konstantinou, Mihai Ciobotaru, Vassilios Agelidis.; Selective harmonic elimination pulse-width modulation of

11 modular multilevel converters, IET Power Electronics, Volume 6, issue 1, 2013, p [2] Mohan M., Renge and Hiralal M. Suryawanshi, Five-Level Diode clamped Inverter to eliminate Common Mode Voltage and Reduced dv/dt in Medium voltage rating Induction Motor Drives, IEEE Trans. Power Electron., vol. 23, no. 4, pp , Jul [3] Nuntawat Thitichaiworakorn, Makoto Hagiwara and Hirofumi Akagi, Experimental Verification of a Modular Multilevel Cascade Inverter Based on Double-Star Bridge Cells, IEEE Trans. Ind. Appl., vol. 50, no. 1, pp , Jan./Feb [4] Ebrahim Babaei, Somayeh Alilu and Sara Laali, A New General Topology for Cascaded Multilevel Inverters With Reduced Number of Components Based on Developed H-Bridge, IEEE Trans. Ind. Electron., vol. 61, no. 8, pp , Aug [5] K. Sivakumar, Anandarup Das, Rijil Ramchand, Chintan Patel and K. Gopakumar, A Five-Level Inverter Scheme for a Four-Pole Induction Motor Drive by Feeding the Identical Voltage-Profile Windings From Both Sides, IEEE Trans. Ind. Electron., vol. 57, no. 8, pp , Aug [6] M. Malinowski, K. Gopakumar, J. Rodriguez, and M. A. Perez, A survey on cascaded multilevel inverters, IEEE Trans. Ind. Electron., vol. 57, no. 7, pp , Jul [7] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, Recent advances and industrial applications of multilevel converters, IEEE Trans. Ind. Electron., vol. 57, no. 8, pp , Aug [8] M. D. Manjrekar, P. K. Steimer, and T. A. Lipo, Hybrid multilevel power conversion system: A competitive solution for high-power applications, IEEE Trans. Ind. Appl., vol. 36, no. 3, pp , May/Jun [9] P. CHANDRA BABU, Dr. B. Venkata Prasanth, Dr. P. Sujatha A Review: Significant of RES for 21st Century and

12 Cost-Efficiency Based SWT/ Solar Interconnection Topologies Pertaining to Micro Grids. International Journal of Pure and Applied Mathematics, Volume 119 No ,

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