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1 9-958; Rev 0; 7/0 MAX9 Evaluation Kit General Description The MAX9 evaluation kit (EV kit) is a fully assembled and tested circuit board that contains all the components necessary to evaluate the performance of the MAX9/ MAX9/MAX9 dual, 8-bit analog-to-digital converters (ADCs). The MAX9/MAX9/MAX9 accept AC- or DC-coupled, differential, or single-ended analog inputs. The digital output produced by the ADC can be easily captured with a user-provided high-speed logic analyzer or data acquisition system. The EV kit operates from a.v analog and a.5v digital power supply. The EV kit includes circuitry that generates a clock signal from an AC sine wave signal provided by the user. The EV kit comes with the MAX9 installed. Order free samples of the pin-compatible MAX9 or MAX9 to evaluate these parts. DESIGNATION QTY DESCRIPTION C C6, C9, C9, C C7, C9, C, C, C5, C7, C9, C4 C7, C, C4, C0 4 C8, C, C5 C0, C, C6, C7 C8, C6, C8, C40, C4 C8, C0, C, C ±0%, 6V X7R ceramic capacitors (060) TDK C608X7RC04K 000pF ±0%, 50V X7R ceramic capacitors (060) TDK C608X7RH0K 0.µF ±0%, 6.V X5R ceramic capacitors (060) TDK C608X5R0J4K pf ±5%, 50V C0G ceramic capacitors (060) TDK C608C0GH0J.µF ±0%, 0V tantalum capacitors (A case) AVX TAJA5K00R 0µF ±0%, 0V tantalum capacitors (B case) AVX TAJB06M00R J Header x 0 Selector Guide PART SPEED (Msps) MAX9ETI 7.5 MAX9ETI MAX9ETI 45 Features Up to 45Msps Sampling Rate (MAX9) Ultra-Low-Power Operation Single-Ended or Fully Differential Input Signal Configuration AC- or DC-Coupled Input Configuration Configurable Reference Voltage On-Board Clock-Shaping Circuit Fully Assembled and Tested Also Evaluates MAX9 and MAX9 (IC Replacement Required) Ordering Information PART TEMP RANGE IC PACKAGE MAX9EVKIT 0 C to +70 C 8-Thin QFN Note: To evaluate the MAX9/MAX9, request a free sample with the MAX9 EV kit. Component List DESIGNATION QTY DESCRIPTION JU JU4, JU7, JU8, JU JU5, JU6, JU9, JU0 R R4, R8, R R40 7 -pin headers 4 -pin headers 5 ± resistors (060) R5, R6, R4 R44 0 Not installed, resistors (060) R7 R0, R7 5 kω ± resistors (060) R R Ω ± resistors (060) R5, R0 4.0kΩ ± resistors (060) R6 5kΩ /4in potentiometer, turn R9 6.04kΩ ± resistor (060) R R0 0 00Ω ± resistors (060) R45, R46 0 Not installed, resistors (040) T, T RF transformers Mini-Circuits TT-6-KK8 U MAX9ETI (8-pin TQFN) U Dual CMOS differential line receiver (8-pin SO), MAX9ESA Evaluates: MAX9/MAX9/MAX9 Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 MAX9 Evaluation Kit Evaluates: MAX9/MAX9/MAX9 Component List (continued) DESIGNATION QTY DESCRIPTION U C LKIN, D /E _IN A, D /E _IN B, S /E _IN A+, S /E _IN A-, S /E _IN B+, S /E _IN B- Buffer/drivers tri-state output (48-pin TSSOP) Texas Instruments SN74ALVCH644DGG 7 SMA PC-mount connectors None Shunts (JU JU) None MAX9 PC board Quick Start Required Equipment DC power supplies: Digital:.5V, 00mA Analog:.V, 00mA Function generator with low-phase noise and low jitter for clock input (e.g., HP 866A) Two function generators for analog signal inputs (e.g., HP 866A) Logic analyzer or data-acquisition system (e.g., HP 67, HP 6500C) Analog anti-aliasing filters Digital voltmeter Procedures The MAX9 EV kit is a fully assembled and tested surface-mount board. Follow the steps below for board operation. Do not turn on power supplies or enable function generators until all connections are completed: ) Verify that shunts are installed across pins and of jumpers JU7 and JU8 (fully operational, outputs enabled). ) Verify that no shunts are installed across jumpers JU9 and JU0. ) Verify that a shunt is installed across pins and of jumper JU (internal reference mode). 4) Connect the logic analyzer to header J. Both channel A and channel B data signal are multiplexed on header J. Control signal A/ B on pin J J indicates whether data is from channel A (high) or from channel B (low). 5) Connect a.v power supply to the VA and pads. Connect the ground terminal of this supply to the GND pad. 6) Connect a.5v power supply to the VDB and VODUT pads. Connect the ground terminal of this supply to the OGND pad. 7) Turn on both power supplies. 8) With a voltmeter, verify that.8v is measured across test point TP and GND. If the voltage is not.8v, adjust potentiometer R6 until.8v is obtained. 9) Connect the clock function generator to the CLKIN SMA connector. 0) Connect the output of the analog signal function generator to the input of the suggested anti-aliasing filters: a) To evaluate differential AC-coupled analog signals, verify that shunts are installed on pins and of jumpers JU JU4. Connect the output of the analog anti-aliasing filters to the D/E_INA and D/E_INB SMA connectors. b) To evaluate single-ended AC-coupled analog signals, verify that shunts are installed on pins and of jumpers JU JU6. Verify that resistors R5 and R6 are OPEN. Connect the output of the anti-aliasing filters to the S/E_INA+ and S/E_INB+ SMA connectors. Component Suppliers SUPPLIER PHONE FAX WEBSITE AVX Mini-Circuits TDK Texas Instruments Note: Please indicate that you are using the MAX9 when contacting these component suppliers.

3 MAX9 Evaluation Kit c) To evaluate single-ended DC-coupled analog signals, verify that shunts are installed on pins and of jumpers JU and JU, and no shunts are installed on jumpers JU, JU4, JU5 and JU6. Remove capacitors C and C and resistors R and R. Install 0Ω resistors on the R5 and R6. Connect the outputs of the anti-aliasing filters to the S/E_INA+ and S/E_INB+ SMA connectors. d) To evaluate differential DC-coupled analog signals, verify that shunts are installed on pins and of jumpers JU and JU, and no shunts are installed on jumpers JU, JU4, JU5, and JU6. Remove capacitors C and C and resistors R and R. Install 0Ω resistors on the R5 and R6. Connect the outputs of the anti-aliasing filters to the S/E_INA+/- and S/E_INB+/- SMA connectors. ) Enable the function generators. Set the clock function generator for an output amplitude of.4v P-P (+.6dBm) and a frequency (f CLK ) of 45MHz. Set the analog input signal generators to the desired output test signal amplitudes and frequencies. The two function generators should be phase locked to each other. ) Channel A data is presented on the falling edge and channel B data is presented on the rising edge of the logic analyzer clock. ) Enable the logic analyzer, and begin collecting data. Detailed Description The MAX9 EV kit is a fully assembled and tested circuit board that contains all the components necessary to evaluate the performance of the MAX9/MAX9/ MAX9 dual 8-bit ADCs. The ADCs provide the digitized data of their two input channels in multiplexed fashion on a single 8-bit bus. The EV kit comes with the MAX9 installed, which can be evaluated with a maximum clock frequency (f CLK ) of 45MHz. The MAX9 accepts differential or single-ended analog input signals. With the proper board configuration (as specified below), the input signals can be AC- or DC-coupled. The EV kit is based on a four-layer PC board design to optimize the performance of the MAX9. Separate analog and digital power planes minimize noise coupling between analog and digital signals. For simple operation, the EV kit is specified to have.v and.5v power supplies applied to analog and digital power planes, respectively. However, the digital plane can be operated from.8v to.v without compromising performance. The logic analyzer s threshold must be adjusted accordingly. Access to the digital outputs is provided through header J for channels A and B. The 0.in 0-pin header easily interfaces with a user-provided logic analyzer or data acquisition system. Power Supplies The MAX9 EV kit requires separate analog and digital power supplies for best performance. A.V power supply is used to power the analog portion of the MAX9 () and the on-board clock-shaping circuit (VA). The MAX9 analog supply voltage has an operating range of.7v to.6v. Note that.v must be supplied to the VA pads to meet the minimum supply voltage of the clock-shaping circuit. A separate.5v power supply is used to power the digital portion (VODUT and VDB) of the MAX9 and the buffer/driver (U); however, it can operate with a supply voltage as low as.8v and as high as.6v. The digital power-supply voltage must not exceed the analog power-supply voltage. Clock An on-board clock-shaping circuit generates a clock signal from an AC sine-wave signal applied to the CLKIN SMA connector. The input signal should not exceed a magnitude of.6v P-P (+.dbm). The frequency of the signal should not exceed 45MHz for the MAX9. The frequency of the sinusoidal input signal determines the sampling frequency of the ADC. Differential line receiver U processes the input signal to generate the CMOS clock signal. The signal s duty cycle can be adjusted with potentiometer R6. A clock signal with a 50% duty cycle (recommended) can be achieved by adjusting R6 until.8v (40% of the analog power supply) is produced across test points TP and GND when the analog supply voltage is set to.v. The clock signal is available at the header pin J-, which can be used as a clock source for the logic analyzer. Additionally, the signal pin J- (A/ B) is an image of the clock signal. Input Signals The MAX9 accepts differential or single-ended, AC- DC-coupled analog input signals. The EV kit accepts input signals with full-scale amplitude of less than.04v P-P (+4dBm). See Table for proper jumper configuration. Note: When a differential signal is applied to the ADC, the positive and negative input pins of the ADC each receive half of the input signal supplied at SMA connectors D/E_INA and D/E_INB with a DC offset voltage of /. Evaluates: MAX9/MAX9/MAX9

4 MAX9 Evaluation Kit Evaluates: MAX9/MAX9/MAX9 Table. Single-Ended/Differential, AC-/DC-Coupled Jumper Configuration JUMPER SHUNT POSITION PIN CONNECTION EV KIT OPERATION JU and INA- pin connected to COM pin through R JU and JU5 Installed INA+ pin AC-coupled to SMA connector S/E_INA+ through R and C INA+ pin assumes the DC offset at the REFP and REFN common JU Not installed INA- pin assumes no DC offset JU and JU5 Not installed JU and JU and JU Not installed JU and JU5 Not installed INA+ pin DC-coupled to SMA connector S/E_INA+ through R and R5 INA+ pin assumes the DC offset from the analog input source INA- pin connected to low-side of transformer T through R INA+ pin connected to high-side of transformer T through R INA- pin DC-coupled to SMA connector S/E_INA- through R INA+ pin DC-coupled to SMA connector S/E_INA+ through R and R5 INA+ pin assumes the DC offset from the analog input source JU and INB+ pin AC-coupled to SMA connector S/E_INB+ through R and C JU4 and INB- pin connected to COM pin through R4 JU6 Installed INB+ pin assumes the DC offset at the REFP and REFN common JU and INB+ pin DC-coupled to SMA connector S/E_INB+ through R and R6 JU4 Not installed INB- pin assumes no DC offset JU6 Not installed JU and JU4 and INB+ pin assumes the DC offset from the analog input source INB+ pin connected to high side of transformer T through R INB- pin connected to low side of transformer T through R4 Analog input signal is applied to channel A. Single-ended input, AC-coupled. R5 opened (default) Analog input signal is applied to channel A. Single-ended input, DC-coupled. R5 shorted (0Ω)) C opened (removed) R opened (removed) Analog input signal is applied to channel A. Differential input, AC-coupled. Analog input signal is applied to channel A. Differential input, DC-coupled. R5 shorted (0Ω)) C opened (removed) R opened (removed) Analog input signal is applied to channel B. Single-ended input, AC-coupled. R6 opened (default) Analog input signal is applied to channel B. Single-ended input, DC-coupled. R6 shorted (0Ω)) C opened (removed) R opened (removed) Analog input signal is applied to channel B. Differential input, AC-coupled. 4

5 MAX9 Evaluation Kit Table. Single-Ended/Differential, AC-/DC-Coupled Jumper Configuration (continued) JUMPER SHUNT POSITION PIN CONNECTION EV KIT OPERATION JU and JU4 JU6 Not installed Not installed INB+ pin DC-coupled to SMA connector S/E_INB+ through R and R6 INB- pin DC-coupled to SMA connector S/E_INB- through R4 INB+ pin assumes the DC offset from the analog input source Table. Power-Down/Standby/Idle/Operating Mode Configurations Power-Down/Standby/ Idle/Operating Modes The MAX9 EV kit also features jumpers that allow the user to enable or disable certain functions of the data converter. Jumpers JU7 and JU8 control the power-down, standby, idle, and operating modes of the MAX9 EV kit. See Table for jumper settings. Reference Modes The MAX9 EV kit provides three modes of operation for the reference: internal reference, buffered external reference, and unbuffered external reference modes. In internal reference mode, the REFIN pad is connected to. In buffered external reference mode, an external user-provided reference voltage of.04v may be connected at the REFIN pad. In unbuffered external reference mode, REFIN is connected to GND, and three external reference voltages should be used to drive REFP, REFN, and COM. Jumper JU selects the reference modes of the MAX9 EV kit. See Table for jumper settings. Analog input signal is applied to channel B. Differential input, DC-coupled. R6 shorted (0Ω) C opened (removed) R opened (removed) JUMPER SHUNT POSITION PIN CONNECTION EV KIT OPERATION JU7 and PD0 connected to OGND JU8 and PD connected to OGND JU7 and PD0 connected to OGND JU8 and PD connected to VODUT JU7 and PD0 connected to VODUT JU8 and PD connected to OGND JU7 and PD0 connected to VODUT JU8 and PD connected to VODUT JU7, JU8 None PD0, PD pads connected to external control source (TTL/CMOS compatible) MAX9 in power-down mode ADC off, Ref off, output Three-stated MAX9 in standby mode ADC off, Ref on, output Three-stated MAX9 in idle mode ADC on, Ref on, output Three-stated MAX9 in operating mode ADC on, Ref on, output enabled PD0, PD = 00; power-down mode PD0, PD = 0; standby mode PD0, PD = 0; idle mode PD0, PD = ; operting mode Table. Reference Modes Configuration (Jumper JU) SHUNT POSITION and REFIN PIN CONNECTION Connected to and Connected to GND None Connected to external reference source (.04V) EV KIT OPERATION Internal reference mode. V REF = V REFP - V REFN = 0.5V Unbuffered external reference mode. REFP, REFN, COM pins driven by external sources Buffered external reference mode. V REF = V REFP - V REFN = 0.5V Evaluates: MAX9/MAX9/MAX9 5

6 MAX9 Evaluation Kit Evaluates: MAX9/MAX9/MAX9 Digital Output Format The MAX9 features a single 8-bit, multiplex CMOScompatible digital output bus. Channel A is available at the output during A/ B high. Channel B is available at the output during A/ B low. The channel selection signal (A/B) is an image of the clock that may be used to synchronize the output data. Refer to the MAX9 data sheet for more information. A driver is used to buffer the ADC s digital outputs. This buffer is able to drive large capacitive loads, which may be present at the logic analyzer connection, without compromising the digital output signals. The outputs of the buffers are connected to header J located on the right side of the EV kit, where the user can connect a logic analyzer or data-acquisition system. See Table 4 for channel and bit locations on header J. All even-number pins on header J are connected to OGND. Table 4. Header J Output Bit Location (Multiplexed Output Operation) CHANNEL A/B BIT D0 BIT D BIT D BIT D BIT D4 BIT D5 BIT D6 BIT D7 A (CLK )* B (CLK )* *Trigger signal for the logic analyzer. 0 J- A0 J- B0 J-5 A J-5 B J-7 A J-7 B J-9 A J-9 B J- A4 J- B4 J-5 A5 J-5 B5 J-7 A6 J-7 B6 J-9 A7 J-9 B7 6

7 MAX9 Evaluation Kit 5 COM 4 REFIN INA+ U MAX9 D7 D6 D5 D4 A/B D D D D0 VDD VDD VDD OVDD GND GND GND OGND R 00Ω R4 00Ω R6 00Ω R8 00Ω C5 C7 C9 C4 VODUT C6.µF 0V C8.µF 0V C40.µF 0V C4.µF 0V JU9 R45 SHORT R46 SHORT R 00Ω R 00Ω R5 00Ω R7 00Ω R9 00Ω 47 A 46 A 44 A 4 A4 4 A 40 A 8 A 7 A4 6 A 0E 48 0E 5 0E 4 40E 4 GND 0 GND 5 GND GND 8 GND 4 GND 9 GND 45 GND 9 4Y 0 4Y 4Y 4Y4 U SN74ALVCH644 Y Y Y Y4 Y Y Y Y4 Y Y VCC VCC VCC VCC A A4 4A 4A 4A 4A4 Y Y4 A U MAX R0 00Ω VDB R R4 R6 R8 R40 C R R R5 R7 R9 C4 A J C5 HEADER X 0 J 9 J 7 J 5 J J J 9 J 7 J 5 J J J 0 J 8 J 6 J 4 J J 0 C6 J 8 J 6 J 4 J Evaluates: MAX9/MAX9/MAX9 VA VA GND C7 D/E_INA C R S/E_INA+ R REFN R0 kω S/E_INB+ R6 OPEN R D/E_INB C4 R4 R4 OPEN VDB R4 OPEN OGND R4 OPEN R44 OPEN VODUT OGND C8 0µF 0V REFIN 6 T 5 4 R5 OPEN C R9 kω JU6 C 6 T 5 4 VDB C VODUT C JU R8 kω C6 C5 C 0µF 0V COM C4 0µF 0V JU JU COM JU5 COM JU4 R7 kω REFP JU PDO PD COM REFN C8 0.µF R 4.9Ω R 4.9Ω C 0.µF C5 0.µF R 4.9Ω R4 4.9Ω VODUT REFN VODUT JU8 CLK C7 000pF C9 JU7 C0 pf C pf C 000pF C4 000pF C6 pf C7 pf JU0 6 REFN 7 REFP 6 INB+ 7 INB- PD0 PD 4 CLK R6 5kΩ VA R5 4.0kΩ R7 kω CLKIN TP C C VA R9 6.04kΩ 4 RIN- RIN- INA- S/E_INA- S/E_INB- RIN+ RIN+ VCC ROUT ROUT GND GND CLK A C9 C0 000pF C0 0µF 0V C9 VA C8.µF 0V R8 49.9kΩ R0 4.0kΩ Figure. MAX9 EV Kit Schematic 7

8 MAX9 Evaluation Kit Evaluates: MAX9/MAX9/MAX9 Figure. MAX9 EV Kit Component Placement Guide Component Side 8

9 MAX9 Evaluation Kit Figure. MAX9 EV Kit PC Board Layout Component Side Evaluates: MAX9/MAX9/MAX9 9

10 MAX9 Evaluation Kit Evaluates: MAX9/MAX9/MAX9 Figure 4. MAX9 EV Kit PC Board Layout Ground Plane 0

11 MAX9 Evaluation Kit Figure 5. MAX9 EV Kit PC Board Layout Power Plane Evaluates: MAX9/MAX9/MAX9

12 MAX9 Evaluation Kit Evaluates: MAX9/MAX9/MAX9 Figure 6. MAX9 EV Kit PC Board Layout Solder Side

13 MAX9 Evaluation Kit Figure 7. MAX9 EV Kit Component Placement Guide Solder Side Evaluates: MAX9/MAX9/MAX9 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 0 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.