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1 9-75; Rev ; 5/5 MAX7 Evaluation Kit General Description The MAX7 evaluation kit (EV kit) simplifies the testing and evaluation of the MAX7 quadrature transmitter. The EV kit provides 5Ω connectors for all RF inputs and outputs. A varactor-based tank circuit is provided for the on-chip IF voltage-controlled oscillator (VCO) and phase locked with an on-chip PLL. I/Q baseband inputs come with standard BNC connectors. The EV kit allows evaluation of the MAX7 I/Q modulator, IF VGA, RF upconverter, IF VCO, dual synthesizer, -wire programming interface, and power-management features. SPI/QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. Component List DESIGNATION QTY DESCRIPTION C, C, C, C, C9, C5, C, C8 C, C, C, C, C, C7, C, C8, C, C, C, C8, C5, C5, C58, C59, C, C, C7, C8, C8 C85 C, C5, C, C75, C79, C88, C9, C9, C95, C9, C97 8 pf ±5% ceramic capacitors Murata GRM555CHJ Open C C7, C, C8, C9, C, C, C, C5, C, C7, C78, C8 C8, C9, C5, C7, C, C55, C57 7 C C, C.µF ±% ceramic capacitors Murata GRM55RCK.7pF ±.pf ceramic capacitor Murata GRM555CHR7B ±% ceramic capacitors Murata GRM55R7HK.µF ±% ceramic capacitors Murata GRM55R7CK.pF ±.pf ceramic capacitor Murata GRM555CHRB pf ±5% ceramic capacitors Murata GRM555CHJ 5Ω Connectors on All RF Ports BNC Connectors for Baseband Inputs Fully Assembled and Tested Low-Power Shutdown Mode SPI TM /QSPI TM /MICROWIRE TM Compatible PC Control Software (Available at Features Ordering Information PART TEMP RANGE IC PACKAGE MAX7EVKIT - C to 85 C 8 Thin QFN-EP* *EP = Exposed paddle. Quick Start The MAX7 EV kit is fully assembled and factory tested. Follow the instructions in the Connections and Setup section. Test Equipment Required This section lists the recommended test equipment to verify the operation of the MAX7. It is intended as a guide only, and substitutions may be possible. One low-noise signal generator capable of generating a 9.MHz signal at mv P-P for the PLL reference frequency One RF signal generator capable of generating signals in the 5MHz to 95MHz frequency range with a minimum output power of -5dBm for the RF local oscillator An RF spectrum analyzer with optional digital modulation personality (Rohde and Schwarz FSEA or equivalent) A power supply that can provide 5mA at.v A power supply that can provide 5mA at 5V An additional voltage source adjustable from to.5v for control of the VGA functions Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 DESIGNATION QTY DESCRIPTION C, C5 C8 C9 C C C7 C, C5, C C7, C5 C9 C5 C5, C5 9pF ±.pf ceramic capacitors Murata GRM555CH9RB.µF ±% ceramic capacitor Murata GRM55R7AK.µF ±% ceramic capacitor Murata GRM55R7CK.µF ±% ceramic capacitor (85) Murata GRMBR7C5K pf ±% ceramic capacitor Murata GRM55R7HK.7µF ±% ceramic capacitor Murata GRM55R7A7K 5pF ±5% ceramic capacitors Murata GRM555CH5J 9.pF ±.pf ceramic capacitors Murata GRM555CH9RB.7pF ±.pf ceramic capacitor Murata GRM555CHR7B.5pF ±.pf ceramic capacitor Murata GRM555CHR5B pf ±5% ceramic capacitors Murata GRM555CHJ Component List (continued) DESIGNATION QTY DESCRIPTION C7, C7 µf ±% tantalum capacitors (B-case) AVX TAJBK C7, C7, C9.µF ±% ceramic capacitors () Murata GRM88RA5K C7, C77, C8 µf ±% tantalum capacitors (B-case) AVX TAJBK D, D, D, D5 Varactor diodes Alpha Industries SMV7-79 D LED FL Open FL Open J, J, J, J, J, J5, J7 7 connectors edge mount Johnson -7-8 J, J, J Open J, J7 BNC connectors A/D Electronics 58-- JP x header Sullins PTCDAAN JU JU, JU, x headers 9 JU7 JU Sullins PTCSAAN JU, JU JU Shunts Sullins STCSYAN JU JU, Test points 8 TESTPOINT, Keystone 5 RBIAS I/Q arbitrary waveform generator or CDMA generator (Agilent EB or equivalent) PC (8DX or better) with Windows 95/98// NT. or later operating system and an available parallel port INTF interface board and cable (supplied with EV kit) Connections and Setup This section provides step-by-step instructions for getting the EV kit up and running for evaluation of the MAX7 in 55MHz CDMA mode. ) Verify shunts JU and JU JU are in place. Windows is a registered trademark of Microsoft Corp. ) Connect the INTF interface cable from the INTF interface board to the MAX7 EV kit. Pin of the interface cable corresponds to the red wire. Pin of the connectors are designated in the silkscreen on the MAX7 and INTF boards. ) Connect a V power supply to the headers labeled VBAT and VREG. The INTF board derives its power from the MAX7 EV kit. ) Connect a 5V power supply to the header labeled 5V. 5) With its output disabled, connect the low-noise signal generator to the REF port. Set its frequency to 9.MHz and its amplitude to -dbm. ) With its output disabled, connect the RF signal generator to the LOL port. Set its frequency to 575MHz and its amplitude to -dbm.

3 DESIGNATION QTY DESCRIPTION L 7nH ±5% inductor () L, L nh ±5% inductors () L, L, L7, L, L Open L5, L9 nh ±5% inductors () L9 5nH ±5% inductor () L nh ±5% inductor () Q, Q npn transistors Central Semiconductor CMPT899 R, R, R7, R9, R, R7, 7 7kΩ ±5% resistors R5 R 5kΩ ±5% resistor R, R5, R9, R kω ±5% resistors R, R, R, R, R5, R7, R, R, R7, R, R, R9, Open R5, R55, R58 R, R7, R7, R7 R8 R8, R, R8, R8, R5, R5 5Ω ± resistors (85) R9, R8 9.Ω ± resistors (85) R, R 8Ω ±5% resistors (85) R, R, R, R Ω ± resistors Component List (continued) DESIGNATION QTY DESCRIPTION R, R5 kω ± resistors (85) R5, R, R, R8, R9, R57, 7 Ω ±5% resistors R R7, R7 kω ±5% resistors R, R, R5, R 5.kΩ ±5% resistors R kω ±5% resistor R, R5, R5 7Ω ±5% resistors R 5Ω ±5% resistor R kω ±5% resistor R7 kω ±5% resistor R7.kΩ ±5% resistor T, T Baluns Toko 58DB- U 5MHz quadrature transmitter MAX7EGM U.8V LDO MAX887EUK8 U, U Dual op amps MAXESA U5, U8.V LDOs MAX887EUK V Open V Open V Open 7) Enable the low-noise signal generator s output; then enable the RF signal generator s output. 8) Install and run Maxim s CDMA control software for the MAX7 evaluation kit. This software is available on the web at On the IC selection form, select -P. Click on the Register View button (Note: The MAX Register View screen is also used to program the MAX7.) 9) With the MAX-P control screen active, set the registers according to Table. Set the reference frequency in the control screen to 9.MHz. ) Click on the Send Data button for each of the control registers located at the right of the screen. There are eight registers that need to be downloaded to the IC. The Lock indicator on the screen should be red, indicating that the IF PLL is locked. ) Apply.5V to the VGC header (JU). IF Modulator Evaluation ) Connect the CDMA baseband signal generator to the I and Q ports using BNC connectors. Set the modulation to reverse-channel CDMA at an output level of 78mV P-P. The nominal input level at the I/Q input pins is mv RMS. Measure the differential voltage at the chip s I/Q inputs and adjust the signal generator s output if necessary to achieve mv RMS. ) Connect IFOUT to the spectrum analyzer. Configure the spectrum analyzer to measure ACPR for reverse-channel CDMA. Set the center frequency to MHz with a -dbm reference level and khz resolution bandwidth. ) Adjust the V GC voltage until the output power is -dbm. The ACPR at ±885kHz offset will be approximately -dbc, and the ACPR at ±.98MHz will be approximately -8dBc.

4 RF Upconverter Evaluation ) Connect a CDMA RF signal generator to the IFIN port using the connector. Set the carrier frequency to MHz, set the output power to -.5dBm, and set the modulation to reverse-channel CDMA. ) Connect RFL to the spectrum analyzer. Configure the spectrum analyzer to measure ACPR for reverse-channel CDMA. Set the center frequency to 55MHz with a dbm reference level and khz resolution bandwidth. ) Set the V GC voltage to.5v and adjust the IF input power until the RF output power is 8dBm. The ACPR at ±885kHz offset will be approximately -7dBc, and the ACPR at ±.98MHz will be approximately -8dBc. Cascaded Evaluation ) Connect the CDMA baseband signal generator to the I and Q ports using BNC connectors. Set the modulation to reverse-channel CDMA at a 78mV P-P output level. The nominal input level at the IC s I/Q input pins is mv RMS. Measure the differential voltage at the chip s I/Q inputs and adjust the signal generator s output if necessary to achieve mv RMS. ) Connect an external MHz bandpass filter between the IFOUT and IFIN ports of the MAX7 evaluation kit. A 5Ω filter with approximately db of insertion loss is recommended, or an attenuator with a loss of db can be used if a MHz filter is not available. The on-board baluns and matching networks at the IFOUT and IFIN ports each add approximately.5db of loss, for a total IF loss of 5dB. ) Connect RFL to the spectrum analyzer. Configure the spectrum analyzer to measure ACPR for reverse-channel CDMA. Set the center frequency to 55MHz with a dbm reference level and khz resolution bandwidth. ) Adjust the V GC voltage until the RF output power is 8dBm. The ACPR at ±885kHz offset will be approximately -dbc, and the ACPR at ±.98MHz will be approximately -8dBc. Adjustments and Control VGA Adjust Apply a voltage from.5v to.5v to header VGC to adjust the IF and RF VGA of the MAX7. The VGC voltage is filtered on the EV kit to minimize undesired amplitude modulation. Table. Register Settings REGISTER NAME TYPICAL REGISTER SETTINGS REGISTER ADDRESS RFM[7:] DEC b RFR[:] 8 DEC b IFM[:] 8 DEC b IFR[:] 8 DEC b OPCTRL[5:] 9F HEX b CONFIG[5:] DF HEX b I CC CTRL[5:] C8 HEX b TEST[8:] HEX b Interface Control The interface port is designed to use a -pin ribbon cable (Figure ); pins are signal lines, and the other pins are digital grounds. Pin of the interface cable is red. Pin is also designated in the silk screen on each of the PC boards. Detailed Description The following section covers the EV kit s circuit blocks in detail (refer to the MAX7 data sheet for additional information). I/Q Inputs The single-ended I/Q signals are converted to differential by operational amplifiers on the EV kit. The op amps also provide DC bias to the I/Q input pins of the MAX7. The EV kits are set up to provide mv RMS differential to the IC when driven with an IS-95 forwardmodulated source set to deliver.9v P-P into a matched 5Ω load. Programming Interface The programming interface is provided by the INTF interface board. The interface board buffers and level shifts logic levels from the PC to the MAX7 EV kit (refer to the INTF documentation). These logic signals control the logic pins as well as the serial interface. IFLO The IFLO output port provides an output signal at the IF VCO frequency with a typical -dbm output power. Enable the IFLO port by setting the BUF_EN bit in the OPCTRL register. REF REF is the reference frequency input to the RF and IF PLL. The REF port is AC-coupled. Make sure the reference signal has low phase noise, similar to that of a TCXO.

5 LOL The MAX7 EV kit requires an external RF local oscillator for evaluation. A low-noise RF signal generator can be connected to the EV kit s LOL port to act as the local oscillator. The minimum input level at the LOL port is -5dBm. RFL The MAX7 evaluation kit is shipped with a matching network optimized for MHz to 5MHz. This matching network can be retuned to be optimized for evaluation at other RF frequencies. IFIN± and IFOUT± The MAX7 evaluation kit is shipped configured for individual IF modulator and RF upconverter evaluation. IFIN± and IFOUT± are matched to 5Ω at MHz and on-board baluns at each port convert from differential to single-ended signals. For cascaded evaluation, a MHz bandpass filter must be connected between the board s IFIN and IFOUT connectors. A 5Ω filter with a typical db insertion loss is recommended to achieve the cascaded specifications quoted in the MAX7 data sheet. VBAT/VREG V BAT is the supply voltage to the PA driver circuitry. V REG is the supply voltage to all MAX7 s circuits other than the PA driver. The VREG header must be connected to VBAT or connected to a separate V supply for proper operation. Jumpers are provided to enable current measurement to each functional block of the IC (Table ). RBIAS Resistor R7 (nominally kω) connects from RBIAS to ground and sets the bias current for the upconverters and PA driver stages. Output linearity or efficiency may be improved by adjusting the PA driver current through the I-MULT bits in the I CC control register. Table. Jumpers JUMPER NUMBER JU JU JU JU JU JU7 JU8 JU9 JU ASSOCIATED FUNCTIONAL B V CC for RIVER Not used Not used VGC jumper V CC for PA predrivers V CC for RF mixer V CC for IF modulator V CC for digital interface V CC for RF charge pump Layout Considerations The MAX7 EV kit can serve as a guide for your board layout. Keep PC board trace lengths as short as possible to minimize parasitics. Place decoupling capacitors as close to the IC as possible with a direct connection to the PC board s ground plane. Do not share decoupling capacitor ground vias with other ground connections. PC Board Construction The MAX7 EV kit PC board uses a -mil-wide trace for 5Ω transmission line. The PC board has an 8-millayer profile on FR with a dielectric constant of.5. INTF SPI Interface Board The INTF interface board is used to interface -wire SPI protocol from a PC s parallel port to the EV kit. This board will level translate 5V logic from the PC to V CC of the EV kit (this will typically be V logic). The INTF also provides buffering and EMI filtering. Its absolute maximum supply voltage is.v, limited by the breakdown of the buffer IC. The recommended operating supply voltage range is.7v to.v. Component Suppliers SUPPLIER PHONE WEBSITE Alpha Industries AVX Coilcraft Johnson Murata Toko Note: Indicate that you are using the MAX7 when contacting these suppliers. 5

6 TO PC PARALLEL PORT DB5M VCC JU INTF MAX7 V BAT Figure. INTF with MAX7 EV Kit Providing Filtered Supply

7 5 7 MAX7 Evaluation Kit RFOUT REF V CC DRV TANK IFLO SHDN V CC I- I CLK DI CS IFOUT GC V CC V CC Q Q- RFPLL V CCRFCP V LO RFCP V IFCP CCIFCP CC U MAX7 EP RFOUT J 5V R7.k D SMLED Q CMPT899 RIVER C R pf k IDLE C7 VCCMXR C8 R5 pf k TXGATE C R J IFIN R9 C5 pf T L5 nh C5 pf VCCPA C57.uF L C 7nH pf C55.uF R 5k R7 k TEST POINT R R9 C5.5pF R7 RBIAS TEST POINT R7 k CLK DI CS J7 IFOUT C VCCMOD FL L C8 9.pF T L nh L nh C5 9.pF VCCMOD C85 R R R C7 R5 C pf MAX VCC R8 R8 9 5 OUTB INB C8 R5 I R7 I- R R R8 5 R8 5 IDLE V CC TXGATE IFIN IFIN- RBIAS IFOUT- TANK- R5 C7 5 VCCMOD.uF Q Q- R C9 R9 5.7pF k C8 5% JU OUTA R V R GC INA- R5 R58 5 INA R55 VEE INB- OUTA INA- INA VEE VCC OUTB INB- INB C U 5V R5 J C7 K BNC uf Q C9 pf J R57 LOH C pf VCCCP J C5 pf C78 C7 LOL C C8.uF R J REF L9 5nH C.7pF R C C C pf C pf D D5 J5 IFLO C9 R 5.k R 5.k R k VCCMOD C R8 U MAX R k C9.uF SHDN 5V C8 C R 8 5% R 5 R k VREG C7 uf R9 9 J7 BNC R C5 C 8 uf 5% 5 I Figure. MAX7 EV Kit Schematic (Sheet of ). Note: This schematic only represents components that are placed. 7

8 VBAT VREG 5V JU JU JU JU JU5 JU VBAT C77 C uf V VREG C8 C9 uf uf V 5V C7 C75 uf V C9 JU JU JU7 JU8 JU9 JU VCCPA C88 RIVER C5 VCCMXR C9 VCCMOD C95 C9 VCCCP C97 CS R7 7k INTERFACE TXGATE R 7k JP-9 JP- TXGATE IDLE JP-7 JP-8 R 7k R JP-5 JP- 7k IDLE SHDN JP- JP- L9 SHDN nh C5 JP- JP-.uF R 7 JP-9 DI JP- C DI 5pF R5 7 JP-7 JP-8 CS C5 R5 5pF 7 JP-5 CLK JP- C CLK 5pF R7 k JP- JP- JP- JP- Figure. MAX7 EV Kit Schematic (Sheet of ) 8

9 Figure. MAX7 EV Kit Component Placement Guide Component Side (Top View) 9

10 Figure. MAX7 EV Kit Component Placement Guide Solder Side (Bottom View)

11 Figure 5. MAX7 EV Kit PC Board Layout Component Side (Top View) Figure. MAX7 EV Kit PC Board Layout Inner Layer (Ground Plane, Top View) Figure 7. MAX7 EV Kit PC Board Layout Inner Layer (Top View) Figure 8. MAX7 EV Kit PC Board Layout Solder Side (Bottom View) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.