Application Note AN0002. Indice Semiconductor. Dimmable Mains LED Driver IC INDICE0101

Transcription

1 Application Note AN0002 Indice Semiconductor Dimmable Mains LED Driver IC INDICE0101 Dimming with leading and trailing edge phase cut dimmers: Our unique control chip provides dimming with most existing dimmers globally (Refer to dimmer and transformer compatibility list) High Efficiency: Typically 85% including all system losses such as the rectifier and EMC filter Input voltage range: 204VAC 264VAC for 240V systems and 90VAC 130VAC for 110V systems High power factor: >0.9 or >0.985 meeting US Energy Star requirements for commercial and residential installations Active temperature and power management: Our controller continuously monitors the operating temperature of the lamp adjusting power accordingly which maximises LED life and brightness. In the event the ambient temperature reaches extremes, the controller will safely shut down the lamp. The lamp will turn back on when the ambient temperature drops below the set threshold Turn key reference designs that are ready to be implemented by your development team Extensive testing: Indice has carried out extensive testing of its control technology on dimmers from across the globe (Refer to dimmer compatibility list). Indice has its control technology certified to meet international EMC requirements and validates its lumen and efficacy within NATA accredited laboratories DISCLAIMER All intellectual, design, manufacturing, reproduction, use and sale rights regarding this document are expressly reserved by Indice Semiconductor Inc.. These materials and all of the contents contained herein are provided AS IS and Indice Semiconductor Inc neither assumes nor accepts any liability for any errors or omissions contained in these materials. Application Note AN0002 Version: 1.4 Page 1 LED Mains Driver IC INDICE0101

2 Table of Contents 1 Introduction Rights and Ownership Terminology and Glossary Purpose Scope Referenced documents Indice Semiconductor Inc Support Contacts Driver Chip Overview Where to buy Driver Chip Pin Out Primary Functionality Power Select Input Power Control Input Primary Driver Output Reset Input Additional Functionality Power Factor Correction Temperature Adjustment Output Temperature Level Select Input Power Normalisation Input Duty Cycle Detect Driver Module Considerations Evaluating Indice Driver Performance LED Reserve Capacitor Appendix A Layout Guidelines Layout overview Guidelines and Strategies EMC Signal Noise Safety Thermal Conclusion Revision Control Application Note AN0002 Version: 1.4 Page 2 LED Mains Driver IC INDICE0101

3 1 Introduction 1.1 Rights and Ownership Patent applications, design registration and other matters apply to aspects of the intellectual property herein. All intellectual, design, manufacturing, reproduction, use and sale rights regarding this document are expressly reserved by Indice Semiconductor Inc. The intellectual property assets referred to in this document are owned by Indice Semiconductor Inc. All design materials are copyright to Indice Semiconductor Inc as unpublished works. 1.2 Terminology and Glossary AC Alternating Current DC Direct Current ELV Extra Low Voltage EMI Electro-Magnetic Interference IC Integrated Circuit LED Light Emitting Diode Mains 110V or 240V public supply systems OEM Original Equipment Manufacturer PCB Printed Circuit Board QFN Quad Flat No-lead Package MOSFET Metal Oxide Semiconductor Field Effect Transistor 1.3 Purpose Table 1: Acronyms The purpose of this document is to provide application specific information on the Mains LED Driver INDICE0101, for use by design engineers when implementing designs based on the INDICE0101. In particular this document deals with the implementation of Mains voltage ( V) implementation of the driver within the lamp body. Later sections include information on two specific examples which use the Mains LED Driver INDICE Scope The scope of this document is to contain information specific to the applying the Mains LED Driver INDICE0101 to LED driver circuits. 1.5 Referenced documents This document is written to be used in conjunction and makes reference to the following documents: Datasheet Mains LED Driver Chip INDICE0101. Application Note AN0002 Version: 1.4 Page 3 LED Mains Driver IC INDICE0101

4 1.6 Indice Semiconductor Inc Support Contacts The following key contacts should be used for any additional correspondence and queries in response to this document. Phone (9am 5pm, Mon Fri, US Pacific Time) 1.7 Driver Chip Overview Indice s LED Driver Module offers a rapid development path to deliver a product to market quickly for 110 or 220VAC lighting. Unique to Indice is our isolated, ultra-high frequency, self-resonant zero voltage switching technology which takes the headaches out of the product development by providing a fully functional reference design. The modules offer OEMs a compact and flexible high power source, extremely efficient driver for mains voltage LED lighting. Indice offers customers the following reference designs that are complete, production ready examples of how to build a product using our IC or control board: Figure 1: Dimmable Mains voltage reference design PCBA Application Note AN0002 Version: 1.4 Page 4 LED Mains Driver IC INDICE0101

5 The image in Figure 2 is a system block diagram for the dimmable mains voltage controller Where to buy Figure 2: Simplified system diagram. Information on where to buy Indice s MR16 driver IC, lamps and control board is available on our website at: Application Note AN0002 Version: 1.4 Page 5 LED Mains Driver IC INDICE0101

6 1.8 Driver Chip Pin Out Below in Figure 3 and Table 2 are details on the pin out and pin functions for the Indice LED Driver Chip. Figure 3: Top view of Indice LED Driver Chip QFN 16 package, with pins labelled. Dotted Lines indicate pins on bottom of chip. Name Pin Number PWR_SEL_INPUT 1 PWR_CTRL_INPUT 2 TEMP_SEL_INPUT 3 NC 4 PWR_NORM_INPUT 5 DUTY_CYCLE_DET 6 NC 7 PRI_DRIVE_OUTPUT 8 RESET 9 NC 10 NC 11 TEMP_ADJ_OUTPUT 12 GND 13 GND 14 V CC 15 V CC 16 GND 17 I/O A/D Description I A Control power select input pin. I A Power control input pin. I A Temperature level select pin. - - Pin not connected. (Reserved for later expansion.) I D Power normalisation input pin. I D Duty cycle detect - - Pin not connected. (Reserved for later expansion.) O D Primary drive output pin. I D Reset input pin. - - Pin not connected. (Reserved for later expansion.) - - Pin not connected. (Reserved for later expansion.) O D Temperature adjustment output pin. - - Ground reference. - - Ground reference V supply voltage V supply voltage. - - Ground reference. Table 2: Pin functions of Indice LED Driver Chip. I/O column indicates either I Input or O Output. A/D column indicates either A Analogue or D Digital. Application Note AN0002 Version: 1.4 Page 6 LED Mains Driver IC INDICE0101

7 2 Primary Functionality This section describes the primary functional blocks of the LED Driver Chip. The primary functionality includes functional blocks that are equired to implement even the simplest LED driver using the INDICE0101 LED Driver Chip. The only exceptions to this are the reset. These functional blocks are required because memory retention in the LED Driver Chip becomes unstable at high temperatures and to ensure that a predictable reset occurs when the supply voltage fades but does not drop below the brown out detection levell of the LED Driver Chip. The sections below make reference 4. to a standardised closed loop control network as shown below in Figure Figure 4: Basic closed loop control system. The figure shows the basic transfer blocks and the comparison of reference and sensor signals, V REF and V SENSOR, to produce the error signal, V ERR. 2.1 Power Select Input The power select input, PWR_SEL INPUT, is used to input a reference signal that will be used at the target level for the product. This signal can be thought of as V REF in the standardised control system in Figure 4. The signal is set by using a simple resistor voltage divider circuit as shown below in Figure 5. Figure 5: Basic resistor voltage divider network setting PWR_SEL_INPUT. It is suggested that components are selected to keep the PWR_SEL_INPUT in the range of 300 to 450 mv to ensure sufficient signal to noise and brake circuit performance. As depicted in the standardised control system, Figure 4 above, the reference signal is compared to a sensor signal in order to achieve control. The sensor signal is input via the PWR_CTRL_INPUT pin documented in Section 2.2. As thesee two signals undergo some form of comparison in the internal controller logic it is important that the signals be scaled so that they are around the same level during normal operating conditions. The controller chip also outputs an adjustment signal that can be used to intelligently bias the reference signal in order to adjust the output power during operation. This signal is output using the TEMP_ADJ_OUTPUT and is detailed in Section 3.2. Application Note AN0002 Version: 1.4 Page 7 LED Mains Driver IC INDICE0101

8 2.2 Power Control Input The power control input, PWR_CTRL_INPUT, is used to input the current power of the system as measured from a sensor. This signal can be thought of as V SENSOR in the standardised control system in Figure 4. The sensor used to provide the PWR_CTRL_INPUT signal is a combination of two sense resistors, R1_SENSE (AC) sense resistor in the range of 0.5 to 5 Ω, and R2_SENSE (DC) sense resistor in the range of 1 to 10Ω. The AC sense resistor is to aid in correct switching timings, whereas the DC sensor sets the input current and therefore power. The size of this sensor component should be carefully chosen to ensure that the signal produced is in the range of mV, as with the PWR_SEL_INPUT. It should also be small to reduce power consumption and maximise efficiency of the LED driver. A current sense resistor can be used as a measure of output power if it is assumed that the LED voltage does not vary around the target current. Although this is not strictly true, it is a close enough assumption to use when controlling LED power. As mentioned previously in Section 2.1, it is important to ensure that the PWR_SEL_INPUT and PWR_CTRL_INPUT are scaled to be around the same level in order to achieve proper control. This is usually achieved through the selection of the appropriate valued resistors, for R I_SENSE and R PS2, but can be achieved by other means if necessary. It is recommended that a small filter network be added to the sensor path (RFB1, RFB2, RFB3, CFB1). This filter network acts to slow the switching frequency slightly, while also providing a higher impedance point where biasing networks can be added to adjust the current draw of the power converter. One implementation of this filter network is presented in Figure 6. Figure 6: Small filter network added to the PWR_CTRL_INPUT signal line. Application Note AN0002 Version: 1.4 Page 8 LED Mains Driver IC INDICE0101

9 2.3 Primary Driver Output The primary driver output PRI_DRIVE_OUTPUT is used to drive the primary switching element of the power conversion circuit. This signal is a binary signal. The controller assumes that this controller output is coupled to the output power though the conversion circuit such that outputting a high level will increase the output power, while outputting a low level will decrease the output power. This relationship must hold in order to achieve closed loop control of the system. Suitable MOSFETs will require a drive stage such as the Micrel MIC4416. The MOSFET peak voltage must have sufficient overhead to ensure against failure, a good starting approximation is a multiplier of 4 of the input RMS voltage, ie >1KV for 240VAC, >500V for 120VAC 2.4 Reset Input The reset input RESET is an active low signal used for resetting the controller. This can be very useful if the design includes the ability to adjust the temperature set point, detailed later in Section 3.3. Because the temperature set point is read and stored when powering up the LED Driver Chip. Changes to the temperature settings while power is connected will require a reset in order to take effect. Simply pull the reset pin to 3V3 with a 47K resistor. Application Note AN0002 Version: 1.4 Page 9 LED Mains Driver IC INDICE0101

10 3 Additional Functionality 3.1 Power Factor Correction The goal of the Power Factor Correction (PFC) network is to achieve a Power Factor (PF) greater than the base With the implementation detailed in Figure 7, Indice has achieved Power Factor of greater than PF correction is achieved by adding some rectifier voltage waveform to the reference voltage. This makes the system track an input current waveform which more closely matches the input voltage waveform, thereby decreasing THD and increasing PF. Figure 7: power factor correction circuit Figure 7 captures the recommended implementation of the power factor correction stage which replaces the standard PWR_SEL_INPUT implementation detailed in section 3.2. Below are the standard recommended values, the value of RADJ1 and RPS1 will vary depending on the power required into the LED load. See section 3.2 for details on how to calculate these resistors values: CADJ2 10n RADJ2 4.7 MEG (240V systems), 2.6MEG (120V systems) RBUF 3k9 3.2 Temperature Adjustment Output The TEMP_ADJ_OUTPUT is a 3.9 khz, varying duty cycle waveform that can be used to adjust the output power to achieve temperature control. The duty cycle is controlled by a 2 nd order z-transform that attempts to adjust the LED Driver Chip temperature to match the level selected by the TEMP_SEL_INPUT. Indice suggests that the TEMP_ADJ_OUTPUT be used to adjust the reference voltage supplied to the PWR_SEL_INPUT pin. This can be achieved by replacing the simple resistor voltage divider circuit on PWR_SEL_INPUT with the temperature biasing circuit presented in Figure 8. Application Note AN0002 Version: 1.4 Page 10 LED Mains Driver IC INDICE0101

11 Figure 8: The PWR_SEL_INPUT circuit is modified as follows to accept input from the TEMP_ADJ_OUTPUT. The circuit in Figure 8 has two main components; the resistor voltage divider network usually used for the PWR_SEL_INPUT pin, and a low pass filter made up of R ADJ1 and C ADJ1. The low pass filter is used to turn the PWM signal from TEMP_ADJ_OUTPUT into a varying level DC signal which is then used to bias the PWR_SEL_INPUT signal. Typical values for the circuit used in the reference designs are: CADJ1 1uF RADJ1 56k RPS1 120k RPS2 2k2 Please note that the implementation of this circuit changes when implementing power factor correction, see section 3.1for more details. For analysing this circuit it is useful to examine the two limit cases; when TEMP_ADJ_OUTPUT is 100% duty cycle and therefore a constant 3.3 V and when it is 0% resulting in a constant 0V signal. These two circuits are illustrated in Figure 9, with the capacitor C ADJ1 ignored as it is assumed sufficient time has passed for the capacitor to be in a stable state. Figure 9: Two limit cases of the temperature biasing circuit presented in Figure 8. Left: The TEMP_ADJ_OUTPUT is 100% duty cycle. Right: TEMP_ADJ_OUTPUT is 0% duty cycle. From Figure 9 we can deduce the formula for the maximum and minimum reference levels, presented in Equation 1 and Equation 2 respectively. _ _ = Equation 1: The formula for the minimum temperature biased reference level voltage. Components are labelled as in Figure 9. Application Note AN0002 Version: 1.4 Page 11 LED Mains Driver IC INDICE0101

12 _ _ =. + + Equation 2: The formula for the maximum temperature biased reference level voltage. Components are labelled as in Figure 9. By tuning this circuit, the influence of the temperature control over the output power can be varied to achieve desired temperature control characteristics. For example, with the values provided in Figure 9 above we come up with a reference that can be made to vary between V. Indice suggests that C ADJ1 be selected to be suitably large, such that the effect of the TEMP_ADJ_OUTPUT can be considered as a DC bias, which modifies the normal reference voltage signal. For example a value of 10 uf is used in the Indice reference designs. It should be kept in mind that the power normalisation feature, presented later in Section 3.3 also uses the TEMP_ADJ_OUTPUT. See Section 3.3 for further details on the power normalisation. This means that alterations to this network will also result in altered power normalisation. 3.3 Temperature Level Select Input The temperature level select input TEMP_SEL_INPUT is used to input the desired temperature level as a voltage ranging from V. The various voltages are interpreted by the LED Driver Chip and used to set a target running temperature between C. The LED Driver Chip will adjust the PWM signal on the TEMP_ADJ_OUTPUT using an internal 2 nd order z- transform. This TEMP_ADJ_OUTPUT can be used to influence the output power as detailed in Section 3.3. The various voltage levels, their resulting temperature setting and some suggested resistor values that could be used to achieve the setting are presented below in Table 3. It is worth noting that the quantisation of the analogue voltage happens at every 0.1 V. It is best to aim between the quantisation levels for best results, to avoid indeterminate levels. In this instance the lower limit of the quantisation band is the selected limit. For example, 1.45 V is the suggested voltage required to select level setting 14. Application Note AN0002 Version: 1.4 Page 12 LED Mains Driver IC INDICE0101

13 Level Recommended Voltage Resulting Temperature 0.05 V 67 C 0.15 V 69 C 0.25 V 70 C 0.35 V 72 C 0.45 V 74 C 0.55 V 75 C 0.65 V 77 C 0.75 V 79 C 0.85 V 80 C 0.95 V 82 C 1.05 V 84 C 1.15 V 85 C 1.25 V 87 C 1.35 V 89 C 1.45 V 90 C 1.5 V 92 C Table 3: Various target temperaturee settings. For each setting the recommended input voltage is given and the resulting target temperature. The TEMP_SEL_INPUT voltage easiest supplied using a simple resistor voltage divider circuit, such as shown in Figure 5. Additionally it is suggested that a 1 nf capacitor be used to filter the voltage divider signal, to remove undesired noise. Figure 10: Basic resistor voltage divider network setting TEMP_SEL_INPUT to 1.43 V from the 3.3 V supply rail. This sets a target temperature of C. It should be noted that the temperature of the system is measured inside the LED Driver Chip, so it is important to ensure that there is adequate thermal coupling between the LED Driver Chip and the major heat sources in the system. Application Note AN0002 Version: 1.4 Page 13 LED Mains Driver IC INDICE0101

14 3.4 Power Normalisation Input The power normalisation input PWR_NORM_INPUT is used to monitor a conditioned version of the rectified supply voltage and use this information to adjust the LED driver power in order to normalise the output power when connected to dimmers. The values selected for RPN1 and RPN2 are large with a time constant of a few Hz. This allows the PWR_NORM_INPUT to measure the true RMS voltage of the input. Dimmers at full power generally do not provide the same RMS voltage as a direct (no dimmer) connection. The Indice IC uses this information in conjunction with the DUTY_CYCLE_DET to set the appropriate power to the LED. The LED current is adjusted by adjustment of TEMP_ADJ_OUTPUT so this circuit must be connected in order for duty cycle detect to work. The circuit presented in Figure 11 is suggested to condition the rectified supply voltage for use by the PWR_NORM_INPUT. Figure 11: Recommended filter network used for Power Normalisation Input Typical values for power normalisation circuit are: RPN1 1MEG (120V systems), 2.2 MEG (240V systems) RPN2 22k RPN3 270k CPN1 10n The power normalisation functionality can be disabled by connecting the PWR_NORM_INPUT to GND via a 100kΩ resistor. 3.5 Duty Cycle Detect The duty cycle detect DUTY_CYCLE_DET input determines whether the circuit is connected to a phase cut dimmer. If connected to a phase cut dimmer the chip uses the PWR_NORM_INPUT in conjunction with DUTY_CYCLE_DET to set the lamp power at the maximum phase angle so it results in the same LED power as a system with no dimmer. The LED current is adjusted by adjustment of TEMP_ADJ_OUTPUT so this circuit must be connected in order for duty cycle detect to work. The circuit presented in Figure 12 is suggested to condition the rectified supply voltage for use by the DUTY_CYCLE_DET. Application Note AN0002 Version: 1.4 Page 14 LED Mains Driver IC INDICE0101

15 Figure 12: Recommended implementation of duty cycle detect circuit The DUTY_CYCLE_DET functionality can be disabled by connecting the pin via a 100kΩ resistor to GND. Typical values for Duty cycle detect implementation are: RDC1 1MEG RDC2 330K CDC1 10nF Application Note AN0002 Version: 1.4 Page 15 LED Mains Driver IC INDICE0101

16 4 Driver Module Considerations This section provides some insight into other considerations that should be kept in mind when implementing designs using the Mains LED Driver Chip. To illustrate some of these considerations, please refer to the Mains voltage reference design schematic. 4.1 Evaluating Indice Driver Performance Indice recommends the reader consider the white paper White Paper on Evaluating Indice's Mains Lamps.pdf when carrying out evaluation of Indices driver solutions. This document will ensure that the lamps are connected and tested correctly and consistently. 4.2 LED Reserve Capacitor In the Indice reference design, the booster capacitance is 1mF. For the following reasons we recommend the largest possible booster capacitor you can accommodate in your product: Larger booster capacitance results in lower peak LED ripple current. This is generally preferred to increase the efficiency of the LED and also reduce lamp strobing. Larger booster capacitance reduces LED current fluctuations if the input is suffering from incoming perturbations or line flicker. Using the standard energy in a capacitor formula, shown in Equation 3, with a forward voltage of 36 V in the reference design we arrive at approximately 650 mj of energy storage. = Equation 3: Standard capacitive energy storage formula. Where E is max energy stored (J), C is capacitance (F) and V is the voltage applied to the capacitor (LED voltage). Indice recommends this 650 mj as the minimum energy storage and to use this equation transposed to specify the capacitance for a given voltage. The result is the equation for minimum booster capacitor, presented in Equation 4. > Equation 4: Calculation of reserve capacitor size Application Note AN0002 Version: 1.4 Page 16 LED Mains Driver IC INDICE0101

17 5 Appendix A Layout Guidelines 5.1 Layout overview Power electronics PCB layout requires techniques that are sometimes shared with other design domains such as high speed and RF. The key difference is power electronics contains both high speed and high current signals (from current sense resistors for example) in extremely noisy environment. Modern FETs can switch at up to 40 ns creating fast current and voltage transients. Using an estimate of where the majority of power lies in a step signal 40 ns would give a spectrum where most of the energy exists up to 12.5 MHz. Also, as I = C dv/dt in a capacitor and the 40 ns is potentially for the change of from a bus voltage of 600V or more to zero we get V/us. The ramification of this is that only a small amount of capacitance from stray capacitance or component parasitics will bleed current; causing noise on signal lines or EMC issues. High switching speeds are used to reduce magnetics sizes, but in order to swing high voltage signals fast capacitance often needs to be minimised. Sometimes this means the ground plane underneath the high speed switching device gets removed. High power outputs and even small losses in efficiency can mean a great deal of heat dissipation in components. Heat must be managed appropriately as this can result in component temperatures outside of component operating specification. Large currents need to be managed in terms of track temperature rise and barrel plating on vias. Barrel plating is typically less than the normal copper thickness and is 0.5 oz. This is only 17.5um of copper, which is low and not capable of carrying large currents from one layer to another. The strategies to mitigate the challenges in power design in this section. 5.2 Guidelines and Strategies EMC EMC standards are FCC 15 Subpart B for the US and for lighting products in Europe emissions limits are given by CISPR15. The limits in CISPR 15 and FCC are the same for conducted emissions. Indice s most common offline (120V/230VAC) implementation is a Class E resonant power supply architectures which enables switching at high frequencies (600KHz 1MHz) to reduce component size and cost. Doing so necessitates resonant topologies so that switching losses on the main MOSFET are lowered as it enables zero voltage switching. Traditional topologies such as Flyback are hard switching so the main switching MOSFET speed is lower. The Indice Class E topology maintains sinusoidal current through the resonant tank circuit which naturally reduces EMI over a traditional flyback, had switching topology. As mentioned in the introduction of this document rise times can mean the switching edge introduces harmonics up to 12.5 MHz. As EMC limits are very low, small mistakes in layout can cause failure to pass EMC limit lines. Because EMC is dependent on layout, layout changes must be reviewed by others for impacts on safety, and major changes may require re-certification of the PCB Input filtering Input filtering is usually one or more stages of differential and common mode filtering. The arrangement of a 50W panel driver is shown as an example. Application Note AN0002 Version: 1.4 Page 17 LED Mains Driver IC INDICE0101

18 Figure 13 - Two stage EMC input filter Capacitors C40 and C46 are Y rated capacitors due to safety requirements. The Y capacitors are designed so that the capacitors will fail open circuit. Safety requirements also limit the amount of capacitance here, as depending on the safety standard to which compliance is being achieved 0.5 to 0.75 ma of earth leakage current is the maximum allowable to meet the standard. These along with L10 are common mode filtering components. The capacitors need to be routed to a low RF impedance earth. C2, C4, C43 and C44 are X capacitors and along with L4 and L5 form the differential filtering component. X rated capacitors are designed so that they will not cause a fire hazard when they fail. X and Y caps is typically wound metallised polymer, which means that they are effectively a coil. To reduce coupling between capacitors (especially large X caps) capacitors are mounted perpendicular (at 90 degrees) from one another. This can give a SIGNIFICANT improvement in filter performance. X cap 1 X cap 2 Figure degree orientation of caps to improved EMC performance on a 200W high bay driver Inductor Field Coupling Consider L1 and L4 in the layout above. The components selected in this design were shielded, but if unshielded components were used there would be significant stray magnetic fields. These inductors would have to be moved apart to stop noise from one phase from coupling into the other phase. In general it is not a good idea to use unshielded inductors for this reason. Application Note AN0002 Version: 1.4 Page 18 LED Mains Driver IC INDICE0101

19 Rectifier Capacitor Placement The capacitor(s) directly after the rectifier should be kept as small as possible to limit inrush current when being driven with a dimmer source. A smaller rectifier capacitor also results in higher power factor. This capacitor performs an important EMC function so it is often required in a design. In the schematic snippet below which is an extension of Figure 13 it is clear that the capacitor forms an LC filter along with the boost inductor of a power factor correction stage. This usually follows the bridge rectifier as high power factor corrections is a general customer requirement. Figure 15 - Rectifier Capacitor Placement For this reason it is important to place the rectifier capacitor(s) as physically close to the bridge rectifier as possible Input Output Proximity Maintaining an appropriate distance between input and output is important to stop the EMC filter network from being bypassed. Below is a mistake that was not picked up in review where the mains connector was very close to the secondary output, and noise from the secondary was able to completely bypass the EMC filter. The coupling would have been common mode noise on the 0V_SEC planes coupling via capacitance between the connector pads into the mains connector. Secondary side ground plane Minimal distance between plane and connector pads. Mains connector Figure 16 - Input - Output proximity causing EMC problem Low Impedance paths between RF Earths In order to comply with EMI, sometimes it is necessary to have an input AND output common mode filter. A good example is the panel driver V1.6 board as shown below. It is not appropriate to simply have a mains earth lead connecting the secondary earth. This is not a low impedance path for high frequencies, and will reduce the effectiveness of the output common mode filter. Instead a plane must be used; even if this is the heatsink that the driver may be sitting on. The highlighted items below are earth connections. Figure 17 - Low impedance Earth connection required Application Note AN0002 Version: 1.4 Page 19 LED Mains Driver IC INDICE0101

20 Figure 18 - Inappropriate input and output earthing Minimising Loop Areas Figure 19 - Appropriate input and output earthing This is general good practice in any PCB design, but planes should be used where appropriate to minimise loop areas for signals referenced to a constant potential. This reduces the loop area that stray magnetic fields have to induce noise into. For differential signals, a good method on multi-layer PCBs is to have the return track run directly under the source track. This is also a good method for where a plane cannot be used for other reasons. An example is shown below. Layer Stack. Red traces are on top layer of board. Brown trace on 1 st layer down. Light blue is 2 nd layer down and NetC76_1 is on bottom layer Figure 20 - Diff pair loop area minimisation The example above is good apart from one regard. The net on the blue layer is directly over one of the traces in the differential pair. The capacitance between them will capacitively couple noise from the blue layer trace into the light blue layer. As the noise is not coupling evenly into both traces it is noise that the differential receiver will not remove Snubbing circuits It is possible to reduce the noise from the switching diodes by slowing down the switching speed in some instances. Whenever a snubbing circuit is used it is important to keep the trace distance between the diode and the snubbing circuit as small as possible as shown on the layout below. Application Note AN0002 Version: 1.4 Page 20 LED Mains Driver IC INDICE0101

21 Wire Loops Figure 21 - Diode Snubbing Wire loops from transformers, inductors and on input and output leads must be minimised as much as possible. Even small loops can mean the difference in passing or failing EMC. Input AC wires as small as possible once they have been cut from the outer sheath of the incoming mains cable. Output wires as short as possible, not passing near the input AC cable. If output cable needs to be long then shield and twist the wires, depending on how much noise is on the wires Signal Noise Apart from reducing noise for EMC purposes, noise reduction is critical on analog traces feedback traces required for sensing and control. Almost all Indice power converters are current mode and thus gain feedback from a current sense resistor. Because the control loop operates at high frequencies the filtering must be minimal at the receiving end of the signal. Therefore differential pairs and small signal loops by using ground planes must be used to combat the noise on signal lines. An example was already given in Figure 20 of differential pair usage for sensitive signal lines. Another example is given in a current error signal feeding into the current sense resistors on the V1.7 50W panel driver below. Care has been taken to minimise the area between this and high voltage high frequency nets also. Figure 22 - Differential Pair - 2 Also noisy or high voltage, high frequency switching lines should be physically spaced away from any low level, sensitive control signals. An example of this is given in the latest panel driver below. Application Note AN0002 Version: 1.4 Page 21 LED Mains Driver IC INDICE0101

22 Vaux Figure 23 - Capacitively couple noise mitigation The bottom blue trace (Net NetC35_1) is about 60-70V at 550 khz. The trace above it (Vaux) is a 15V supply line. The trace has been moved as far away as possible as the vias to the left would allow, to minimise coupling between the traces Safety Safety standards for LED drivers are AS/NZS for Australia and AS/NZS For the US UL and UL are applied. The main points of note for the PCB are clearances. Because safety is dependent on layout, layout changes must be reviewed by others for impacts on safety, and major changes may require re-certification of the PCB Definitions Sometimes safety standard wording can be confusing so this section is included to simplify the definitions as a means of an introduction to the concepts, but the exact definitions should always be taken from the relevant standard to which compliance is being adhered to. In safety standard there is constant reference to clearance and creepage distance and basic, functional, supplementary and reinforced insulation. Creepage is the distance over a flat surface. Clearance is distance over an air gap. In conjunction with creepage is pollution degree and CTI/PTI. CTI and PTI are Comparative Tracking Index/ Proof Tracking Index. It is a measure of how easily an arc tracks over a surface. The CTI/PTI needs to be specified on the PCB panel to the PCB fabricator as the layout will have creepage distances designed for that CTI. Pollution index is a way of allowing for different environmental conditions that a PC is operated in. Creepage distances are allowed to be smaller for less polluted environments, and materials which track less easily. IP (Ingress Protection) is sometimes used instead of pollution degree. Basic insulation is one level of insulation for safety purposes. Functional insulation is insulation between two potentials that is not for safety purposes. Supplementary insulation is insulation in addition to basic insulation and reinforced is equivalent to double the basic insulation. In some standards allowances are made for the nature of quality of the source supply. This is defined by overvoltage category. For commercial products (not industrial) this is usually overvoltage protection category II, or CAT II. This allows for a certain level of voltage spikes from the mains to which the product is connected, and thus effects creepage and clearance distances. IEC standards use this more than Australian and US standards. ELV stands for Extra Low Voltage. The definition of this changes between US and Australian standards but is generally under 30 VAC rms with no or little ripple components on a pure sinusoid. Application Note AN0002 Version: 1.4 Page 22 LED Mains Driver IC INDICE0101

23 Earth Clearance and Creepage Clearances to Earth are defined in the standards as are minimum un-torque and type of fastener used for a protective earth (Protective earth means this earth forms a safety function in contrast to an RF earth which is purely for EMC purposes). In the USA the protective earth fastener must be M3.5mm (UL1598-3, 2008; Table ) or larger. USA clearances are defined in UL8750, 2011; Table 7.6. Note that depending on how the PCB is mounted the clearance may be to a metal housing rather than a polygon pour, mechanical component or trace. On the PCB it is very important that allowance is made for the size of the screw head when pulling back polygons that are at earth potential. Creepage or clearance distance to earth is always basic insulation. Refer table 11.1 and 11.2 in AS/NZS for distances. For US refer to table 7.6 of UL The clearances apply to voltages over ELV that are not separated by basic or reinforced insulation, depending on which isolation class is being claimed by the product. For LED drivers that are in an earthed enclosure where there is protection on the LEDs and all cables from direct contact of a user, only basic insulation is required from primary and secondary of the diver. For standalone LED drivers where there is no control how the user will install the product (Eg: The user is a household person not a company required to meet Indice installation instructions for safety purposes) there must be reinforced or double insulation Input Connector The input connector must have a clearance and creepage that is specifically stated in contrast to track and component distances in the US standard. The rationale behind this hinges on the fuse. As the input fuse protects the entire PCB s components for hazards there is increased clearance specified in the standard. This distance applies to all of the items including tracks and polygons that exist from the fuse to the opposite potential items up to the input connector Magnetics Magnetics often have conductive outer casings. Due to the requirement that earthed metal have basic insulation it is important that the primary winding (or any winding if the device is an inductor and the supply is not isolated) insulation is considered the core. If there is no basic or reinforced insulation on this winding then the core is considered as the same potential as the primary winding and the creepage and clearance from the core must be per the safety standard at basic insulation level. Enamelled copper wire as typically used in magnetics is NOT considered basic insulation, even if it is double layer (For instance insulation PUR2) or the voltage insulation rating is higher than the voltages under use. There are two common ways to achieve basic insulation to the core. The first is using tape on the edges of the bobbin and between windings and core and insulation sleeves on the input and output leads. The tape is designed for high temperatures typically, and is often thin so as not to thermally insulate much. A typical material is Polyimide. The second is using a triple insulated wire as the primary winding. This is special wire which is recognised as having sufficient dielectric strength to the core as to not need any additional insulation such as tape to separate the winding potential from the core. If either of these methods are used the entire core can be considered as being at secondary potential Functional Distances between conductors of differing potentials that would not cause a safety hazard if they conducted are classed as functional. The safety standards give requirements on distances between these items Exceptions It is EXTREMELY difficult on the sort of PCBs Indice produces to use the creepage and clearances dictated by the standards. Fortunately there are exceptions. Most standards allow for functional creepage and clearance distances to be reduced if in safety testing each pair of conductors with reduced clearance are successively shorted out and the unit is assessed for safety. Safe failures would be considered as fuse opening the circuit, destructive failure or components without flame or ejection of material. Dielectric breakdown voltage is the desired outcome of any insulation system. Therefore if distances are reduced but soldermask, conformal coating or another form of insulation is used instead of the specified creepage and clearance then so long as this insulation is tested (100% however it depends on the standard) to the appropriate insulation voltage for the time indicated in the standard then the solution conforms to the standard. Note soldermask has particular requirements on it for this. Application Note AN0002 Version: 1.4 Page 23 LED Mains Driver IC INDICE0101

24 PCB Fabrication and Material Usually the layers between a PCB are considered to be sufficient insulators between voltages of differing potentials however some safety standards require certification from the fabricator to ensure quality materials and processes to ensure the insulation will have strength to meet the standards without regular production testing on the assembled, loaded PCB. Fabricators can often meet UL standards and are qualified for this and as mentioned previously the PCB material must have an appropriate CTI/PTI. As safety testing also involves thermal measurements it is important that the glass transition temperature (Tg) is specified to the fabricator and that this is used as one of the temperature limits at the safety test house Thermal PCB trace resistance and thermal heating High currents can cause significant amount of track heating. This results in losses and can cause delamination of the FR4 core material or pre-pregnate. IPC 2221 gives graphs based of experimental data to show temperature rise of a track given track width, if track is on an internal or external layer and current. It is convenient to use an online calculator however to get this information quickly. The calculator recommended is based of curve fits to the IPC 2221 graphs; The internal layers will always be hotter than the external layers because they are thermally insulated from the FR4. For this reason it is desirable to put high current tracks on external layers if possible Via Studding for heat movement to heatsink Heat conduction between layers of FR4 is very small, fiberglass is an effective insulator. The copper even on a 4 layer board at 2 oz is 35 um compared to a standard PCB thickness of 1.6mm. This means the percentage of good conductivity material is 2.1% so the copper does almost nothing to get the heat from a component on the top of the board to the bottom of the board. Most Indice designs use SMD packages of power devices to conserve PCB real estate and reduce lead inductance so an example will be considered here with a D2PAK semiconductor. With 4 layer 2 oz copper the thermal resistance to the bottom of the board is approximately (neglecting effect of copper): 1.6/(0.29*100e-3) = 55 C/. Even a small 2W of loss in a component would result of overheating in that component. A D2PAK will fit 144 thermal vias of hole size 0.4 mm and pad size 0.8mm. The copper area of this at 0.5 oz barrel plating is 144*PI()*(( )^2-0.2^2) = 3.3 mm^2. The thermal resistance of the vias from one side of the board to the other alone is 1.6/(401*3.3e-3) = 1.2 C/W. As 1.2 << 55 it is evident that almost ALL of the heat is conducted from one side of the board to the other by the copper in the barrel plating of the vias. DPAK works out to 56 vias at 0.4/0.8mm and 1.29 C/W. Application Note AN0002 Version: 1.4 Page 24 LED Mains Driver IC INDICE0101

25 Figure 24 - Via Studding in Altium Figure 25 - Illustration of heat flow through vias Invalid source specified. Note in Figure 25 that the use of internal layers to spread heat load is only appropriate when there is no heatsinking of the PCB; Eg: The PCB is in ambient such as a PCB in a consumer power supply. In the case the ONLY strategy one has in the PCB design is to use all the layers and copper area possible to get the outer layers to dissipate heat Diode junction heatsinking Just because it isn t in a DPAK or D2PAK package doesn t mean it won t get hot. Be careful of output rectifier diodes. The diodes in the panel driver shown below have quite unusual top and bottom fills and plenty of vias to dissipate the heat from the output rectifiers in an SMC package shown below in the V1.7 50W panel driver PCB. Application Note AN0002 Version: 1.4 Page 25 LED Mains Driver IC INDICE0101

26 Figure 26 - Diode heat dissipation pads on FR4 5.3 Conclusion Power electronics layouts are challenging due to special concerns of EMC, temperature, noise coupling to internal signals and safety. This document outlines strategies for addressing these challenges, outlines a few mistakes and gives some background material, especially in regards to safety. Application Note AN0002 Version: 1.4 Page 26 LED Mains Driver IC INDICE0101

27 6 Revision Control Version Date Details /05/2012 Document creation, from INDICE0101 datasheet /06/2012 First release /07/2012 Updated sections: 3.1 to include implementation of high power factor circuit 3.3 to correct resistor values used in implementation 3.5 to correct schematic implementation used in reference design and values used 3.6 to add values used in implementation /06/2015 Updated to conform to the panel driver v2.1 reference design /06/2015 Added the layout guidelines to the document /06/2015 Updated sections features, 1.1, 1.6, 3.3, 5.1, , , and Application Note AN0002 Version: 1.4 Page 27 LED Mains Driver IC INDICE0101