PRODUCT DATASHEET AAT4674

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1 General Description The - is a member of Analogic Tech s Application Specific Power Management SmartSwitch family. This device is a dual input single output power supply selector switche designed to operate from batteries, or any other power supply with an input voltage up to 6V. The - connects the supply voltage on IN to, or IN to, through a very low R DS(ON) power MOSFET that minimizes voltage drops and power dissipation. The enable (EN) and select (SEL) pin voltages control the operational state of the internal power MOSFET switches. Once enabled, the SEL pin will switch between the IN and IN inputs. If both input voltages are below the UVLO, then the AAT467- output floats. If one of the input voltages is above the UVLO threshold then that input voltage that is above the UVLO threshold is passed through to the output. The two power switches are current limited and the current limit thresholds can be programmed through the resistors on IIN and IIN pins respectively. The - is available in the thermally enhanced, space-saving Pb-free -pin TSOPJW package. The is specified for operation over the -40 C to +85 C temperature range. Features Input Voltage Supply Range:.5V to 6V High Level of Integration: Reverse Blocking Diode Current Sensing Programmable Current Limit Single Control Pin Switching Break-Before-Make Switch-Over Minimum Output Voltage Drop During Change- Over Shutdown Current < μa Thermal Protection TSOPJW- Package Applications Bluetooth Headsets Cell Phones Digital Still Cameras MP3 Players Personal Data Assistants (PDAs) Set Top Boxes Typical Application +5V IN System Load +3.3V IN IIN IIN IN/IN Select SEL R IIN R IIN Enable EN

2 Pin Descriptions Pin Number Name Type Function, IN I Power supply input. 3, 4 IN I Power supply input. 5 EN I Enable pin, active low. 6, 7 I/O Ground. 8 SEL I IN or IN select input. Logic 0 = IN Logic = IN 9 IIN I IN- switch current limit set resistor input. 0 IIN I IN- switch current limit set resistor input., O Output pin. Pin Configuration TSOPJW- (Top View) IN IN IN IN EN IIN IIN SEL

3 Absolute Maximum Ratings Symbol Description Value Units V INX [IN, IN] to -0.3 to 6.5 V V N [, EN, IIN, IIN, SEL] to -0.3 to V INX V T LEAD Maximum Soldering Temperature (at Leads) 300 C I Maximum Output Current 3 A Thermal Information Symbol Description Value Units θ JA Maximum Thermal Resistance 60 C/W P D Maximum Power Dissipation 65 mw T J Operating Junction Temperature Range -40 to 50 C. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.. Mounted on a FR4 board

4 Electrical Characteristics V INX = 5V, T A = -40 to +85 C, unless otherwise noted. Typical values are at T A = 5 C. Symbol Description Conditions Min Typ Max Units Operation V IN IN Operating Voltage Range.5 6 V V IN IN Operating Voltage Range.5 6 V V UVLO_IN IN Under-Voltage Lockout Rising edge.3 Hysteresis 0. V V UVLO_IN IN Under-Voltage Lockout Rising edge.3 Hysteresis 0. V I IN_OP IN Normal Operating Current V IN = 5V, V EN = 0 30 μa I IN_SHDN IN Shutdown Mode Current V IN = V EN = 5V, open μa I IN_SLP IN Sleep Current V IN =.5V, V IN = 5V, V EN = 5 μa I IN_OP IN Normal Operating Current V IN = 5V, V EN = 0 30 μa I IN_SHDN IN Shutdown Mode Current V IN = V EN = 5V, open μa I IN_SLP IN Sleep Current V IN = 5V, V IN =.5V, V EN = 5 μa Power Switches R DS(ON) IN IN-to- FET On-Resistance V IN = 5., T A = 5 C V IN = 3.5V, T A = 5 C Ω R DS(ON) IN IN-to- FET On-Resistance V IN = 5., T A = 5 C V IN = 3.5V, T A = 5 C Ω V DROOP_ Voltage Droop From the Lower Voltage of IN and IN, When Switching Over Between IN and IN I O() = 0.5A, C O() = 0μF 50 mv Current Regulation t SOFT_START Soft-Start Delay Delay of start from EN, or UVLO 00 μs I LIM_range IN/IN Current Limit Range 0..0 A I LIM_ACC IN/IN Current Limit Accuracy R IIN/IIN = 00kΩ 0.8. A Logic Control / Protection V IH(EN) Logic High Threshold.6 V V IL(EN) Logic Low Threshold 0.4 V T SHDN Chip Thermal Shutdown Temperature Threshold 40 Hysteresis 5 C. The is guaranteed to meet performance specifications over the -40 C to +85 C operating temperature range and is assured by design, characterization, and correlation with statistical process controls.. Additional operating current is required by the R IINx current limit setting resistors. The amount of current required by the R IINx resistors is the current limit divided by 000. Therefore I INx_OP = (0.5V/R IINx)*(00k/000) or approximately I LIM/

5 Typical Characteristics I IN Shutdown Current vs. Temperature I IN Shutdown Current vs. Temperature I IN Shutdown Current (µa) V IN = 6.5V V IN = 5V 0-0. V IN = 3.6V V IN = 4.V I IN Shutdown Current (µa) V IN = 6.5V 0. 0 V IN = 5V -0. V IN = 3.6V V IN = 4.V Temperature ( C) Temperature ( C) I IN Operation Current vs. Temperature (I = 0A) I IN Operation Current vs. Temperature (I = 0A) I IN Operation Current (µa) 0 V IN = 6.5V 8 V 6 IN = 5V 4 0 V IN = 4.V 8 V IN = 3.6V I IN Operation Current (µa) 0 8 V IN = 6.5V 6 V 4 IN = 5V 0 V IN = 4.V 8 V IN = 3.6V Temperature ( C) Temperature ( C) R DS(ON) vs. Temperature Enable Threshold vs. Input Voltage R DS(ON) (mω) V IN = 3.5V V IN =.5V V IN = 6.5V V IN = 5V Enable Threshold (V)..05 V IH(EN) V IL(EN) Temperature ( C) Input Voltage (V)

6 Typical Characteristics I IN Sleep Current vs. V IN Voltage (V IN = 6.5V) I IN Sleep Current vs. V IN Voltage (V IN = 6.5V).5.5 I IN Sleep Current (µa) C 85 C -40 C I IN Sleep Current (µa) C 85 C -40 C V IN Voltage (V) V IN Voltage (V) Current Limit vs. R IIN/IIN (V IN = 5V; V IN = 3.3V; = V IN or = V IN ) Turn-On/Off Response (R = 0Ω; V IN = 5V).5 Current Limit (A) V EN (5V/div) V I (500mA/div) 0A R IIN/IIN (kω) Time (00µs/div) 3.3V to 5V Transition Response (I = 500mA, C = 0µF) 5V to 3.3V Transition Response (I = 500mA, C = 0µF) (V/div) 3.3V 5V (V/div) 5V 3.3V V SEL V V SEL V Time (40µs/div) Time (40µs/div)

7 Typical Characteristics 3.6V to 3.6V Transition Response (I = 500mA, C = 0µF) Short Circuit Through 0.3Ω Response (V/div) 3.6V 3.6V V IN 5V I (5A/div) 0A A V SEL V (5V/div) 5V 0.6V Time (40µs/div) Time (0µs/div) Short Circuit Through 0.6Ω Response Thermal Shutdown Response (V IN = 5V) V IN 5V V EN V I (5A/div) 0A A (5V/div) 5V.V I (A/div) 0A Time (0µs/div) Time (40ms/div)

8 SmartSwitch TM Functional Block Diagram Switch IN IIN SEL Thermal and Current Sense Logic Control EN IIN IN Switch Truth Table Y = Yes, N = No, X = don t care. Input Conditions - V IN > UVLO V IN > UVLO SEL N N X Floating Y N X V IN N Y X V IN Y Y 0 V IN Y Y V IN Functional Description To power the output, both input supplies (IN and IN) must be above the UVLO threshold. If either supply input is below the UVLO threshold then the output of the - will be the input supply that is above the UVLO threshold. If both supplies are above the UVLO threshold and the device is enabled, the - will connect the supply from IN to when the SEL pin is LOW (logic 0 ), and when the SEL pin is HIGH (logic ) then the supply on IN is connected to the pin. Consult the above Truth Table for the summarized AA4674- operational details. The two internal power switches are current limited and the limiting thresholds can be programmed through the resistors on the IIN and IIN pins respectively. Applications Information Input Capacitors A μf or greater capacitor is generally recommended between IN and (C IN ), and between IN and (C IN ). An input capacitor is not required for basic operation; however, it is useful in preventing load transients from affecting up-stream circuits. Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for C IN / C IN. There is no specific capacitor equivalent series resistance (ESR) requirement for C IN /C IN. However, for higher current operation, ceramic capacitors are recommended for C IN /C IN due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as batteries in portable devices

9 Output Capacitor A μf or greater capacitor is required between and (C ). As with the input capacitor, there is no specific capacitor ESR requirement. If desired, C may be increased to accommodate any load transient condition. EN Input The - is enabled when V EN is 0.4V (logic 0 ), conversely the - is disabled when V EN is.6v (logic ). SEL Input When V SEL is 0.4V (logic 0 ) the output voltage equals power supply input ( = V IN ), and conversely when V SEL is.6v (logic ) the output voltage equals power supply input ( = V IN ). Current Limit Resistor Selection The current limits for power supply and power supply inputs are set by resistors connected between IIN/IIN and. The following equation can be used to select the appropriate resistor for a particular current limit: I CLINX = V IINX R IINX 00k I CLINX Current limit for IN and/or IN pins respectively V IINX Internally Regulated Voltage [0.5V ± 0%] on the IIN and IIN pins respectively R IINX IIN and/or IIN Resistor 00k Internal Gain Factor Design Example A particular application requires that the current limit for IN be set to A and the current limit for IN be set to 0.A. What value of resistor is required for the IIN and IIN pins respectively? For IN (power supply input): V IIN I CLIN R IIN = 00k 0.5V = A 00k = 50kΩ (49.9kΩ standard value) For IN (power supply input): V IIN I CLIN R IIN = 00k 0.5V = 0.A 00k = 500kΩ (499.9kΩ standard value) Thermal Considerations Since the - has an internal current limit and over-temperature protection (thermal shutdown), junction temperature is rarely a concern. However, if the application requires large currents in a high temperature environment, it is possible that temperature rather than current limit will be the dominant regulating condition. In these applications, the maximum current available without risk of an over-temperature condition must be calculated. The maximum internal temperature while current limit is not active can be calculated using Equation. Eq. : T J(MAX) = I MAX R DS(ON)(MAX) R θja + T A(MAX) In Equation, I MAX is the maximum current required by the load. R DS(ON)(MAX) is the maximum rated R DS(ON) of the - at high temperatures (consult the R DSON vs. Temperature performance graph in the Typical Characteristics section of this datasheet). For estimating the R DS(ON)(MAX) use the data on the R DSON vs Temperature performance graph and increase the value from the performance graph by 50%. R θja is the thermal resistance between the - and the printed circuit board (PCB) onto which it is mounted; R θja is the thermal resistance of the TSOPJW- package. T A(MAX) is the maximum ambient temperature that the PCB under the - would be if the - were not dissipating power. Equation can be rearranged to solve for I MAX, into Equation. Eq. : I MAX = T SD(MIN) - T A(MAX) R DS(ON)(MAX) R ΘJA T SD(MIN) is the minimum temperature required to activate the - over-temperature protection (thermal shutdown). With typical specification of 40 C, 5 C is a safe minimum value to use

10 For example, for a.5v input power supply application that is specified to operate in 50 C environments where the PCB operates at temperatures as high as 85 C. The application is sealed and its PCB is small, causing R θja to be approximately 60 C/W. The R DS(ON)(MAX) is estimate to be 300mΩ (from the R DS(ON) vs. Temperature performance graph, where V IN =.5V at 85 C plus 50%). To find the maximum current (I MAX ) for this application use Equation : 5 C - 85 C I MAX = 300mΩ 60 C/W = 0.93A PCB Layout Recommendations For proper thermal management, to minimize PCB trace resistance, and to take advantage of the low R DS(ON) values of the two internal power switches in the -, certain circuit board layout rules should be followed: IN, IN, and should be routed using wider than normal traces. The two IN pins ( and ) and two IN pins (3 and 4) should be connected to the same wide PCB trace; and should be connected to a ground plane. For best performance, the input capacitors (C IN / C IN ) and output capacitors (C ) should be placed as close to the package pins as possible. The - evaluation board layout follows the printed circuit board layout recommendations and can be used as an example of an optimal board layout

11 Evaluation Board Schematic C.μF C.μF J Header MAIN AUX EN R 00K U IN IN IN IN EN IIN IIN SEL PWRSEL IMAIN IAUX C3.μF R3 49.9K R 49.9K Figure : - Evaluation Board Schematic. Evaluation Board Layout Figure : - Evaluation Board Top Side Layout. Figure 3: - Evaluation Board Bottom Side Layout

12 Ordering Information Package Marking Part Number (Tape and Reel) TSOPJW- YTXYY ITP--T All AnalogicTech products are offered in Pb-free packaging. The term Pb-free means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.% by weight in homogeneous materials. For more information, please visit our website at Package Information TSOPJW-.40 ± ± BSC 0.50 BSC 0.50 BSC 0.50 BSC0.50 BSC 3.00 ± NOM 0.04 REF ± ± ± ± ± ± 0.5 All dimensions in millimeters.. XYY = assembly and date code.. Sample stock is generally held on part numbers listed in BOLD. Advanced Analogic Technologies, Inc. 330 Scott Boulevard, Santa Clara, CA Phone (408) Fax (408) Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech s terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders

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