HIGH-POWER three-phase medium-voltage (MV) applications

Transcription

1 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY Symmetrical Hybrid Multilevel DC AC Converters With Reduced Number of Insulated DC Supplies Domingo A. Ruiz-Caballero, Reynaldo M. Ramos-Astudillo, Samir Ahmad Mussa, Member, IEEE, and Marcelo Lobo Heldwein, Member, IEEE Abstract Novel symmetric hybrid multilevel topologies are introduced for both single- and three-phase medium-voltage highpower systems. The topology conception is presented in detail, where a three-level switching cell with low component count, and its modulation pattern give the origin of the proposed converters. Voltage sharing and low output-voltage distortion are achieved. The theoretical frequency spectra are derived. Switching devices are separated into high- and low-frequency devices, generating hybrid converters. Five-level three-phase topologies are generated from only three insulated dc sources, while the number of semiconductors is the same as for the cascaded H bridge. Both simulation and experimental results are provided showing the validity of the analysis. Index Terms DC AC converters, hybrid inverters, modulation, symmetrical multilevel converters. I. INTRODUCTION HIGH-POWER three-phase medium-voltage (MV) applications have been steadily growing in numbers and applications. Power electronics research in this field has been following the same trend and finding solutions in fields such as serial connection of switches, multilevel topologies, modulation techniques, cooling, and converter reliability, among others. In this context, multilevel topologies rise as consistent and widespread solutions to the problem [1], [2]. Various multilevel topologies have been proposed [3] [8] in order to improve performance, adapt to requirements, and avoid proprietary technologies. Multilevel converters have been introduced in the 1970s and 1980s [9] [11] giving impulse to high-power conversion through multilevel inverters suitable to MV applications. Such converters are able to synthesize high-quality voltage waveforms while allowing semiconductors with lower voltage ratings to be employed. However, technical and economical barriers, such as the cost of drivers and protection, the need for stabilizing dc supply voltages, circuit layout, and packaging cause the number of levels to be limited. Most applications have the number of levels given by the semiconductor voltage ratings. Manuscript received March 13, 2009; revised August 24, 2009; accepted October 20, Date of publication November 20, 2009; date of current version June 11, D. Ruiz-Caballero and R. Ramos-Astudillo are with the Department of Electrical Engineering, Pontificia Universidad Catolica de Valparaiso, Valparaiso 2241, Chile ( domingo@pucv.cl). M. L. Heldwein and S. A. Mussa are with the Power Electronics Institute (INEP), Federal University of Santa Catarina (UFSC), Florianópolis , Brazil ( heldwein@inep.ufsc.br; samir@inep.ufsc.br). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TIE Several multilevel topologies have been proposed in the literature [3] [32]. Classifying the multilevel converters according to the type of voltage synthesis leads to basically three types of converters, namely: 1) diode-clamped converters [10], [11], [25], [26]; 2) capacitor-clamped converters [4], [25], [26]; and 3) cascaded converters with insulated dc sources [3], [6], [9], [12], [15] [20], [23], [33], [34], which are further subdivided into hybrids/nonhybrids and symmetrical/asymmetrical. Hybrid converters are converters that present semiconductor switching at different frequencies. Symmetrical converters are converters with symmetric dc sources. An example of asymmetrical hybrid topology is given in [17]. The converter is based on a binary configuration being capable of synthesizing (2 N+1 1) voltage levels at the load terminals, where N is the number of insulated dc sources. The converter is built with a cascade of H-bridge converters where some of the converters switch at a lower frequency and are supplied with higher voltages. High-quality voltage waveforms result from this strategy. Another inventive approach is presented in [13], where semiconductors employing different technologies (gate turn-off (GTOs) and insulated-gate bipolar transistors) switch at different frequencies, but the lowfrequency devices still switch at frequencies higher than the fundamental. This paper presents a novel symmetrical hybrid-converter concept in its single- and three-phase versions. The topologies are based on a low switch count three-level pulsewidth modulation (PWM) switching cell connected to a low-frequency switched bridge. Thus, high modularity is achieved. Compared with an H-bridge cascaded multilevel converter, the number of overall insulated dc sources is reduced in the proposed converter, while the number of semiconductors is kept the same. Thus, the proposed concept appears as a useful and suitable solution for MV applications where input-side insulation is required along with high efficiency and modularity. Furthermore, by reducing the number of insulated dc supplies, the number of cables connecting the input transformer terminals to the rectifying bridges is reduced. This paper is organized as follows. The derivation of the five-level switching cell is presented in Section II. The singleand three-phase versions of the proposed concept, along with proper modulation strategies, are explained, respectively, in Sections III and IV. The theoretical analysis of the load voltages employing the proposed modulation is performed in Section V. Finally, experimental results are presented, and conclusions are given /$ IEEE

2 2308 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010 Fig. 1. Three-level buck-type dc dc converter (a) topology [21] and (b) modulation signals and voltage v xy. Fig. 3. (a) Proposed single-phase five-level symmetrical hybrid dc ac converter and (b) its possible load-voltage v AN levels according to the switched semiconductors. III. SINGLE-PHASE SYMMETRICAL HYBRID MULTILEVEL CONVERTER Fig. 2. (a) Three-level buck-type dc dc converter switching cell as a basis for the derivation of a (b) bidirectional three-level dc dc switching cell and an example of an achievable (c) three-level load voltage v xy. II. BIDIRECTIONAL MULTILEVEL CELL DERIVATION Fig. 1(a) shows the three-level buck-type dc dc converter [21] which is able to generate three voltage levels at the terminals of the output filter. The voltage v xy is illustrated in Fig. 1(b) for the given modulation pattern. In addition to the discussed characteristics, the converter is able to generate a voltage v xy with double that of the switching frequency and, thus, reduce filter passive components L o and C o. This converter employs semiconductors rated for half of the dc-link voltage and, with a proper modulation strategy, allows the balancing of the dclink voltages by symmetrically charging and discharging the dc-link capacitors. This converter is the basis for the proposed multilevel converter as seen in the following. The switching cell of the three-level buck-type dc dc converter shown is redrawn in Fig. 2(a). It is seen that this cell is only able to process unidirectional load currents. In order to provide bidirectional current capability, switches S 1 and S 4 must employ antiparallel diodes D 2 and D 3 and antiparallel switches. With this, the converter shown in Fig. 2(b) is able to handle bidirectional load currents, and a positive three-level load voltage v xy [cf. Fig. 2(c)] can be generated. Considering the three-level switching cell shown in Fig. 2(b), it is possible to turn it into a dc ac converter by properly switching the connection of the load terminals. This can be implemented with the configuration shown in Fig. 3(a), where switches S 5 to S 8 are connected as a full-bridge inverter that is responsible for switching the load terminals according to the gate signals. Fig. 3(b) shows the possible load voltage v AN levels for the specified switching conditions. It is seen that the pairs S 5 /S 8 and S 6 /S 7 are turned on complementarily in order to generate, respectively, negative and positive voltages. The three-level dc dc converter switches S 1 to S 4 are switched according to a proper modulation pattern in order to generate a desired load voltage. Therefore, the converter shown in Fig. 3(a) is a five-level single-phase inverter where switches S 1 to S 4 operate at high frequency and are rated for half of the dc-link voltage E. Switches S 5 to S 8 are rated for the full dc-link voltage 2E. On the other hand, switches S 5 to S 8 can be implemented with low-frequency devices such as GTOs, integrated gatecommutated thyristors, and others, since they switch a single time per load-voltage period under zero voltage. Based on this strategy, the proposed converter is a symmetric (equal dc sources) hybrid (multiple carrier frequencies) multilevel converter. Furthermore, the number of levels can be increased by cascading multiple single-phase converters. This can be achieved with other topologies as well. As shown in [14] and [24], the total number of level across the load terminals N AB for the proposed topology is given by N AB =2N +1 (1) where N is the total number of dc sources.

3 RUIZ-CABALLERO et al.: HYBRID MULTILEVEL DC AC CONVERTERS WITH REDUCED NUMBER OF DC SUPPLIES 2309 TABLE I SWITCHING STATES AND RESPECTIVE VOLTAGE LEVELS PER CONVERTER LEG Fig. 4. Modulation strategy. (a) Carriers and modulating signal. (b) Gate pulses. (c) Modulation logic. A. Single-Phase Modulation Strategy The high-frequency switches S 1 to S 4 are driven by PWM signals obtained through sinusoidal unipolar PWM (S-PWM), where the gate signals are generated by the comparison of the modulating signal v M with triangular carriers v t1 and v t2, displaced 180 from each other, as shown in Fig. 4(a). The gate signals for the low-frequency switches S 5 to S 8 are obtained from the direct comparison of the modulating signal v M with zero. As an example, the gate pulses are shown in Fig. 4(b), and the PMW generation logic is shown in Fig. 4(c). With this modulation scheme, the first observed harmonic at the load terminals appears at twice the switching frequency. IV. THREE-PHASE SYMMETRICAL HYBRID MULTILEVEL CONVERTER The three-phase version of the proposed converter is formed by connecting the single-phase modules in a Y -configuration supplying a three-phase load through terminals A, B, and C, as shown in the three-phase symmetric hybrid five-level converter of Fig. 6(a). It is observed that two common terminals exist, one N for the load that is Y connected in the drawing and another O that connects the three inverter legs and serves as a reference for the modulation scheme. The converter presents the same number of semiconductors as a symmetric cascaded H-bridge five-level converter while reducing the minimum required number of insulated dc sources from six to three. For the hybrid topology, the power processed in the three insulated supplies is larger, and two balanced series-connected sources are necessary for each dc supply. Five voltage levels can be generated per converter leg, namely, 2E, E, zero, +E, and +2E, as seen in Table I. Thus, as for a cascaded H-bridge, 125 space vectors (cf. Fig. 5) can be generated by the three-phase system. Furthermore, as the voltage levels E, zero, and +E can be generated with different switching states, extra redundancy is achieved, and a total of 343 vectors are available. The achievable redundancy is important for optimizing modulation schemes and can be Fig. 5. Space-vector diagram for the proposed three-phase symmetrical hybrid five-level dc ac converter. Voltage levels 2E, E, zero, +E,and+2E are, respectively, represented by 2, 1, 0, 1, and 2. employed in order to balance the dc-link voltages if the dc sources are not separately regulated. Different solutions are foreseen to produce the necessary insulated dc sources from a three-phase MV distribution grid. Bidirectional-rectifier approaches such as the ones discussed in [20] and [35] can be employed. However, bidirectional solutions typically present higher costs and are not employed in commercial products at this moment [36]. In this context, unidirectional front ends arise as economical attractive solutions, and three alternatives are shown in Fig. 6. The first solution [cf. Fig. 6(b)] presents an insulation transformer where all secondaries are constructed with voltages in phase and, thus, lead to a six-pulse-type rectifier where the input current total harmonic distortions (THDs) typically range from 18% to 40%. Therefore, the six-pulse solution is typically not able to meet grid regulations such as the IEEE-519, the ER G5/4, or the IEC series. Fig. 6(c) shows a unidirectional rectifier that is able to generate three insulated supplies with a transformer with secondaries displaced by ±20.This leads to an 18-pulse rectifier where the harmonic distortion is much lower than the first alternative. Circuit simulations

4 2310 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010 Fig. 6. Proposed (a) three-phase symmetrical hybrid five-level dc ac converter and three different unidirectional front-end possibilities; (b) 6-pulse uncontrolled rectifier; (c) 18-pulse uncontrolled rectifier with secondaries displaced by ±20 ; and (d) 36-pulse uncontrolled rectifier with secondaries displaced by ±10. of the complete multilevel converter employing the 18-pulse rectifier [cf. Fig. 6(c)], output-voltage ripple of ΔV o 4%, input voltages presenting unbalances of ±3%, input inductors L in,p.u. = 5%, and leakage inductances of around Lσ,p.u. = 0.2% show that the input current THD approaches 10.5%, and the highest single harmonic is typically the fifth, with 9.9% of the fundamental. Thus, compliance with international grid codes depends on the relation between short-circuit currents and the rated converter current or on the inclusion of tuned and/or active filters. Both 6-pulse and 18-pulse front ends do not guarantee the balance of the partial dc voltage. Thus, if these schemes are applied, sensoring and active control through the converter s modulation should be implemented. A 36-pulse unidirectional passive rectifier is shown in Fig. 6(d), where the secondaries of the insulation transformer are displaced by 10. Every two secondaries are connected in series after the diode bridges so that the balance of the partial dc-supply voltages is guaranteed. Furthermore, simulations of this system [cf. Fig. 6(d)] supplying the multilevel converter and employing the same parameters as with the 18-pulse simulations lead to input current THDs of around 3.71% and a higher single harmonic with 1.62% of the fundamental at the third harmonic. Based on the simulation results, the 36-pulse solution is able to meet the most stringent grid codes for MV networks. A. Three-Phase Modulation Strategy The modulation strategy is based on the single-phase modulation strategy (cf. Section III-A) and employs three sinusoidal modulating signals v Mj, with j = A, B, C, displaced 120 from each other, which are compared with two triangular carriers v t1 and v t2 with a displacement of 180. TABLE II SPECIFICATIONS FOR THE NUMERICAL SIMULATION OF THE SINGLE-PHASE FIVE-LEVEL CONVERTER B. Three-Phase Simulation Results This section presents the simulation results from the threephase five-level converter. The simulation specifications are given in Table II. Fig. 7 shows the load voltages obtained in the simulation. The five-level phase voltage v AO is seen in Fig. 7(a), while the line voltage v AB presents nine levels [cf. Fig. 7(b)]. The first-harmonic component for the three-phase version continues appearing at twice the switching frequency. The phase voltage v AN at the load presents fifteen levels for this modulation index even though the five-level converter enables seventeen voltage levels. V. S PECTRAL ANALYSIS OF THE OUTPUT VOLTAGES In order to analytically define the output-voltage spectra and associated THD values, this section shows the derivation of the expressions for the three-phase converters.

5 RUIZ-CABALLERO et al.: HYBRID MULTILEVEL DC AC CONVERTERS WITH REDUCED NUMBER OF DC SUPPLIES 2311 TABLE III OUTPUT-VOLTAGE HARMONIC COMPONENTS AND FREQUENCIES Fig. 7. Simulated output voltages: (a) Phase-voltage v AO waveform. (b) Frequency spectrum of the phase voltage. (c) Line-voltage v AB waveform. (d) Spectrum of the line voltage. A. Three-Phase Output-Voltage Analysis The phase voltage v AO for the three-phase converter is defined as v AO (t) =2EMsin(ω 1 t)+ n=2 v=1 4E nπ J v(nπm) [sin(vω 1 t + nω s t)+sin(vω 1 t nω s t)] (2) where n =2, 4, 6,..., v =1, 3, 5,..., ω 1 =2πf o, ω s =2πf s, and J v ( ) is the Bessel function of the fifth order. The output line-to-line voltage for the five-level converter employing the proposed modulation strategy is given by v AB (t) =2 ( 3EMsin ω 1 t π ) 6 + n=2 v=1 4E nπ J v(nπm) [N P sin(vω 1 t + nω s t + α P ) + N N sin(vω 1 t nω s t + α N )] (3) with n =2, 4, 6,..., v =1, 3, 5,..., γ =2π/3, and N P = 2 {1 cos [γ(v + n)]} (4) N N = 2 {1 cos [γ(v n)]} (5) Fig. 8. Variation of the peak value of the harmonic components of the (a) phase voltage and (b) output line-to-line voltage in dependence of the modulation index. { [ γ ]} α P = tan 1 cot 2 (v + n) (6) { [ γ ]} α N = tan 1 cot 2 (v n). (7) The peak value of the harmonic components of the output voltage and their respective frequencies are expressed in Table III and shown in Fig. 8, in dependence of the modulation index M. Both phase- [cf. Fig. 8(a)] and line- [cf. Fig. 8(b)]voltage components are given. The harmonic components are obtained from the variation of h = nm f ± v. Plotting (2) and (3) leads to the waveforms shown in Fig. 9 for a modulation index M =0.94. From the analysis of the output voltages, it is observed that both phase and line voltages present harmonic components at the same frequencies. However, the amplitude and phase of these harmonics have distinct values. Unlike the single-phase converter load voltage, the three-phase version presents sidebands that are not symmetric with respect to the center frequency. Thus, two amplitude functions A ph/lin,n,v and B ph/lin,n,v are required to properly define the sideband amplitudes.

6 2312 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010 Fig. 9. Voltages obtained from (2) and (3) normalized with respect to half of the dc-link voltage E for M =0.94. Fig. 11. Experimental waveforms: input dc voltage 2E, phase voltage v AO, load phase-voltage fundamental component v AN,(1), and phase current i A. Fig. 10. Implemented three-phase symmetrical hybrid five-level converter prototype. Fig. 12. Voltages across the switches S A1, S A3, S A5,andS A7. B. Experimental Results A low-power three-phase prototype of the proposed converter (cf. Fig. 10) has been built in order to validate the theoretical analysis. The input dc voltage is set to E = 100 V, while the output power is 400 W. The load fundamental frequency is f o =50Hz and the switching frequency f s = 1500 Hz. An output filter with parameters L o =8mH and C o =8μF per phase has been placed at the terminals of the Y -connected load. The input insulated dc sources have been generated from a 220-V/60-Hz-fed three-phase transformer supplying three insulated secondaries connected to single-phase rectifiers and smoothing capacitors. The modulation strategy based on the S-PWM described in Section IV-A is adopted. The practical implementation of the modulation algorithm is performed in a DSP, model TMS320F2812, where the gate signals are generated in an open-loop scheme. The modulation employs the DSP s event manager (EVA and EVB) and a few I/O pins. The highfrequency PWM pulses are produced by the DSP s PWM modules, while the low-frequency signals are software generated by comparing the modulating signals to zero. The sinusoidal references are computed internally through a routine that calculates 50-Hz rectified sinusoidal signals. A zero-crossing detector is virtually implemented in order to compare the polarity of the sinusoidal references. Fig. 11 shows the acquired waveforms for the three-phase converter prototype. It is observed that the phase-voltage v AO precisely follows the theoretical waveform while presenting a high-quality sinusoidal fundamental component v AN,(1) at 50 Hz. The load phase current i A, which is filtered, follows the fundamental voltage shape. The dc voltage across one of the inputs shows the expected 120-Hz ripple and presents a mean value around 2E = 200 V. The voltages across the switches can be observed in Fig. 12, where the high-frequency switches S A1 and S A3 present a maximum voltage around half the value of the dc source (V SA1,max = VA3,max = 100 V). It is observed that the lowfrequency switches withstand the full dc-link voltage ( = 200 V) and conduct a single time per fundamental period. The phase and line voltages are shown in Fig. 13(a), from where the frequency spectra is computed and shown in Fig. 13(b). A comparison of the experimentally obtained spectra and the theoretical ones shows good agreement and, thus, validates the performed analysis. In order to illustrate the threephase operation of the built system, Fig. 14 shows the three output line-to-line voltages V AB, V BC, and V CA. The nine levels

7 RUIZ-CABALLERO et al.: HYBRID MULTILEVEL DC AC CONVERTERS WITH REDUCED NUMBER OF DC SUPPLIES 2313 symmetric cascaded H-bridge converters or to the asymmetric hybrid topologies. From the achieved results and analysis, it is observed that the system is able to supply high-quality alternating voltages to a three-phase system. This is achieved with a modulation strategy based on the S-PWM patterns. With this, the lowfrequency switches withstand the full dc-link voltage, while the fast-switching semiconductors block only half of it. The single-phase system presents five levels at the load voltage, while the three-phase one allows fifteen levels at the phase voltages and nine levels at the line voltages, both with low-harmonic distortion. Based on the theoretical computation of the output voltages, it is observed that the high-frequency spectral components are displaced to the even multiples of the high-frequency carriers, meaning that the first harmonic to be filtered lies on double that of the switching frequency. This characteristic has been validated through experimental results. Fig. 13. Experimental voltage (a) waveforms V AO and V AB, and (b) frequency spectra for V AO and V AB. Fig. 14. Three-phase system line-to-line voltages V AB, V BC,andV CA. are clearly seen at the line voltages, and the overall system is able to deliver high-quality voltages to a three-phase load. VI. CONCLUSION A novel symmetrical hybrid multilevel dc ac converter based on a three-level switching cell has been proposed along with suitable modulation strategies for single- and three-phase systems. Both single- and three-phase systems are characterized by high- and low-frequency switches, which do not require clamping diodes nor capacitors. The switching cells are fed by insulated dc supplies of equal value. The five-level version of the converter has been thoroughly analyzed. It presents only three insulated supplies and appears as an alternative to REFERENCES [1] L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, The age of multilevel converters arrives, IEEE Ind. Electron. Mag., vol. 2, no. 2, pp , Jun [2] E. P. Wiechmann, P. Aqueveque, R. Burgos, and J. Rodriguez, On the efficiency of voltage source and current source inverters for highpower drives, IEEE Trans. Ind. Electron., vol. 55, no. 4, pp , Apr [3] B.-S. Suh, G. Sinha, M. D. Manjrekar, and T. A. Lipo, Multilevel power conversion An overview of topologies and modulation strategies, in Proc. Int. Conf. Optim. Elect. Electron. Equipment, 1998, vol. 2, pp. AD 11 AD 24. [4] T. A. Meynard, H. Foch, F. Forest, C. Turpin, F. Richardeau, L. Delmas, G. Gateau, and E. Lefeuvre, Multicell converters: Derived topologies, IEEE Trans. Ind. Electron., vol. 49, no. 5, pp , Oct [5] J. Rodriguez, J.-S. Lai, and F. Z. Peng, Multilevel inverters: A survey of topologies, controls, and applications, IEEE Trans. Ind. Electron., vol. 49, no. 4, pp , Aug [6] S. Mariethoz and A. Rufer, New configurations for the three-phase asymmetrical multilevel inverter, in Conf. Rec. IEEE IAS Annu. Meeting, 2004, vol. 2, pp [7] S. Lu and K. Corzine, Multilevel multi-phase propulsion drives, in Proc. IEEE Electr. Ship Technol. Symp., 2005, pp [8] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, Multilevel voltage-source-converter topologies for industrial medium-voltage drives, IEEE Trans. Ind. Electron., vol. 54, no. 6, pp , Dec [9] R. H. Baker and L. H. Bannister, Electric power converter, U.S. Patent , Feb. 18, [10] R. H. Baker, Bridge converter circuit, U.S. Patent , May 26, [11] A. Nabae, I. Takahashi, and H. Akagi, A new neutral-point-clamped PWM inverter, IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp , Sep./Oct [12] M. Marchesoni, M. Mazzucchelli, and S. Tenconi, A nonconventional power converter for plasma stabilization, IEEE Trans. Power Electron., vol. 5, no. 2, pp , Apr [13] R. Rojas, T. Onishi, and T. Suzuki, Simple structure and control method for a neutral-point-clamped PWM inverter, in Proc. Power Convers. Conf., Yokohama, Japan, 1993, pp [14] J. Lai and F. Peng, Multilevel converters A new breed of power converters, IEEE Trans. Ind. Appl., vol. 32, no. 3, pp , May/Jun [15] F. Peng and J. S. Lai, Multilevel cascade voltage source inverter with separate DC sources, U.S. Patent , Jun. 24, [16] T. A. Lipo and M. D. Manjrekar, Hybrid topology for multilevel power conversion, Patent W.O. 99/41 828, Aug. 19, [17] M. D. Manjrekar, P. K. Steimer, and T. A. Lipo, Hybrid multilevel power conversion system: A competitive solution for high-power applications, IEEE Trans. Ind. Appl., vol. 36, no. 3, pp , May/Jun [18] P. W. Hammond, Medium voltage PWM drive and method, U.S. Patent , Apr. 29, 1997.

8 2314 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 7, JULY 2010 [19] M. F. Aiello, J. M. MatesaJr., and P. W. Hammond, Multiphase power converter, U.S. Patent , Jan. 11, [20] M. F. Aiello, P. W. Hammond, and M. Rastogi, Modular multilevel adjustable supply with series-connected active inputs, U.S. Patent , May 22, [21] X. Ruan, B. Li, and Q. Chen, Three-level converters A new approach for high voltage and high power DC to DC conversion, in Proc. Power Electron. Spec. Conf., 2002, vol. 2, pp [22] L. M. Tolbert, F. Z. Peng, T. Cunnyngham, and J. N. Chiasson, Charge balance control schemes for cascade multilevel converter in hybrid electric vehicles, IEEE Trans. Ind. Electron., vol. 49, no. 5, pp , Oct [23] K. A. Corzine, Cascaded multi-level H-bridge drive, U.S. Patent , Feb. 24, [24] F. Z. Peng, A generalized multilevel inverter topology with selfvoltage balancing, IEEE Trans. Ind. Appl., vol. 37, no. 2, pp , Mar./Apr [25] P. Steimer, P. Barbosa, and L. Meysenc, Converter circuit for switching a number of switching voltage levels, Patent W.O. 2006/ A1, May 26, [26] P. Barbosa, J. Steinke, L. Meysenc, and T. Meynard, Converter circuit for switching a large number of switching voltage levels, U.S. Patent , Nov. 6, [27] J. Dixon, A. A. Breton, F. E. Rios, J. Rodriguez, J. Pontt, and M. A. Perez, High-power machine drive, using nonredundant 27-level inverters and active front end rectifiers, IEEE Trans. Power Electron., vol. 22, no. 6, pp , Nov [28] J. Wen and K. M. Smedley, Synthesis of multilevel converters based on single- and/or three-phase converter building blocks, IEEE Trans. Power Electron., vol. 23, no. 3, pp , May [29] J. Wen and K. M. Smedley, Hexagram inverter for medium-voltage six-phase variable-speed drives, IEEE Trans. Ind. Electron., vol. 55, no. 6, pp , Jun [30] C. H. Ng, M. A. Parker, L. Ran, P. J. Tavner, J. R. Bumby, and E. Spooner, A multilevel modular converter for a large, light weight wind turbine generator, IEEE Trans. Power Electron., vol. 23, no. 3, pp , May [31] S. Daher, J. Schmid, and F. L. M. Antunes, Multilevel inverter topologies for stand-alone PV systems, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp , Jul [32] P. Lezana, J. Rodriguez, and D. A. Oyarzun, Cascaded multilevel inverter with regeneration capability and reduced number of switches, IEEE Trans. Ind. Electron., vol. 55, no. 3, pp , Mar [33] P. K. Steimer and M. D. Manjrekar, Practical medium voltage converter topologies for high power applications, in Conf. Rec. IEEE IAS Annu. Meeting, 2001, vol. 3, pp [34] O. M. Mueller and J. N. Park, Quasi-linear IGBT inverter topologies, in Proc. Appl. Power Electron. Conf. Expo., 1994, vol. 1, pp [35] J. Rodriguez, L. Moran, J. Pontt, J. L. Hernandez, L. Silva, C. Silva, and P. Lezana, High-voltage multilevel converter with regeneration capability, IEEE Trans. Ind. Electron., vol. 49, no. 4, pp , Aug [36] B. Wu and P. Song, Current status of multi-megawatt AC drives, in Proc. IEEE ICIT, 2004, vol. 1, pp Domingo A. Ruiz-Caballero was born in Santiago, Chile, in He received the B.S. degree in electrical engineering from Pontificia Universidad Catolica de Valparaiso, Valparaiso, Chile, in 1989, and the M.Eng. and Dr.Eng. degrees from Power Electronics Institute (INEP), Federal University of Santa Catarina, Florianópolis, Brazil, in 1992 and 1999, respectively. Since 2000, he has been with the Department of Electrical Engineering, Pontifical Catholic University of Valparaiso, where he is currently an Associate Professor. His fields of interest include high-frequency switching converters, power quality, multilevel inverters, and soft-switching techniques. Dr. Ruiz-Caballero is currently a member of the Brazilian Power Electronics Society (SOBRAEP). Reynaldo M. Ramos-Astudillo was born in Taltal, Chile, in He received the B.S. degree in electrical engineering and the M.Eng. degree from Pontificia Universidad Catolica de Valparaiso, Valparaiso, Chile, in 2003 and 2009, respectively. Since 2003, he has been with the Department of Electrical Engineering, Pontifical Catholic University of Valparaiso. His fields of interest include high-frequency switching converters, power quality, multilevel inverters, and soft-switching techniques. Samir Ahmad Mussa (M 06) was born in Jaguari-RS, Brazil, in He received the B.S. degree in electrical engineering from the Federal University of Santa Maria, Santa Maria, Brazil, in 1988, and a second degree in mathematics/physics. He received the M.Eng. and Ph.D. degrees in electrical engineering from the Federal University of Santa Catarina (UFSC), Florianópolis, Brazil, in 1994 and 2003, respectively. He is currently an Adjunct Professor with the Power Electronics Institute (INEP-UFSC), Florianópolis. His research interests include digital control applied to power electronics, power-factor-correction techniques and DSP/FPGA applications. Dr. Mussa is currently a member of the Brazilian Power Electronics Society (SOBRAEP). Marcelo Lobo Heldwein (S 99 M 08) received the B.S. and M.S. degrees in electrical engineering from the Federal University of Santa Catarina, Florianópolis, Brazil, in 1997 and 1999, respectively, and the Dr. Sc. degree from the Swiss Federal Institute of Technology (ETH), Zurich, Switzerland, in From 1999 to 2001, he was a Research Assistant with the Power Electronics Institute, Federal University of Santa Catarina, where he worked as a Postdocoral Fellow from 2008 to From 2001 to 2003, he was an Electrical Design Engineer with Emerson Energy Systems, in Brazil and in Sweden. He is currently an Adjunct Professor at the Electrical Engineering Department, Federal University of Santa Catarina. His research interests include power factor correction techniques, static power converters and electromagnetic compatibility. Dr. Heldwein is currently a member of the Brazilian Power Electronics Society (SOBRAEP).