ECEN 613. Rectifier & Inverter Circuits

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1 Module-10a Rectifier & Inverter Circuits Professor: Textbook: Dr. P. Enjeti with Michael T. Daniel Rm. 024, WEB Power Electronics Converters, Applications & Design (Third edition), by: Ned Mohan et al., John Wiley COURSE WEBPAGE: 1

2 DC-AC Inverters Single Phase - Half-bridge Inverter - Full-bridge Inverter - Dual output voltage configuration - Output filter design Three Phase Inverter - Dead-time effect PWM Techniques - Sinusoidal PWM - Selective harmonic elimination (SHE) -Space vector PWM 2

3 Multilevel Inverters 3-level half-bridge Reference: L. Helle, S.M. Nielsen, P. Enjeti, Generalized discontinuous dc-link balancing modulation strategy for 3-level inverters, IEEE PCC 2002, pp

4 4

5 Multilevel Inverters - NPC 3-level half-bridge neutral point clamped (NPC) Gating signals Output voltage waveforms Reference: A. Nabae, I. Takahashi, H. Akagi, A new neutral-point clamped PWM inverter, IEEE Transactions on Industry Applications, Sep/Oct 1981, pp

6 Multilevel Inverters DC-Link capacitor voltage balancing issues - analysis To reduce neutral-point voltage deviation, the dwell time of a given small vector can be equally distributed between the P-type and N-type switching states over a sampling period. 6

7 Space Vector PWM for NPC Each inverter leg has 3 switching states which results is 27 voltage vectors. No power is delivered to the load for switching states 111, 000 and and are referred to as zero voltage vectors. A total of 6 states exists that result is in identical output voltage vectors. Such as 110 and Therefore there are 18 effective voltage vectors and 1 zero vector. The non zero voltage vectors can have three phase voltage levels which are: LV, MV, SV 7

8 Multilevel Inverters Reference: D.M. Lee, J.W Jung, S.S. Kwak, Simple space vector PWM scheme for 3-level NPC inverters including the overmodulation region, Journal of power electronics, Sep 2011, pp

9 9

10 Multilevel Inverters : 5-level V an For a m-level inverter we have: Number of switches = 2(m-1) Number of dc-link capacitors = (m-1) Number of clamped diodes = 2(m-2) Voltage across each dc-link capacitor = 10

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12 Multilevel Inverters - ABB 12

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15 Multilevel Inverter based on the H-Bridge Inverters 1-phase topology Output phase voltage waveform of a 11-level cascaded inverter with 5 separate dc sources Note: Each cell delivers different power

16 Multilevel PWM Generation with 1-phase Inverter Cells (H-bridge) Inv. 1a a 1 o a1 a 1 ' Inv. 2a a 2 o a2 a 2 ' Inv. 3a a 3 o a3 a 3 ' Inv. 4a a 4 o a4 a 4 ' A

17 Multilevel PWM Generation with 1-phase Inverter Cells Inv. 1a a 1 o a1 a 1 ' Inv. 2a a 2 o a2 a 2 ' Inv. 3a a 3 o a3 a 3 ' Inv. 4a a 4 o a4 a 4 ' A

18 Medium Voltage Adjustable Speed AC Motor Drive: ASI-Robicon Perfect Harmony for simplicity o Inv. 1a Inv. 1b Inv. 1c a 1 b 1 c 1 n a1 o a1 a 1 ' b 1 ' c 1 ' +7.5 o Inv. 2a Inv. 2b Inv. 2c a 2 b 2 c 2 n a2 o a2 a 2 ' b 2 ' c 2 ' a i a Inv. 3a Inv. 3b Inv. 3c b i b -7.5 o a 3 b 3 c 3 c i c n a3 o a3 a 3 ' b 3 ' c 3 ' o Inv. 4a Inv. 4b Inv. 4c a 4 b 4 c 4 o a4 n a4 a 4 ' b 4 ' c 4 ' Input current and output voltage is of high quality Complicated multi-winding 60Hz input transformer Single phase inverter dc-link capacitor size is large Modular in construction & employs low voltage devices A B C M 18

19 Toshiba MV Drive Circuit Topology Mixed level hybrid unit configuration using H-bridge NPC cascaded converter cell to increase voltage levels 19

20 Toshiba MV Drive 20

21 Hybrid Multilevel Inverter based on the H-Bridge Inverters Reference: M. Manjrekar, P. Steimer, T. Lipo, Hybrid multilevel power conversion system: a compatetive solution for high-power applications, IEEE Transactions on Industry Applications, May/June 2000, pp

22 Hybrid Multilevel Inverter based on the H-Bridge Inverters

23 Hybrid Multilevel Inverter based on the H-Bridge Inverters

24 Multilevel Inverters - Flying Capacitor Note: S 1 S 2 and S 2 S 1 are gated complimentary V an = E, S 1 S 2 on V an = -E, S 1 S 2 on V an = 0, S 2 S 2 on V an = 0, S 1 S 1 on 24

25 Multilevel Inverters - Flying Capacitor 25

26 26

27 A Generalized Multilevel Inverter Topology

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Multilevel Inverters (Copyrighted Material) Prasad Enjeti, Ph.D.

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