Research Article Improved Parallel Boost Power Converter for Power Factor Correction

Transcription

1 Research Journal o Applied Sciences, Engineering and Technology 7(23): , 204 DOI:0.9026/rjaset ISSN: ; e-issn: Maxwell Scientiic Publication Corp. Submitted: January 3, 204 Accepted: March 24, 204 Published: June 20, 204 Research Article Improved Parallel Boost Power Converter or Power Factor Correction T. Ajith Bosco Raj and R. Ramesh Department o Electrical and Electronics Engineering, Anna University, Chennai, India Abstract: The main objective o the study is to analysis and design parallel boost power converter or power actor correction using an active iltering approach by implementing single-phase sot-switching technique with an active snubber circuit. Zero voltage transition to turn ON and zero current transition to turn OFF is implemented by the active snubber circuit or the main switches with no any urther current or voltage strains. By zero-current switching without the need o added voltage stress, auxiliary switch is turned ON and OFF. The proposed converter has simple structure, low cost and ease o control. The eiciency, which is about 96% in hard switching, will increases to about 98% in the proposed sot-switching parallel boost converter. Keywords: Boost converter, Power Factor Correction (PFC), rectiier, Sot-Switching (SS), Zero-Current Switching (ZCS), Zero-Current Transition (ZCT), Zero-oltage Switching (ZS), Zero-oltage Transition (ZT) INTRODUCTION The boost converter topology is continuously used in various ac-dc and dc-ac applications (Silva Ortigoza et al., 202). Isolated ac/dc converters are requently employed in service interaced systems such as power supplies in telecommunication and data centers, plug-in hybrid electrical vehicles and battery operated electric vehicles (Jordi et al., 202). A low-cost and stout ac to dc converter consisting o a line requency diode bridge rectiier with a large output ilter capacitor requires a harmonic aluent ac line current. As a consequence, the input power actor is derived (Ortiz et al., 202). Nowadays, designers provide all the electronic devices to meet the harmonic content requirements. acdc converters have drawbacks o poor power quality in terms o injected current harmonics, which cause voltage distortion and poor power actor at input ac mains and slow varying ripples at dc output load, low eiciency and large size o ac and dc ilters (Singh et al., 2003) These converters are required to operate with high switching requencies due to demands or small converter size and high power density. High switching requency operation, however, results in higher switching losses, increased Electromagnetic Intererence (EMI) and reduced converter eiciency (Wannian and Moschopoulos, 2006). Sot switching technique is more suitable or IGBT applications, when compared with power MOSFET s, which presents much higher conduction losses than IGBT s. On the other hand, IGBT s are relatively slow in switching speed, so the switching losses and the high requency o operation are two well-known problems (Yungtaek and Milan, 2002; Rangan et al., 989; Wang et al., 994). There has been an increasing interest in the sot-switching power conversion technologies in order to overcome the limitations o the hard-switching technologies Sot-switching techniques have been proposed or power converters since 970s (ai et al., 996; McMurray, 993; Rogayeh et al., 20; Deepakraj, 989). Switching requency should be increased by decreasing switching losses to achieve higher power density and aster transient response in well known Pulse Wih Modulated (PWM) dc-dc converters (Ned Mohan et al., 2003). This aim can be realized by using sot switching techniques instead o hard switching techniques. Sot switching techniques are implemented by snubber cells and basically provide Zero oltage Switching (ZS) or Zero Current Switching (ZCS) or semiconductor devices in these converters (Bodur and Faruk, 2002, 2004; Yu et al., 2002; Bodur et al., 2003). Sot-switching technique improves perormance o the high-power-actor boost rectiier by reducing switching losses. The losses are reduced by an active snubber circuit, which consist o an inductor, a capacitor, a rectiier and an auxiliary switch. Since the auxiliary switch is turn s OFF and ON with zero current, this technique is well suited or the implementation o switch insulated-gate bipolar transistors. The reverse-recovery-related losses o the rectiier are also reduced by the snubber inductor which is connected in series with the boost switch and the boost rectiier (Yungtaek and Milan, 2002). Active Corresponding Author: T. Ajith Bosco Raj, Department o Electrical and Electronics Engineering, Anna University, Chennai, India This work is licensed under a Creative Commons Attribution 4.0 International icense (UR:

2 Power-Factor-Correction (PFC) technique, using a boost converter, has been successully implemented to improve the power actor and reduce input current distortion in single-phase line current rectiication. A near unity power actor and very low harmonic distortion along with good output voltage regulation can be achieved (Salmon, 993). In parallel operation o converters, uniorm current distribution among modules is o primary concern. Unbalanced current sharing is always encountered even with a careul design (Siri et al., 992). In this study, a new active snubber circuit is proposed to contrive a new amily o PWM converters. This proposed circuit provides perectly ZT turn ON and ZCT turn OFF together or the main switch o a converter by using only one quasi resonant circuit without an important increase in the cost and complexity o the converter. This study is organized as ollows. Classical Boost Converter is presented irst, Need or Power Factor Correction is presented next then proposed Parallel Boost Converter with Active Snubber Circuit is presented ater that describes the MATAB Simulation or Proposed Boost Converter with Active Snubber. Finally Simulation Results and Discussions, Conclusion is presented. MATERIAS AND METHODS Classical boost converter: The basic circuit diagram o the classical Boost converter is represented in Fig.. It consists o inductor, Capacitor C, g and out represents rectiied input voltage and output voltage respectively, switch S is an active switch, diode D is a reewheeling diode and R load is the load resistance. Switch S operates at a switching requency s with duty ratio D to obtain the mathematical model o the controller, the state model o Boost converter is derived by considering S = during IGBT switch condition subinterval and S = 0 during the diode conduction subinterval (Mahdavi et al., 997; Umamaheswari and Uma, 203). Mathematical model or classical boost converter: The converter dynamics is described by state-space averaging method and by using the same method, the state equations during switch-on and switch-o conditions are combined as ollows: When the switch is ON (S = ): di = ( g ) () d 0ut out = ( ) (2) C R load At 0<t<TON; S = ON. And when the switch is OFF (S = 0): di = ( g out) (3) d out out = ( i ) (4) C R load At TON<t<T; S = OFF. Similar to the previous case, the state space averaging model results the ollowing equations: dx dx dx ( D) g = x (5) 2 D = x (6) 2 C 2 x C Rload x = & and dx2 = x& (7) 2 Fig. : Circuit diagram or classical boost converter 4987

3 Fig. 2: Output voltage o a ull wave rectiier or in = 200 Sub (7) in (5) and (6): D x& = g x (8) 2 D x& 2 = x x (9) 2 C R C load where, x l and x 2 are the current through the inductor (i ), oltage across the output capacitor ( C ) respectively and D represents the duty cycle. From Eq. (8) and (9), the averaged system matrices were derived as given below: get charged due to the voltage across the load R increases. Starting rom t to t 2, the D and D 2 diodes are biased reversely (open circuit) as cap > in and then the capacitor get discharge over the load R load during a time constant o R load C seconds as in Fig. 2. Along a capacitor discharge arc the voltages among times t and t 2 set. Through which the output voltage is: out ( t) = mx e t+ t Rload C () The peak to peak ripple is indicating as the voltage dierence between max and min : 0 A= D C ( D) B= R C load, 0 (0) Mathematical model o single phase classical boost converter with rectiier unit: The circuit scheme o the proposed power actor correction converter mainly consists o a ull wave bridge rectiier and a modiied boost converter. The iltered ull wave rectiier is obtained rom the FWR by adding a suitable capacitor at the output. The FWR output is the outcome o the addition o a capacitor. The output is presently a pulsating dc, during a peak to peak variation is recognized as ripple. The input voltage magnitude and requency be obtained during the magnitude relies o the ripple, through the ilter capacitance, as well as the load resistance. The rectiier input is a sine wave o requency. For the rectiier let in be the ilter stage input which is a ull wave rectiied signal and the output is denoted as out. Input voltage can be anticipated as the complete value o the rectiier input, with the requency o 2. For the duration o the time period t 0 to t, the diode D (or D 3, based on the segment o the signal) is orward biased then in > C (inexact the orward biased diode as a short circuit), when the capacitor C 4988 Ripp Ripp Ripp ( PP) = out ( t) out ( t2 ) ( PP) = (2) mx ( PP) = mx mn e t2+ t Rload C (3) I C is huge, such that RC>>t 2 - t, we can estimate the exponential: Then, t2+ t t2 + t + RloadC e R C as load Ripp ( PP) = mx ( t R t C 2 ) load (4) Then t 2 -t ~t/2, somewhere t is the period o the sine wave, Now: t = = (5) mx Ripp ( PP ) mx 2Rload C 2R load C The voltage through the inductor rises to a value that is greater than the combined voltage across the

4 Fig. 3: Circuit diagram or single phase classical boost converter I on = in sat t on (7) From the Fig. 5, ater the switch is o, the voltage across the inductor is set by: Fig. 4: On state o classical boost converter o = di = Imn t o I peak As well as the current is given by: (8) I o = I peak out + Frwd in t o (9) Fig. 5: OFF state o classical boost converter diode and the output capacitor. Ater this value is obtained, the diode starts conducting and the voltage that seems across the output capacitor, is higher than the input voltage. This causes current to low through it and store energy magnetically. On switching o this voltage causes the stored energy to be transmitted to the voltage output in a restricted way. The output voltage is synchronized by modiying the ratio o on/o time. In Fig. 3 indicates the circuit diagram or single phase Classical Boost Converter. The circuit is constructed by inductor, Capacitor C, oad resistor R load, Switch S, Diode D and input AC source with bridge rectiier. From Fig. 4 while the switch is on, the voltage through the inductor is: di = on = I peak t on Then the current is given by: (6) 4989 where, Frwd is the orward voltage drop o the output rectiier and sat is the saturation voltage o the output switch. As I on = I o, Eq. (2) and (4) can be ixed equal to each other. This process gives a ratio or the on time over the o time. This is given by: t t on o = out + Frwd in( mn) in( mn) sat (20) The drawbacks o classical boost converter is poor power quality in terms o injected current harmonics, voltage distortion and power actor at input ac mains and slow-varying ripples at dc output load, low eiciency and large size o ac and dc ilters. So it is proposed to develop a parallel boost converter. Need or power actor correction: Power Factor is usually speciied as a number between 0 and and is equal to the ratio o reactive power to active power, or Cosine. The increase in power actor number makes the system more eicient. Thus, a system with a Power

5 Factor o 0.9 is much more eicient than the power actor with 0.6. The beneit o power actor correction is the elimination o charges related to reactive powerconsumption. Improvement in power actor eliminates utility power actor penalties, which may be applied to users with poor power actors. Such penalties can result in electricity bills or users being increased by anything up to 20%, depending on individual electricity companies. High power actor reduces the I 2 R losses. This result reduces heat in cables, switchgear, transormers and alternators which also prolong the lie o such equipment. Using same cable to supply a larger motor and improving the starting o motors at the end o long cable runs by the reduction o voltage drop in cables. An investment or power actor correction is typically between 2 to 24 months. So it was elt that there is a need or power actor correction techniques. Passive power actor correction and Active power actor correction are the two methods. Harmonic current can be controlled in the simplest way by using a ilter that passes current only at line requency. Harmonic currents are suppressed and the non-linear device looks like a linear load. Power actor can be improved by using passive devices. Such capacitor and inductor ilters with passive devices are called passive ilters. The passive power actor correction large value high current inductors are commanded, which are expensive and bulky. An active approach is the most eective way to correct power actor o electronic supplies. Here, boost converters are designed between the bridge rectiier and the main input capacitors. The converter tries to maintain a constant DC output bus voltage and draws a current that is in phase with and at the same requency as the line voltage. The overall advantages o proposed active power actor correction is dynamic wave shaping o the input current, high requency switching iltering, eedback sensing o the source current or waveorm control and regulate output voltage with eedback control. Proposed parallel boost converter with active snubber circuit: Usually, boost converters are used as active Power actor correctors. However, a recent novel approach or PFC is to use dual boost converter i.e., two boost converters connected in parallel. By using a parallel scheme, where inductor and switch S are or main PFC while 2 and S 2 are or active iltering. The iltering circuit serves two purposes i.e., improves the quality o line current and reduces the PFC total switching loss. The reduction in switching losses occurs due to dierent values o switching requency and current amplitude or the two switches. The parallel connection o switch mode converter is a well known strategy. It involves phase shiting o two or more boost converters connected in parallel and operating at the same switching requency (Parillo, 202). The overall advantages o using this approach is to improve the eiciency, reduce the development cost, high reliability, reduced current ripples, reduced conduction losses and reduced the size o active and passive components as boost inductor. Fig. 6: Circuit diagram or single phase boost converter with active snubber 4990

6 The purpose o Parallel Boost Converter is to avoid twice power process in two-stage scheme. Two converters can be connected in parallel to orm the parallel PFC scheme. Here, power rom the ac main to the load lows through two parallel paths. The main path is a rectiier, in which power is not processed twice or PFC, whereas the other path processes the input power twice or PFC purpose. To achieve both unity power actor and tight output voltage regulation, only the dierence between the input power and output power needs to be processed twice. Thereore, high eiciency can be obtained by this method. Normally, boost converters are used as active Power actor correctors. However, a recent novel approach or PFC is to use parallel boost converter i.e., two boost converters connected in parallel. Circuit diagram o parallel boost converter or PFC is shown in Fig. 6. By using the snubber circuit, it reduces or eliminates voltage or current spikes, limitation o di/ or d/, shape the load line to keep it within the Sae Operating Area (SOA), transer power dissipation rom the switch to a resistor or a useul load, due to switching reduce total losses, ringing damping voltage and current to reduce EMI. The advantages o parallel boost converter with active snubber circuit is to improve overall eiciency, high reliability, reduced development cost due to the modular design, low harmonics and conduction loss. Features o proposed parallel boost converter: Assume both the Main Switches (S and S 2 ) are operates in the same requency: All the Semiconductors are work with sot switching in the proposed converter. The main switches S and S 2 are turn on with ZT and turn o with ZCT. The secondary switch is turn on with ZCS and turn o with ZCS. All other components o the parallel boost converter unctioned based on this sot switching. There is no additional current or voltage orce on the main switches S and S 2. There is no additional current or voltage orce on the secondary switch S 3. Also there is no additional current or voltage orce on the main Diodes D and D 2. According to the ratio o the transormer, a part o the resonant current is transerred to the output load with the coupling inductance. So there is less current stress on the secondary switch with satisied points. At resistive load condition, in the ZT process, the main switches voltage alls to zero earlier due to decreased interval time and that does not make a problem in the ZT process or the main switch. At resistive load condition, in the ZCT process, the main switches body diode ON-state time is increased when the input current is decreased. However, there is no eect on the main switch turn-off process with ZCT. This parallel boost converter is operates in highswitching requency. This converter is easily control because the main and the auxiliary switches are connected with common ground. The most attraction o this proposed converter is using ZT and ZCT technique. The proposed new active snubber circuit is easily adopted with other basic PWM converters and also switching converters. Additional passive snubber circuits are not necessary or this proposed converter. SIC (Silicon Carbide) is used in the main and auxiliary diodes, so reverse recovery problem is not arise. The proposed active snubber circuit also suitable or other dc-dc converters. Figure 7 shows the components o proposed boost converter. It is the combination o new active snubber circuit with parallel boost converter. Three switches are used switch S and S 2 are act as main switch and S 3 act as an auxiliary switch. S and S 2 are controlled by ZT and ZCT respectively also S 3 is controlled by ZCS. This circuit operates at 200/50Hz AC supply. The proposed converter block diagram is in Fig. 7. Fig. 7: Components o single phase parallel boost converter with active snubber 499

7 Fig. 8: When S = S 2 = 0 and S 3 = Fig. 9: When S = S 2 = S 3 = Fig. 0: When S = S 2 = and S 3 = or 0 Mathematical model or parallel boost converter with active snubber circuit: Figure 6 represents the circuit diagram o the parallel boost converter with active snubber. It consists o ive inductors i, 2, R, R2, n and three capacitors C s, C r, C o, g and o represent supply and output voltage respectively, S (S, S 2 ) is an active primary switch, D (D, D 2 ) is a reewheeling diode, D s (D, D 2, D 3 ) is a Snubber diode and R is the load resistance. S (S, S 2, S 3 ) operates at a switching requency s with duty ratio d. Choose the switching requency o switches S = S 2 = 00 KHz and S 3 = 200 KHz. When S = S 2 = 0 and S 3 = as in Fig. 8: di F F [ = ] = (2) g o Also the switches S = S 2 = S 3 = as in Fig. 9: di F F [ ] = (23) g o do o = if (24) Co R Similarly, the switches S = S 2 = and S 3 = or 0 as in Fig. 0: di F g = (25) F do = o (26) Co R do o = if i (22) S Co R 4992 By using state-space averaging method the state equations during switch-on and switch-o conditions are:

8 ( d ) ( d ) Res. J. Appl. Sci. Eng. Technol., 7(23): , g x & = x2 x2+ (27) F F F ( d )d ( d )( d ) x& (28) 2 2 2= x2+ x+ x RCo Co Co where, x and x 2 are the moving averages o i F and o respectively. Procedure or constructing a proposed converter: Steps to obtain a system level modeling and simulation o proposed power electronic converter are listed below: Determine the state variables o the proposed power circuit in order to write its switched statespace model, e.g., inductance current and capacitance voltage. Assign integer variables (ON- and OFF-0 state) to the proposed power semiconductor to each switching circuit. Determine the conditions controlling the states o the proposed power semiconductors or the switching circuit. Assume the main operating modes, apply Kirchho's Current law and Kirchho's oltage law and combine all the required stages into a switched state-space model, which is the desired system-level o the proposed model. Implement the derived equations with MATAB SIMUINK. Use the obtained switched space-state model to design linear or nonlinear controllers or the proposed power converter. Perorm closed-loop simulations and evaluate converter perormance o proposed converter. The algorithm or solving the dierential equations and the step size should be chosen beore running any simulation. This step is only suitable in closed-loop simulations (Umamaheswari and Uma, 203). OPERATION OF PROPOSED BOOST CONERTER WITH SNUBBER CIRCUIT The proposed PFC is shown in Fig. 6 and it is based on a dual boost circuit where the irst one (switch S and choke ) is used as main PFC circuit and where the second one (switch S 2 and choke 2 ) is used to perorm an active iltering. The proposed PFC converter is obtained by adding ZT-ZCT PWM active snubber circuit to the parallel boost converter. The proposed converter applies active snubber circuit or sot switching. This snubber circuit is mostly built on the ZT turn-on and ZCT turn-off processes o the main switches. Speciication o parallel boost converter with active snubber is in Table Table : Speciication o parallel boost converter with active snubber Main inductor 750 µh Main inductor µh Upper snubber inductor R 5 µh ower snubber inductor R2 ( m+ d) 2 µh Magnetization inductor M ( n+ 0l) 3 µh Parasitic capacitor C s µf Snubber capacitor C R 4.7 nf Output capacitor C o 330 µf/450 Output load resistance R = R 530 Ω The power rom the ac main to the load lows through the two parallel paths. The main path is a rectiier, where power is not processed twice or PFC, but the other path processes the input power twice or PFC purpose. To attain both unity power actor and tight output voltage regulation, only the dierence among the input power and output power needs to be processed twice. Thus, high eiciency can be ound by this method. So as to reach Sot Switching (SS) or the main and the auxiliary switches, main switches turn on with ZT and turn o with ZCT. The proposed converter utilizes active snubber circuit or SS. This snubber circuit is mostly based on the ZT turn-on and ZCT turn-off processes o the main switch. C S capacitor is the addition o the parasitic capacitors o the main switch S and the main diode D. R2 value is limited with ( out / R2 ) t rises2 I imax to conduct maximum input current at the end o the auxiliary switch rise time (t rise S 2 ) and R 2 R2. To turn OFF S with ZCT, the duration o t ZCT is at least longer than all time o S (t all S) t ZCT t all_s. Though the main switches are in OFF state, the control signal is unctional to the auxiliary switch. The parasitic capacitor o the main switch should be discharged absolutely and the main switches anti parallel diode should be turned ON. The ON-state time o the anti parallel diode is named t ZT and in this time period, the gate signal o the main switch would be applied. So, the main switch is turned ON below ZS and ZCS with ZT. Whereas the main switches are in ON state and ways input current, the control signal o the auxiliary switch is applied. Ater the resonant starts, the resonant current should be higher than the input current to turn ON the anti-parallel diode o the main switch. The ONstate time o the anti-parallel diode (t ZCT ), has to be longer than the main switches all time (t S ). Ater all these terms are completed, while anti-parallel diode is in ON state, the gate signal o the main switch should be cuto to provide ZCT or the main switch. Auxiliary switch turn ON with ZCS and turn OFF with ZCS. The auxiliary switch is turned ON with ZCS or the coupling inductance limits the current rise speed. The current pass through the coupling inductance, must be partial to conduct maximum input current at the end o the auxiliary switch rise time (t rs3 ). So, the turn-on process o the auxiliary switch with ZCS is oered. To turn OFF the auxiliary switch with ZCS, though the auxiliary switch is in ON state, the current pass complete the switch should all to zero with a new resonant. Then, the control signal can be cuto. I C S is ignored, R value should be two times added than R2

9 to all the auxiliary switch current to zero. As the current cannot stay at zero as long as the auxiliary switch all time (t S3 ), the auxiliary switch is turned OFF nearly with ZCS. MATAB simulation or proposed converter with active snubber: The proposed SIMUINK topology is shown in Fig.. The inductors and 2 have the similar values, the diodes D -D 2 are the same type and the same guess was or the switches (S and S 2 ). All inductor has its individual switch and thus it s like with the paralleling o both single/classic converters. RESUTS AND DISCUSSION A modular single phase ac-dc converter using parallel boost converter o the proposed system is simulated using MATAB SIMUINK program. The waveorms o in and I in o the converter is shown in Fig. 2 and 3. The output dc voltage ( o ) is shown in Fig. : SIMUINK model o proposed PFC boost converter with snubber circuit Fig. 2: Input voltage o proposed boost converter with active snubber circuit 4994

10 Fig. 3: Input current o proposed boost converter with active snubber circuit Fig. 4: Output voltage (o = 420) Fig. 4. The waveorm o power actor is shown in Fig. 5. The combined input and output voltage is shown in Fig. 6 and the control signals o the switches 4995 are shown in Fig. 7 and 8, respectively. The simulation results show the proposed sot switched parallel boost ac-dc converter has the proper response.

11 Fig. 5: Power actor (PF = 0.997) Fig. 6: Input voltage and output voltage (in = 200v and o = 420) Fig. 7: Control signals o switch S3 4996

12 (a) Fig. 8: Control signals o switches S, S2 Table 2: A summary o system perormance parameters or parallel boost converter Type o output dc voltage (constant, variable, etc.) Constant Power low (unidirectional and bidirectional) Unidirectional Input voltage 200 ine requency 50 Hz Number o switches 3 Nature o dc output (isolated, non-isolated) Isolated DC output (buck, boost and buck-boost) Boost (420 ) Type o dc loads (linear, non-linear, etc.) Non-linear Power actor 99.7% Eiciency 98% Rating (W, kw, MW, etc.) 340 W oad resistance 530 Ω Finally the overall system perormance o proposed parallel boost converter is shown in Table 2. CONCUSION The main objective o this study was to improve the power actor with active snubber circuit or the parallel boost converter. Simulations were initially done or conventional boost converter with snubber circuit. The changes in the input current waveorm were obtained. A PFC circuit having a parallel boost converter was designed with sot switching which is provided by the active snubber circuit. For this idea, only one auxiliary switch and one resonant circuit was operated. The main switches and all the other semiconductors were switched by ZT and ZCT techniques. The active snubber circuit was applied to the parallel boost converter, which is ed by rectiied universal input ac line. This latest PFC converter was achieved with 200 ac input mains. The diode was added in order to the auxiliary switch path to avoid the incoming current stresses as o the resonant circuit to the main switch. It was noticed that the Power Factor and the eiciency is better or Dual Boost Converter Circuit. Finally, 98% eiciency at ull load was achieved and the power actor was reached to 99.7% or the proposed converter. Due to the main and the auxiliary switches have a common ground, the converter was controlled easily. The proposed new active snubber circuit can be simply unctional to the urther basic PWM converters and to all switching converters. (b) 4997 REFERENCES Bodur, H. and A. Faruk Bakan, A new ZT- PWM DC-DC converter. IEEE T. Power Electr., 7: Bodur, H. and A. Faruk Bakan, A new ZT- ZCT-PWM DC-DC converter. IEEE T. Power Electr., 9(3). Bodur, H., A. Faruk Bakan and M. Baysal, A detailed analytical analysis o a passive resonant snubber cell perectly constructed or a pulse wih modulated DC-DC buck converter. Electr. Eng., 85: Deepakraj, M.D., 989. Static power conversion method and apparatus having essentially zero switching losses and clamped voltage levels. U.S. Pattern A. Jordi, E., K. Florian,.D.K. Jeroen, D. Johan and W.K. Johann, 202. Comparative evaluation o sot-switching, bidirectional, isolated AC/DC converter topologies. Proceedings o the 27th Applied Power Electronics Conerence and Exposition (APEC, 202), pp: ai, J.S., R.W. Young, G.W. Ott, J.W. McKeever and F.Z. Peng, 996. A delta conigured auxiliary resonant snubber inverter. IEEE T. Ind. Appl., 32(3): Mahdavi, J., A. Emadi and H.A. Toliyat, 997. Application o state space averaging method to sliding mode control o PWM DC/DC converters. Proceeding o the IEEE Industry Applications Society Annual Meeting, 2: McMurray, W., 993. Resonant snubbers with auxiliary switches. IEEE T. Ind. Appl., 29(2): Ned Mohan, T., M. Undeland and P.R. William, Power Electronics: Converters, Applications and Design. John Wiley and Sons Inc., New York. Ortiz, G., D. Bortis, J.W. Kolar and O. Apeldoorn, 202. Sot-switching techniques or mediumvoltage isolated bidirectional Dc/Dc converters in solid state transormers. Proceeding o the 38th Annual Conerence on IEEE Industrial Electronics Society (IECON, 202), pp:

13 Parillo, F., 202. Dual boost high perormances Power Factor Correction (PFC) control strategy implemented on a low cost FPGA device, using a custom sloat24 developed math library. Proceeding o 47th International Universities Power Engineering Conerence (UPEC, 202), pp: -6. Rangan, R., D.Y. Chen, J. Yang and J. ee, 989. Application o insulated gate bipolar transistor to zero-current switching converters. IEEE T. Power Electr., 4: 2-7. Rogayeh, P., F. Samira, P. Reza and P. Majid, 20. A new sot-switched resonant DC-DC converter. ACEEE Int. J. Control Syst. Instrum., 2(2). Salmon, J.C., 993. Techniques or minimizing the input current distortion o current-controlled single-phase boost rectiiers. IEEE T. Power Electr., 8: Silva Ortigoza, R., G. Silva Ortigoza,.M. Hernandez Guzman, G. Saldana Gonzalez, M. Marcelino Aranda and M. Marciano Melchor, 202. Modelling, simulation and construction o A DC/DC boost power converter: A school experimental system. Eur. J. Phys., 33: Singh, B., B.N. Singh, A. Chandra, K. Al-Haddad, A. Pandey and D.P. Kothari, A review o single-phase improved power quality AC-DC converters. IEEE T. Ind. Electron., 50(5): Siri, K., C.Q. ee and T.F. Wu, 992. Current distribution control or parallel connected converters: Part I. IEEE T. Aero. Elec. Sys., 28: Umamaheswari, M.G. and G. Uma, 203. Analysis and design o reduced order linear quadratic regulator control or three phase power actor correction using cuk rectiiers. Electr. Pow. Syst. Res., 96: -8. Wang, K., F.C. ee, G. Hua and D. Borojevic, 994. A comparative study o switching losses o IGBTs under hard-switching, zero-voltage-switching and zero-current-switching. Proceedings o the 25th Annual IEEE Power Electronics Specialist Conerence (PESC, 994) Record, pp: Wannian, H. and G. Moschopoulos, A new amily o zero voltage transition PWM converters with dual active auxiliary circuits. IEEE T. Power Electr., 2: Yu, H., B.M. Song and J.S. ai, Design o a novel ZT sot-switching chopper. IEEE T. Power Electr., 7: Yungtaek, J. and M.J. Milan, A new, sotswitched, high-power-actor boost converter with IGBTs. IEEE T. Power Electr., 7(4). 4998