High Efficiency THIPWM Three-Phase Inverter for Grid Connected System

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1 00 IEEE Symposium on Industrial Electronics and Applications (ISIEA 00), October 3-5, 00, Penang, Malaysia High Efficiency THIPWM Three-Phase Inverter for Grid Connected System M.A.A. Younis Dept. of Electrical Power Engineering, UNITEN, Selangor, Malaysia Abstract This paper presents a grid connected system. Three phase -AC inverters used to convert the regulated power to AC power suitable for grid connection. Third harmonic injection PWM (THIPWM) was employed to reduce the total harmonic distortion and for maximum use of the voltage source. DSP was used to generate the accurate THIPWM for grid connection, by synchronizing the inverter voltage with the grid voltage. The application of THIPWM to parallel connected inverter reduces the total harmonic distortion and increases efficiency of the inverter. Experimental results validate the developed model and the proposed system. Keywords: Three-phase inverter, Third harmonic injection PWM, inverters parallel connection. I. INTRODUCTION To avoid introducing extra distortions to the grid power, the generated currents from these inverters should have low harmonics and a high power factor. Furthermore, when the output currents are in phase with the grid voltages, the maximum real output power is achieved by minimizing the reactive component []. The grid-connected inverters are desired to have high power-quality, high efficiency, high reliability, low cost, and simple circuitry. With development and utilization of an unstable voltage source recently, grid connected inverters are widely used as essential power electronic devices for a grid-connected system. With PWM control technologies, the AC side of the grid-connected inverter has the abilities of controllable power factor, sinusoidal output currents and bi-directional power transfer [3] [4]. The power rating of grid-connected inverter is usually high; therefore switching frequency of the inverter is usually low. The relatively low switching frequency may cause the current harmonic in the output current of the inverter to increase. The third harmonic injection pulse width modulation method used to control the power factor of the inverter output current and voltage. However, it is very difficult to generate the correct third harmonic amplitude [6] [7]. Generation of sinusoidal PWM is not having the same difficulties but the generated AC voltage is 5% less the maximum voltage can be generated by using THIPWM. In hysteresis control the N. A. Rahim and S. Mekhilef 3, 3 Dept. of Electrical Engineering, University of Malaya, Kuala Lumpur, Malaysia. switching frequency varies significantly according to the power level and the link [8] [9]. This paper proposes a parallel system where individual inverters connect both and AC side directly without additional passive components. The direct connection would reduce the system size and cost. In section II, overall block diagram of the whole system is developed. To get regulated voltage at the input of the three phase inverter, PID controller used and its implementation id discussed in section III. Two parallel inverter connection as shown in Figure and THIPWM development is discussed in section IV. The proposed solution for current sharing discussed in section V. however the system efficiency discussed in section VI. Proposed system synchronization with the grid connection developed in section VII. The prototype validation developed and discussed in section VIII. Section IX discuss the main point of contribution in this work Figure : parallel connected three-phase inverter system II. Grid Connected System Block Diagram The block diagram of the grid-connected system is shown in Figure. The regulated source supplies a power to threephase parallel-connected inverter. The parallel connected inverter is the main the concern of this paper. The Six-step modulation uses a sequence of six switch patterns for threephase full-bridge inverter, to generate a full cycle of threephase voltages /0/$ IEEE 88

2 along with the link for code composer studio, to automate code generation, execution, and communication with the TI evaluation boards by inserting blocks for optimized functions, together with the appropriate board peripherals, into the model []. Three epwm blocks are used to obtain three-phase THIPWM for the three-phase inverter. Each epwm block generates a switching signal for three legs of the inverter, as shown in Figure 4. Figure : The system block diagram III. Inverters in Parallel In parallel operation, two or more inverters can be tied together to share a load. In this paper, a system of two units is discussed. Figure 3 shows two inverters connected directly at input and the output ends. THIPWM was considered, where the modulating signal is generated by injecting the third harmonic component to the 50 Hz fundamental component as given in equation. v ra =.5 sin ωt sin 3ωt V rb V rc =.5 sin =.5 sin ωt π 3 4 ωt π sin 3ωt sin 3ωt Use of the modulator given in equation will produce THIPWM which maintain the peak of the line voltage equal to the voltage level. () The modulating signal data is generated by using equation and saved in a lookup table. The carrier is provided by the epwm block, by applying a suitable PWM setting. The carrier frequency is calculated from the following equations, when the counter setting is up/down. TPWM = TBPRD TTBCLK () ( ) FPWM = (3) TPWM TBCLK = SYSCLKOUT (4) HSPCLKDIV CLKDIV Where TPWM is the PWM interval, TBRD is the value saved in the TBPRD register, TTBCLK is the time of one clock cycle, and FPWM is the carrier frequency. The clock frequency is calculated by using equation 4, where SYSCLKOUT is the synchronous clock frequency, 00MHz; HSPCLKDIV is the High Speed Time-Based Clock Prescale Bits selected to be one of the following values,, 4, 6, 8, 0,, or 4. CLKDIV is the Time-Base Clock Prescale Bits to be selected as one of the following values,, 4, 6, 3, 64, or 8. The PWM cycle (TPWM) is shown in Figure 5. Id+ Q Q3 Q 5 + source - - converter ID + V VA VB VC R Ia+ IA+ Id+ - Id- Q Q Q 4 Q3 Q 6 Q 5 IA- Three- Phase LC Filter Three- Phase RL Load R Ia+ VA VB VC Q Q 4 Q 6 Six Patten THIPWM DSP Control Circuit TMS30F808 ezdsp Figure 3: current flowing in three-phase parallel inverters The Embedded Target for the TI C000 is used to construct system models and real-time control algorithms within the SIMULINK environment, by using blocks from the SIMULINK block library. The target for the TI C000 is used Figure 4: Three-phase THIPWM Generation To prevent a short circuit in the link at one leg of the inverter, the dead-time period during which both the upper and 89

3 the lower IGBT of the inverter phase leg are off, must be inserted to the switching signals[]. The dead-time can cause waveform distortion and decrease the fundamental voltage. Dead-band (DB) module is used to create-dead time for the switches on the same leg. The DB module supports independent values for rising-edge (RED) and falling-edge (FED) delays. The amount of delay is programmed by using the dead-band rising-edge (DBRED) and dead-band fallingedge (DBFED) memory-mapped registers. These are 0-bit registers and their value represents the number of TBCLK periods a signal edge is delayed by. Equation 5 and 6 is used to calculate FED and RED, respectively [3]: FED = DBFED TTBCLK (5) R ED = DBRED TTBCLK (6) Carrier peak epwma epwmb TPWM Carrier RED Modulating signal FED time Figure 5: Switching Interval with Dead Band Time IV. Efficiency of parallel connected inverter Inverters with different ratings are sometimes connected in parallel especially for system upgrading or to enhance the power rating of any used inverter. In this case, it is desirable for the paralleled converters to share the currents equally. If the inverter uses non-identical IGBT' s, current sharing and circulating current are to be considered. To study the current sharing and circulating current, Figure 6 shows one mode of operation, where the current I da+ flowing through Q A and Q B. However the current I da- flows back to the source through Q 6A and Q 6b. Figure 6: Current Path during One Switching Cycle The Figure shows current sharing between Q A and Q B, with the addition of two series resistors. Current sharing depends on the IGBT s Q A and Q B, If V CEA not equal to V CEB, I da + will not be equal to I db +. To maintain similar current sharing between the two inverters, series resistor R and R are added between each of the six legs and the common point as shown in Figure 3. R box consists of three resistors, R, R, and R 3. Similarly R consists of R, R, and R 3. Including the resistances R A and R B as shown in Figure 6 need satisfy the following condition: V + + CEA + I da RA = V CE B + I db R B (7) assuming that + + I da = I db = I D or I D ( R A R B ) = V CE B V CE A (8) (9) ( ) V CE B V CE A (0) RA = + RB I D For the right value of R and R, each of them should be much smaller than the load resistance. The circuit will experience similar current sharing in all the modes of operation as a result the circulating current will be small. The power dissipation and the efficiency in three-phase inverter can be calculated as follow: P D = P - P AC () P AC η = () p Where P D is the power dissipation of the inverter, P is the source power, and P AC is the inverter output power. Assuming ripple free current on the source, and unity power factor on the AC side the input power and the output power are calculated as P = I V (3) P AC, 3φ = 3I ph V ph (4) The inverter power dissipation mainly dissipated on the IGBT s. The parallel connection improves the switch power dissipation which improves the inverter efficiency. Figure 7 shows a linear approximation of I C versus V CE (on) []. It s shown clearly in the Figure that R EC affecting the voltage V CE, which ultimately affect the IGBT power dissipation. V CE( ON ) = I C R CE( ON ) + V CE( Zero) (5) By connecting two inverters in parallel, in one switching cycle two IGBT s will be connected in parallel which will reduce the current in each IGBT. And the equivalent resistance of two IGBTs in parallel will be less. That is reduces the IGBTs power dissipation which will result in better efficiency for the inverter. Figure 7: Linear Approximation of I C versus V CE(on) 90

4 V. Grid Connection This section introduces the three-phase grid connected inverter. Figure shows the block diagram of the overall system connected to the grid. The inverter output voltage has the same frequency and amplitude with those of the grid voltage. The synchronization of the inverter output voltage with the grid voltage must be done in such a way that the two voltages are in phase. The waveform in Figure 8 shows the synchronization process. The signal from the grid is connected to the DSP analog-to-digital converter (A) through the voltage sensor after an offset signal was added to it. The DSP program will generate a synchronized THIPWM with a 50Hz fundamental frequency. The signal from the A was filtered by using a discrete first-order filter to detect an accurate zero. The detector detects positive zero then generates a square pulse with 50Hz frequency and a duty cycle of 98% to avoid the effect of zero negative detection. The signal will be sent to discrete variable transport delay which will decide the delay needed for power factor correction. After applying the needed delay to the signal, it triggers the THPWM generator to generate the synchronized PWM signal. Figure 9 shows the implementation of zero detecting for synchronization with the power factor correction. VI. Result and discussion A parallel connected system was designed and implemented to verify the above discussion. The parameters of the system are as shown in Table. Table : System Components and Parameters Three-phase inverter / converter H/F transformer IGBT for inverter A is SSG60N60 V CE(ON)=.75V IGBT for inverter B is IRGP50B60PD V CE (ON) = V LC at grid side L = mh C= 5 μf Carrier frequency = 4.5 khz R= 0. Ω R= 0.5 Ω IGBT SSG60N60 with V CE(ON)=.75V Filter C = 0 μf Carrier frequency= 0 khz SF-40 EE core from New Favor Industry The generated three-phase THIPWM synchronized with the grid voltage shown in Figure. Figure shows small phase shift between the phase voltage and phase current on the inverters load side, Grid voltage Phase a Figure 8: Zero Detection for Voltage Synchronization Phase b Phase c Figure : Three-phase THIPWM synchronized with the grid voltage (5V/div, 5ms/div) Figure 9: Block Diagram of Synchronization and Power Factor Correction The single line diagram of the inverter connected to the grid is shown in Figure 0, Where the grid voltage is stepped down to the level matching the inverter output voltage, through three phase transformer. S connects the power to three phase load from the grid and the inverter. S connects the inverter to the grid. > Phase voltage Phase current ) Ch 50 V 5 ms ) Ch 5 A 5 ms Figure 0: System Connection to the Grid Figure : Phase Voltage and Phase Current on the Load Side (50V/div, 5A/div, 5ms/div) 9

5 With the connection of two inverters in parallel the total harmonic distortion (THD) on the output voltage and current is less than on a single inverter. And efficiency improve by 0.7% Table shows the phase voltage and phase current, the input power, the output power and the harmonic distortion in single and double inverters. Figure 3-6 shows a voltage and current comparison for single inverter and double inverter. > Average input voltage Average input current Table : Comparison between Parallel Inverters and Single Inverter in Input and Output Power, Current and Voltage THD. Input power Output power Efficiency Current THD Voltage THD (W) Single %.4%.43% inverter Double connecte d inverter %.36%.8% > ) Ch 00 Volt 5 ms ) Ch Amp 5 ms Figure 5: The inverter input average voltage and current with parallel connected inverter (00V/div, A/div, and 0ms/div) > Input voltage Average input current > > > ) Ch 00 Volt 5 ms ) Ch Amp 5 ms Figure 3: The inverter input average voltage and current with single inverter (00V/div, A/div, and 0ms/div) ) Ch 00 Volt 0 ms ) Ch 5 Amp 0 ms Figure 6: The inverter output voltage and current with parallel connected inverter (00V/div, 5A/div, and 0ms/div) To verify the grid connection capability of the inverter, the connection shown in Figure 0 was prepared. The grid voltage and the inverter s output voltage before the grid connection and after the grid connection is shown in Figure 7. > > > ) Ch 00 Volt 0 ms ) Ch 5 Amp 0 ms Figure 4: The inverter output voltage and current with single inverter (00V/div, 5A/div, and 0ms/div) ) Ch 00 Volt 0 ms ) Ch 00 Volt 0 ms Figure 7: Line Voltage on the Grid and the Inverter Output (00V/div, 0ms/div) If the switches S and S are closed, both the inverter and the grid will share the current I inv and I grid to the load, as shown in 9

6 Figure 8. If the switch S opens, all the current produced by the inverter will feed the grid. Figure 9 shows the grid s phase-voltage and the current I L. Grid Current Transactions on Industry Applications, Vol. IA-6, Sept./Oct. 980, pp [4] Fainan A., Magueed, and Jan Svensson, Control of VSC connected to the grid through LCL filter to achieve balanced currents, IEEE Industry Applications Society Annual Meeting 005, vol., pp > Inverter Current [5] Juan Manuel Carrasco, Jan T. Bialasiewicz, Ramón C. Portillo Guisado, Jose Ignacio Leon, Narciso Moreno-Alfonso, 'Power- Electronic Systems for the Grid Integration of Renewable Energy Sources: A Survey' IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 4, AUGUST 006, pp > ) Ch Amp 5ms ) Ch Amp 5ms Figure 8: Grid Current and the Inverter Current Feeding the Load (A/div, 5ms/div) > > Grid Voltage ) Ch 00 Volt 5 ms ) Ch 5 Amp 5 ms Inverter Current Figure 9: Grid Phase Voltage and the Current Feeding the Grid (00V/div, 5A/div, 5ms/div) ) [6] N. Mohan, A Novel Approach to Minimize Line- Current Harmonics in Interfacing Power Electronics Equipment with 3-Phase Utility Systems IEEE Trans on Power Delivery, July, 993 Vol. 8, pp [7] Naik. N, Mohan, N. ; Rogers, M. ; Bulawka, A novel grid interface, optimized for utility-scale applications of photovoltaic, wind-electric, and fuel-cell systems IEEE Trans on Power Delivery, vol.0, Oct. 995, pp [8] Lohner A., Meyer T., Nagel A., A new panel-integratable inverter concept for grid-connected photovoltaic systems ISIE '96. Proceedings of IEEE International Symposium on Industrial Electronics, Warsaw, Poland, 7-0 June 996, vol., pp [9] Hatziadoniu, C.J., Chalkiadakis F.E., Feiste V.K.. A power conditioner for a grid-connected photovoltaic generator based on the 3-level inverter IEEE Transactions on Energy Conversion,, IEEE, Dec. 999, vol.4 pp [0] Cominos P., Munro N., PID controllers: recent tuning methods and design to specification Control Theory and Applications, IEE Proceedings- Volume 49, Issue, Jan. 00 pp [] The Mathworks, Simulink 6 help copyright , the mathworks, Inc. protected by U.S. patent. [] Bin Zhang, Huang A.Q., Bin Chen, A novel IGBT gate driver to eliminate the dead-time effect Industry Applications Conference, 005. Fourtieth IAS Annual Meeting. Conference Record of the 005, Volume, -6 Oct. 005 pp [3] TMS30x80x Enhanced Pulse Width Modulator (epwm) Module Reference Guide Literature Number: SPRU79November 004. VII. Conclusion This paper presents a high efficiency THIPWM three-phase inverter for grid connected system. Parallel-connected threephase inverter fed from regulated voltage source. The improvement of parallel connected inverter over single connected inverter is clearly shown by calculating the efficiency of the inverter in both cases. The efficiency of parallel connected inverter found to be higher as compared to the single inverter. The system suitability for grid connection is verified and the parallel-connected inverter shows its capability of injecting current to the grid while maintaining synchronization with the grid. References [] Jonathan Dodge, P.E. John Hess, IGBT Tutorial Advanced Power Technology Application Note APT00 Rev. B July, 00 [] Chongming Qiao, Smedley K.M., Three-phase grid-connected inverters interface for alternative energy sources with unified constant-frequency integration control Industry Applications Conference, 00. Thirty-Sixth IAS Annual Meeting. Conference Record of the 00 IEEE Volume 4, 30 Sept.-4 Oct. 00 vol.4 pp [3] I. J. Pitel, S. N. Talukdar, and P. Wood, Characterization of Programmed-Waveform Pulse-Width Modulation, IEEE 93