HT66F03T3/68F03T3 MCU with 315MHz/433MHz ASK Transmitter

Transcription

1 HT66F03T3/68F03T3 MCU with 315MHz/433MHz ASK Transmitter D/N:AN0220E General Description The HT66F03T3/68F03T3 is a Flash type MCU with an RF ASK transmitter function. Data generated from the MCU will be transmitted at a carrier frequency of 315M/433MHz to a receiver. Functions Complete UHF transmitter Frequency range of 300MHz to 450MHz Output power up to 10dBm Low external part count with minimal external components Low voltage operation (down to 2.2V) Diagram Hardware Diagram Description Output matching circuit: the following example uses a low pass matching circuit. KEY PAD: the following example uses PA0~PA3 and PA6~PA7 as switch input pins. 1

2 Application Circuit HT66F03T3/68F03T3 MCU with 315MHz/433MHz ASK Transmitter The circuit in the frame is the harmonic inhibiting enhancement circuit which can be ignored if not necessary. Note: The value in the parentheses is for 433MHz. For example, MHz the Crystal Y1 should be 13.56MHz. Adjust Output Power with External Resistors R1 in the application circuit is used to adjust the RF output power. In this example, the R1 resistor values for the 50 demo board and corresponding typical values of conducted RF output levels are listed in the table below. R1 in the HT46/48R01T3 demo board uses a dipole antenna which can be adjusted to an appropriate radiation to meet the specifications of the design. Output Power Typical I D of PA (ma) R1( ) (dbm) 433MHz 315MHz

3 Reference Clock (CREF ) Example The Clock CREF is provided for IRC frequency calibration of the MCU. It is useful for devices that require accurate frequencies, such as RTC applications. The following example demonstrates an RF transmission from PA4 with data received on PA5 and calibrated by CREF. ;; PA4 is the toggle output pin ;; PA5 is the cref intput pin ;; tmr0 is used to counte cref ;; tmr1 is used to generate toggle #INCLUDE HT48R01B.INC CREF_DEMO.section 'data' CA1_TMP DB 1 CA2_TMP DB 1 GEN1_TMR_TMP DB 1 GEN2_TMR_TMP DB 1 PA5_TMP DB 1 CREF_COUNT DB 1 CREF_DEMO.section at 0 'code' ORG 00H JMP MAIN ORG 08H JMP TMR0INT org 0ch JMP TMR1INT ;~~~~~~~~~~timer0 int TMR0INT: SDZ CA1_TMP JMP POLLIN_PA5 INC CA2_TMP POLLIN_PA5: SZ PA5_TMP JMP HI LO: SNZ PA5 ;POLLING PA5 STATUS JMP NO_CHANGE SET PA5_TMP JMP INC_CREF_COUNT HI: SZ PA5 ;POLLING PA5 STATUS JMP NO_CHANGE CLR PA5_TMP JMP INC_CREF_COUNT INC_CREF_COUNT: SDZ CREF_COUNT JMP EXIT CLR ACC SUBM A,CA1_TMP 3

4 CLR JMP tmr0c.4 EXIT EXIT: NO_CHANGE: RETI ;~~~~~~~~~~timer1 int TMR1INT: SDZ CREF_COUNT RETI SZ PA4 ;TOGGLE PA4 JMP CLR_PA4 SET PA4 JMP $+2 CLR_PA4: CLR PA4 MOV A,GEN1_TMR_TMP MOV CREF_COUNT,A reti ;~~~~~~~~~~MAIN MAIN: ;INITIAL I/O CLR PBC1 SET PBC0 ;INITIAL PA4 INTO OUTPUT MODE(dout) ;INITIAL PA4 INTO INPUT MODE (cref) ;INITIAL COUNT CLR PA5_TMP MOV A,32 MOV CREF_COUNT,A CLR CA1_TMP CLR CA2_TMP ;INITIAL TIMER0 mov a,05h ;; enable interupt mov intc0,a mov a,82h ;; tmr internal mode mov tmr0c,a mov a,236 ;; time base is ( )*1us=40us mov tmr0,a ;INITIAL TIMER1 set et1i ;; enable interupt mov a,236 ;; time base is ( )*1us=40us mov tmr1,a mov a,80h ;; tmr internal mode mov tmr1c,a SNZ PA5 JMP $-1 SZ PA5 JMP $-1 set tmr0c.4 ;; start tmr sz CREF_COUNT ;;WAIT COUNTER FINISH JMP $-1 CLR ET0I ;;Disable the timer 0 interrupt RLC CA1_TMP ;both ca1_tmp and ca2_tmp are store 4

5 RLC CA2_TMP ;count value of one cycle * 32,so RLC CA1_TMP ;one cycle is CA1_TMP Divided by 32 RLC CA2_TMP ; RLC CA1_TMP ; RLC CA2_TMP ;divide 32 ;generate one 2.5ms cycle wave ;20us*CA2_TMP=5ms (1/200=5ms) ;tmr1 2.5ms=> 100us*CA2_TMP*2.5/5 ;so tmr1= CA2_TMP/2 CLR C RRC CA2_TMP RRC CA1_TMP MOV A,CA1_TMP MOV GEN1_TMR_TMP,A MOV A,CA2_TMP MOV GEN1_TMR_TMP,A set tmr1c.4 JMP $ END ;load counter value ;; start tmr1 to generate Layout Notes Component Placement The first consideration for component placement are their signal lines which must be as short as possible. In addition to the antenna matching components, the RF PAOUT pin area should avoid being occupied with components which may influence proper RF operation. Routing As right angles more easily accumulate charge, they will have larger discharges which will influence PCB stability. It is recommended to conduct all routing using 45 degree bevels or curves. The distance between tracks should not be less than 6 mils. The distance between the wires and the apertures should not be less than 6 mils. The distance between two linked apertures should not be less than 6 mils. The width of the VCC and GND tracks should not be less than 12 mils. Each IC power source must have a decoupling capacitor located adjacent to the IC. The power supply of the RF and the MCU should be independent so as to avoid interference. The RF antenna trace should not have a ground plane so as not to affect performance, as shown in the figure. Antenna A typical application is shown in the figure below. A market available 50 SMA plug dipole patch antenna λ/4 length of copper wire, single-core wire, twisted wire Cost Down applications RF antenna Trace width=35mil,fr4 PCB material of 1mm thickness 5

6 Example: Trace Antenna W: 35mil, L:1500 mil Layout Top Overlay Bottom Overlay (mirror) 6

7 Tool Notes Use the Flash MCU ICE M1001A + D1006A, and select the CFG in the HT68F03 or HT66F03 to develop the program. If RF simulation is also required, connect the Holtek 315MHz/433MHz ASK Tx RF Module to the ICE. Execute write operations using the e-writer with Adapter CADP16NSOP-S and Hope3000 software. 7