DTV Band Micropower RF Energy-Harvesting Circuit Architecture and Performance Analysis

Transcription

1 211 IEEE International Conference on RFID-Technologies and Applications DTV Band Micropower RF Energy-Harvesting Circuit Architecture and Performance Analysis Chomora Mikeka 1, Hiroyuki Arai 2, Apostolos Georgiadis and Ana Collado 4 Graduate School of Engineering, Yokohama National University 79- Tokiwadai, Hodogaya-ku, Yokohama 24-81, Japan 1 mikeka[underscore]chomora@yahoo.co.jp 2 arai@ynu.ac.jp CTTC Parc Mediterrani de la Tecnologia (PMT), Communications Subsystems Av. Canal Olimpic s/n, Castelldefels, Barcelona 886, Spain ageorgiadis@cttc.es 4 acollado@cttc.es Abstract A design architecture for a micropower RF energyharvesting in the Digital TV (DTV) band is presented. The rectifying antenna (rectenna), given a single tone excitation at MHz, has a measured conversion efficiency of.4% for -4 dbm input and 18.2% for -2 dbm input, respectively. A DC- DC boost converter circuit is designed and fabricated to be used along with this rectenna. The DC-DC boost converter circuit is able to operate with voltages as low as 4mV DC while the measured DC-DC conversion efficiency is at least 11.%. I. INTRODUCTION DTV signals measure as low as -4 dbm in the natural environment [1] while on average, -17 dbm ( 2μW ) is measurable at some distance 6.6 km away from Tokyo tower [2]. A rectifying antenna circuit for -4 dbm incident power harvesting generates 1 mv DC at 2kΩ load, given.4% conversion efficiency. At -2 dbm incidence and at least 18.2% efficiency, over 61.7 mv DC is generated given a 2kΩ load. The generated DC power in both of these two cases is in the μw range, hence the micropower definition. To manage such micropower, power accumulation or energy storage is required. Storage devices may either be a gold capacitor, super capacitor, thin film battery or the next generation flexible paper batteries. These storage devices have specific or standard maximum voltage and trickle charging current minimum requirements. Typically, gold capacitors have voltage ratings like 2.7V DC,.V DC for 1 μa, 1 ma or 1 ma maximum discharge current ratings. On the other hand, standard ratings for batteries are 1.8V DC, 2.2V DC,.V DC and 4.1V DC. Therefore, to directly charge any of these storage devices from 1mV DC, or 61.7mV DC is impractical. Published works have demonstrated the need for a DC-DC boost converter, placed between the rectifying antenna circuit (rectenna) and the storage device stages []-[]. Recent efforts have demonstrated that a 4mV DC rectenna output voltage could be boosted to 4.1V DC to trickle charge some battery [4]. A Coilcraft flyback transformer with turns ratio equal to 1 was used in the boost converter circuit. An IC chip leading manufacturer [] has released a linear DC-DC boost converter regulator IC chip capable of boosting an input voltage as low as 2mV DC and supplying a number of possible outputs, specifically suited for energy harvesting applications. While this IC is a great milestone, readers and researchers need to understand the techniques to achieve such ICs and also the limitations that apply. In this paper, we will describe the methods toward designing a DTV band rectenna circuit and DC-DC boost converter, suitable for wide band ( MHz to 6 MHz) and intermittent micropower (-4 dbm to dbm incidence) RF energy harvesting. The proposed circuit is shown in Fig. 1. DTV antenna I in MN D1 P ZocV = Ohm in Freq =..6 GHz I Load DTV band rectifier RL V S1 I Max = I sc Vin DC-DC booster Vout >> Vin Fig. 1. Proposed DTV energy-harvesting circuit block architecture for theoretical study and measurements. MN is the matching network. I load is the load current in the fixed load condition, while I sc is the short circuit current when S1 = ON. The optimum load, R L =2kΩ. The rest of this paper is organized as follows. Section II describes the proposed DTV band antenna while the rectifier is described in Section III. The DC-DC boost converter circuit is presented and discussed in Section IV. Finally, the conclusions are drawn in Section V. II. DTV BAND ANTENNA In the design of a DTV energy harvesting circuit, several basic design requirements must be considered. First is the antenna; it must be wideband (covering 47 MHz to 77 MHz), horizontally polarized and omni-directional. Until recently, very few authors have published on DTV energy harvesting circuit. For the few publications, the antenna could not meet all those three requirements [6]. In this design, the key DTV antenna design considerations include: ultra wide band characteristic (47 MHz to 77 MHz), omni directivity, and low profile. Antenna size is relaxed, however in the future, it will be seriously considered. The proposed antenna is typically a square patch (7 mm x 76 mm) with a partial ground plane (9 mm x 1 mm). The Vout /11/$ IEEE 61

2 square patch is indirectly fed by a microstrip line (9 mm x mm). The proposed antenna geometry is shown in Fig. 2. The partial ground plane is used to achieve omni-directivity and a certain level of wide bandwidth. To tune the impedance of this antenna as well as to adjust the bandwidth within the target band, a throttle with stepped or graded structures is used between the microstrip feed line and the square patch, as shown in Fig. 2 (a). 27 [deg.] -1-2 [db] mm 76 mm 1 mm mm mm 12 mm Strip feeder mm PEC 9 mm 7 16 mm (a) Front view. (b) Back view. Fig. 2. UWB antenna able to cover the DTV band (47 MHz to 77 MHz). The antenna is printed on FR4 substrate; t = 1.6 mm, ε r =4.4. The feed strip is 1 mm x mm, while the partial ground is 9 mm x 1 mm. The input response for the proposed antenna is shown in Fig.. The omni directivity is confirmed by measurement at MHz, MHz, and 7 MHz as shown in Fig. 4. The radiation patterns shown in Fig. 4 are for the xz plane, which happens to be the vertical polarization for the antenna. DTV signals are horizontally polarized and therefore, when using this antenna, the orientation must be in such a way as to efficiently receive the DTV signal. Simply a 9 degree rotation of the antenna along the z axis achieves this requirement. S11 [db] -1-2 Frequency [GHz] PEC Fig.. The proposed DTV UWB antenna s measured input performance is presented. Evidently, a greater than - dbm input response is confirmed in the frequency band. GHz to 2. GHz. This meets the minimum requirement for DTV antenna s input performance. Fig. 4. The omni directivity is confirmed at MHz, MHz, and 7 MHz. The outermost, black solid and dotted line patterns, represent MHz and MHz directivity, respectively. The innermost dotted line pattern is the directivity at 7 MHz. The radiation patterns are for the xz plane, which happens to be the vertical polarization for the antenna. III. DTV BAND RECTIFIER In the design of DTV energy harvesting circuit, the second design consideration is the rectifier. It must also be wideband, and optimized for RF-to-DC conversion for incident or received signal power as low as -4 dbm. The DTV received signal power variation based on measurement location is shown in Table 1. The DTV received signal power spectrum is shown in Fig.. In Table 1, locations are defined as follows: No.1 = Minato-ku Kuyakusho, No.2 = Akabane-bashi, No. = Shiba-koen, No.4 = Seisoku Gakuen, No. = Osaki station, and No.6 = Tokyo station. The DTV band RF power transmitted from Tokyo tower is approximately 7 dbm (1 kilowatts). TABLE I RECEIVED DTV SIGNAL POWER BASED ON LOCATION IN TOKYO. Location No.1 No.2 No. No.4 No. No.6 From Tokyo tower (km) Received power (dbm) Until recently, very few authors have published on DTV energy harvesting circuit and for the few publications, a discussion on the performance of the harvesting circuit for ultra low power incidences has been neglected [6]. In this paper we will present such a rectenna with measured conversion efficiencies above.4% at -4 dbm, and at least 18.2% at -2 dbm signal power incidence. We will closely compare simulated and measured performance of the rectenna and discuss any observed disparities. Agilent s ADS will be used to simulate the nonlinear behaviour of the rectifying circuit based on harmonic balance tuning methods. The DTV rectifying circuit s wideband input characteristic will be achieved by the input matching inductor L and capacitor C network. Since DTV band usable channels vary depending on National Regulations, a switchable rectenna input characteristic is required to justify the universal appli- 62

3 DTV Received Signal [dbm] Shiba-koen Osaki station Tokyo station Frequency [MHz] Fig.. Typical DTV received signal power spectrum measurement around Tokyo tower. S11 [db] -1 Pin = -4 dbm (fc= MHz opt.) Pin = -4 dbm (fc=6 MHz opt.) Frequency [GHz] Fig. 7. This input reconfiguration targets to specific center frequencies namely; f c = MHz for Tokyo and f c = 6 MHz for Yokohama. cability of our proposed circuit, and we will also demonstrate this capability. A. Switchable rectenna input characteristic To switch the rectifier s input response, UWB LC matching components are tuned. The circuit for this investigation is shown in Fig. 6. V in pf 1. pf Ω 1 pf 1 nh L BW nh 1 pf 1 pf L s nh D1 I Load RL kω V S1 I Max = I sc Fig. 6. Rectenna circuit configuration showing the UWB LC matching circuit. Input response tuning is achieved by L BW and L s where 1nH L BW 2nH and 41nH L s 47nH. DTV band RF survey in Yokohama City shows high DTV received signal level around MHz and around 648 MHz. Whereas in Tokyo City, the DTV received signal is strongest only at and or above MHz and below 6 MHz. As such, This input reconfiguration is targetted to specific center frequencies namely; f c = MHz for Tokyo and f c = 6 MHz for Yokohama. The switched or reconfigurable input response is illustrated in Fig. 7. B. Rectenna conversion efficiency results In Fig. 6, the voltage measured across the load, R L is the rectified output voltage, V out. Therefore, the output DC power, P DC across the rectenna load is calculated by P DC = V out I Load (1) and the rectenna RF-to-DC conversion efficiency is calculated by η = 1P DC (2) P in where P in is in Watts. The measured conversion efficiency, η(%) is wideband as shown in Fig. 8 (a) and increases with input power in a logarithmic fashion, Fig. 8 (b). The calculated results are higher than the measurement results, and we owe it to fabrication errors, but also the fact that ports, connector and cable effects are not included during calculation. The optimum rectenna load, R Lopt is around 2kΩ as shown in Fig. 9. IV. DC-DC BOOST CONVERTER DESIGN THEORY AND OPERATION The DC-DC boost converter design theory and actual implementation are presented in this section. If we consider Fig. 1, V in V out defines the boost operation. In this paper, our boost converter concept is illustrated in Fig. 1. A small voltage, V in is presented at the input of the boost converter inductive pump which as a result, generates some output voltage, V out. The output voltage is fedback to provide power for the oscillator. The oscillator generates a square wave, Fosc that is used for gate signaling at the N-MOSFET switch. The drain signal of the N-MOSFET is used as the switch node voltage, V sn at the anode of the diode inside the boost converter circuit block. From the concept presented in Fig. 1, the actual implemented circuit is shown in Fig. 11. The circuit was designed in Agilent s ADS and fabricated for investigation by measurement. A. Boost converter circuit design theory The circuit in Fig. 11 is proposed for investigation. Since a DC-DC boost converter is supposed to connect to the 6

4 2 4 RF-to-DC Efficiency [p.c] 1 1 RF-to-DC Efficiency [p.c] Frequency [GHz] (a) Frequency sweep (Mea). Fig Rectenna Load, RL [k Ohms] Rectenna load, R L versus RF-to-DC conversion efficiency, η(%). Efficiency [p.c] Cal. Mea. V in I in f in = 1 MHz for HB Simulation DC-DC booster L (μh) Switch (N-MOSFET) OSC Vout Pin [dbm] (b) Pin sweep (Mea vs. Cal). Fig. 8. Conversion efficiency. For Pin sweep, the frequency is MHz while for Frequency sweep, Pin is -2 dbm. rectenna s output, itself therefore, becomes the load to the rectenna circuit. This condition therefore demands that the input impedance of the boost converter circuit emulates the known optimum load of the rectenna circuit. This has the benefit of ensuring maximum power transfer and hence higher overall conversion efficiency from the rectenna input (RF power) to the boost converter output (DC power). In this investigation, as shown earlier the optimum load for the rectenna is around 2kΩ. In general, emulation resistance R em is given by R em = 2 L T t 2 1 k ( ) M 1 where L is the inductance equal to μh as shown in Fig. 11, M = V out /V in, T is the period of Fosc, t 1 is the switch ON time for the N-MOSFET, and k is a constant M () Fig. 1. Proposed boost converter concept diagram. that according to [] is a low frequency pulse duty cycle if the booster is run in a pulsed mode and typically, k may assume values like.6 or.48. With reference to (), we select L as the key parameter for higher conversion efficiency while Vin=.4V DC is selected as the lowest startup voltage to achieve oscillations and boost operation. Computing the DC-DC boost conversion efficiency against different values of L, we have results as shown in Fig. 12. From the results, L = 1μH is the optimum boost inductance that ensures atleast 1% DC-DC conversion efficiency. However of great interest is L = 8μH, which is rather uncharacteristic but does result into over 66% DC-DC conversion efficiency. This observation is subject to further investigation. The next consideration is the selection of the boost load resistor value, R L. To achieve this objective, Vin=.4V DC is set as before, and L = 8μH is the optimum inductance. The computed DC-DC boost conversion efficiency against different values of R L is shown in Fig. 1. The results reveal R L =.6kΩ as the optimum load. Now having selected the optimum values for boost inductance and load resistance, the emulation resistance in Fig. 14 is evaluated from the voltage versus current ratio in the 64

5 I in V in L = μh BAT4W 22 μf 4.7 μf Fosc V sn Si16 (N-MOSFET) Pin 8 Pin LTC I Load R L =.6 (kω) V out DC-DC Efficiency [p.c] Booster Load, RL [k Ohms] 1 MΩ 1 MΩ kω C = tmr 2 pf Fig. 11. Proposed boost converter circuit. Designed in Agilent s ADS and fabricated for investigation measurement. Fig. 12. DC-DC Efficiency [p.c] Boost Inductance, L [uh] Boost inductance variation with DC-DC conversion efficiency. simulation corresponding to Fig. 12, and Fig. 1. The results show a constant value against varying inductance, except at L = 8μH where we notice a drop in value below 7Ω. In general, we can say that this boost converter circuit has a constant low input impedance around 8Ω. This impedance is two small to match with the optimum rectenna load at 2kΩ. This directly affects the overall RF-to- DC conversion efficiency. Another factor, which affects the overall conversion efficiency is the power lost in the oscillator circuit. Unlike the circuit proposed in [], which uses two oscillators; a low Fig. 1. Boost converter load resistance variation with DC-DC conversion efficiency. Fig. 14. Emulation Resistance [Ohms] Booster Inductance, L [uh] Boost converter s input impedance: the emulation resistance. frequency (LF) and high frequency (HF) oscillator; in Fig. 11, we have attempted to use a single oscillator based on the LTC14 comparator externally biased as an astable multivibrator. The power loss in this oscillator is the difference in the DC power measured at Pin 7 (supply) to the power measured at pin 8 (output). We term this loss, L osc and is basically converted to heat or sinks through the 1MΩ load. A comparison of the oscillator power loss to the power available at the booster output is shown in Fig. 1. Looking at Fig. 1; we notice that the power loss depends on whether the oscillator output is high or low. The low loss corresponds to the quiescent period where the power lost is almost negligible. However, during the active state, the lost power (power consumed by the oscillator) nearly approaches the DC power available at the boost converter output. This results in low operation efficiency. 6

6 DC Power [mw] Fig. 1. Booster output power Oscillator power loss Quiescent loss Time [msec] Power loss in the oscillator. B. Measurement performance results To confirm whether or not the circuit of Fig. 11 works well, we did some measurements and compared them with the calculated/simulation results. Unlike in simulation, during measurement, L = μh was used due to availability. All the other components remained the same. In Fig. 16 (a) and (b), we see in general that the input voltage is boosted and also that the patterns of Fosc and V sn are comparable both by simulation and measurement. To control the duty cycle of the oscillator output (F osc ), and the level of ripples in the boost converter output voltage (V out ), we change the value of the timing capacitance, C tmr in the circuit of Fig. 11. Simulations in Fig. 16 (a) show that C tmr = 2pF realizes a better performance i.e. nearly constant V out level (very low ripple). General observations are that it is difficult to achieve low start up voltages like 61.7mV DC (at -2 dbm incidence and at least 18.2% rectenna efficiency) with this kind of boost converter circuit topology. Self starting is an issue for this topology at very low voltages. Another observation is that the boosted voltage varies with input almost in a linear fashion. To be sure with our investigations, another circuit with measured performance as shown in Fig. 17 was fabricated and measured. At least 11.% DC-DC conversion efficiency was recorded and is comparable to the calculation in Fig. 12. During measurement it was clearly revealed that the boost converter efficiency does depend on the value of L and the duty cycle derived from t 1. To efficiently simulate the complete circuit of Fig. 1, from the RF input to the DC output, envelope transient simulation (ENV) is used. The (ENV) tool is much more computationally efficient than transient simulation (Tran). This simulation is appropriate for the boost converter circuit s resistor emulation task. Moreover, the boost converter s DC-DC conversion efficiency, and the overall RF-to-DC conversion efficiency can be calculated at once with a single envelope transient simulation. Voltage [V] Voltage [V] Fig. 16. Voltage [V] Vin (Low input voltage) Fosc, Ctmr = 2 pf Fosc, Ctmr = 82 pf Vsn, Ctmr = 2 pf Vsn, Ctmr = 82 pf Vout, Ctmr = 2 pf Vout, Ctmr = 82 pf Time [msec] (a) Simulation. Fosc (Gate Signal) Vsn (Switching signal) Vout (Boosted voltage) Vin (Low input voltage) Time [microsec] (b) Measurement. Voltage characteristics of the boost converter circuit Fosc (Gate Signal) Vsn (Switching signal) Vout (Boosted voltage) Vin (Low input voltage) Time [microsec] Fig. 17. Measured voltage characteristics for the 2nd boost converter circuit. DC-DC boost conversion efficiency of about 11.% was measured. 66

7 V. CONCLUSIONS This paper has firstly, presented a rectenna circuit which has measured RF-to-DC conversion efficiency equal to 18.2% given -2 dbm, MHz single tone excitation. The rectified voltage given a MHz single tone excitation in the range -4 dbm to -1 dbm is between.9mv DC and 14mV DC, respectively. Secondly, a boost converter circuit is presented. Though, not capable to operate for voltages as low as 14mV DC, the proposed boost converter has by simulation and measurement demonstrated capability to boost voltages as low as 4mV DC, sufficient for battery or capacitor recharging, assuming that the battery or the capacitor has some initial charge or energy enough to provide start-up to the boost converter circuit herein proposed. It is also important to mention that the rectenna circuit herein proposed has the capacity to rectifyupto.46v DC given multi-tone excitation and power incidence of - 7 dbm; recently demonstrated near Tokyo tower. The limitations of our proposed boost converter circuit include; low efficiency, lack of self starting at ultra low input voltages, and unregulated output. To address these limitations, circuit optimization is in progress. Moreover, alternative approaches which employ a flyback transformer to replace the boost converter inductance are being investigated. Finally, a regulator circuit with Low Drop Out (LDO) will be investigated to fix the boost converter output voltage commensurate with standard values like 2.2V DC for example. The overall circuit efficiency once determined shall be the index for the proposed circuit s performance evaluation or appraisal. For some power density denoted by S RF, where S RF =μw/cm 2, we expect an optimal RF-to-DC conversion efficiency greater than 14.7%, DC-DC boost converter efficiency in excess of 7.2% and an P overall proposed system efficiency ( harvest P RFincident ) greater than 9.6%. REFERENCES [1] C. Mikeka and H. Arai, Dual-Band RF Energy-Harvesting Circuit for Range Enhancement in Passive Tags, EuCAP Proc., pp , Rome, 11-1 April, 211. [2] H. Nishimoto, Y. Kawahara and T. Asami, Prototype implementation of ambient RF energy harvesting wireless sensor networks, Sensors, 21 IEEE, vol., no., pp , 1-4 Nov. 21 [] Z. Popovic et al., Resistor Emulation Approach to Low-Power RF Energy Harvesting, IEEE Trans. Power Electronics, VOL. 2, NO., 28. [4] H.Yu,H.WuandY.Wen,An Ultra-low Input Power Management Circuit for Indoor Micro-light Energy Harvesting System, IEEE Sensors Proc., 21. [] D. Salerno, Ultralow Voltage Energy Harvester Uses Thermoelectric Generator for Battery-Free Wireless Sensors, LT Journal, Analog Innovation, VOL. 2, NO., Oct. 21. [6] M. Tentzeris, H. Nishimoto, Harvesting RF Energy with a Paper-based Rectenna, EuCAP Proc., Convened Papers, pp86-87, Rome, 11-1 April,