Cochlear implants (CIs), or bionic

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1 i m p l a n t a b l e e l e c t r o n i c s A Cochlear-Implant Processor for Encoding Music and Lowering Stimulation Power This 75 db, 357 W analog cochlear-implant processor encodes finephase-timing spectral information in its asynchronous stimulation outputs to convey music to deaf patients Ji-Jon Sit Advanced Bionics Rahul Sarpeshkar Massachusetts Institute of Technology Cochlear implants (CIs), or bionic ears, restore hearing in profoundly deaf (greater than 9 db hearing loss) patients They function by transforming frequency patterns in sound into corresponding spatial electrode-stimulation patterns for the auditory nerve Over the past years, improvements in sound-processing strategies, in the number of electrodes and channels, and in the rate of stimulation have yielded improved sentence and word recognition scores in patients 1 Nextgeneration implants will be fully implanted inside the patient s body Consequently, power consumption requirements for signal processing will be very stringent The processor we discuss in this article is intended for use in such next-generation implants It can operate on a 1 ma-hr battery with a 1, charge-and-discharge cycle lifetime for 3 years, while allowing nearly 1 mw of electrode-stimulation power It provides more than an order-of-magnitude power reduction over an A/D-then-DSP (analog/digital, then digital signal processor) solution, which often consumes 5 mw or more Our processor s digital outputs, its immunity to power-supply noise and temperature variations, and its high programmability level ensure ease of use with an implant system s other parts, such as the wireless communication link and the programming interface CI users and music perception A common speech-processing strategy, used in implants and speech-recognition systems, employs a mel-cepstrum filter bank with eight to channels The mel scale maps frequencies to a perceptually linear scale Filter banks based on the mel scale use linearly spaced filter center frequencies of up to 1 KHz and logarithmically spaced center frequencies above 1 KHz (The center frequency is the frequency of maximum response in a bandpass filter output) Ubiquitous cepstral techniques use a logarithmic measure of the spectral energy in each filter bank channel for further processing Implants also use eight to functioning electrodes for stimulation; because of spatial interactions among the electrodes, having more electrodes is often not useful Compared to normal-hearing listeners, deaf patients who use a cochlear implant have only a very limited ability to perceive music 3 In an earlier work, we showed that a low-power algorithm providing asynchronous interleaved sampling () in cochlear implants is wellsuited for encoding fine-phase-timing information The ability to encode such information is PERVASIVE computing Published by the IEEE CS n 153-//$5 IEEE

2 important for music perception by CI users, 5 because even the best-performing CI users appear unable to use more than seven to 1 channels of spectral information A recent study of two stimulation strategies that don t include fine-phase-timing information the Advanced Combination Encoder (ACE) and Spectral Peak (Speak) strategies confirms that music appreciation is less than satisfactory even with the latest implants 7 Consequently, researchers have recently proposed several strategies, in addition to, for delivering finephase-timing information in CI stimulation These include frequency amplitude modulation encoding (FAME) and peak-derived timing (PDT) 9 However, none of these have successfully presented fine-phase-timing information to CI users in a way that can improve music perception Hence, further tests on CI users are necessary to investigate each technique s efficacy Our -channel cochlear-implant processor implements our earlier algorithm This processor moves the strategy a step closer to testing on CI users It is suitable for encoding music, and it operates with very low power consumption because of its use of analog processing techniques 1,11 The algorithm allows high-rate sampling of high-intensity channels while maintaining a low average rate of sampling for all channels, thus allowing lower stimulation power as well Analog versus digital We estimate that an A/D-then-DSP implementation of traditional cochlearimplant processing would use about 5 mw to 5 mw for the microphone front end and A/D converter, and use 5 W/MIP MIPS = 5 mw for the other processing, yielding a total power consumption of about 55 mw These numbers are representative of state-ofthe-art cochlear-implant processing, although many commercial processors power consumption is significantly worse because of various system inefficiencies The power consumption for stimulation can range from 1 mw to 1 mw, depending on the patient and stimulation strategy Our algorithm s digital implementation, unlike that of a traditional processing algorithm, will likely be extremely power hungry, owing to its need for asynchronous processing and high-speed sampling of certain channels Our analog, 357 W processor can improve performance, reduce processing power consumption by more than an order of magnitude, and significantly lower stimulation power consumption This processor makes a fully implantable system feasible and practical Thanks to the use of analog processing, its effective computational efficiency is between 1 W/MIP and 5 W/MIP in a 15 m process This is considerably better than even the most power-efficient DSPs, dominated by switching capacitance only in the DSP core, implementing their most favorable applications, and implemented in an advanced submicron process The effective computational efficiency for such DSPs is between 5 W/MIP and 1 W/MIP Needless to say, the efficiency for DSPs will continually improve with Moore s law, but such improvements are increasingly more modest Even if we generously assume that the power consumption of the DSP is actually zero at the end of Moore s law, the power consumption of a very low-power microphone front end, anti-alias filter, and A/D converter would still likely exceed 357 W Moreover, A/D scaling in speed, power, and precision is far slower than Moore s law, and some s in our analog implementation could also benefit from these improvements A custom digital solution would certainly narrow the gap between a DSP s and our processor s power consumption, but the high cost of the A/D converter, the microphone, and the asynchronous processing in the digital domain would still give our analog processor a significant advantage It s useful to understand why our processor operates more efficiently than an A/D-then-DSP implementation An A/D converter immediately creates a representation of the incoming information as a series of relatively highprecision and high-speed numbers ( bits at KHz is typical in such applications) that by themselves carry very little meaningful information This digitization consumes considerable power because doing any task with high speed and high precision is expensive (High precision is necessary if an operation Our cochlear-implant processor operates with very low power consumption because of its use of analog processing techniques requires a wide dynamic range and all computations, including gain control, are performed in the digital domain High speed is necessary to avoid aliasing) Then, a DSP takes all these numbers and crunches them with millions of multiply-accumulate operations per second, burning power in several switching transistors It finally extracts more meaningful log spectral-energy information but, because of speech data s JANUARY MARCH PERVASIVE computing 1

3 implantable electronics HWR filter output Spike output Capacitor voltage Inhibition current 1 1 Channel no 1 Channel no (a) (b) Figure 1 Matlab simulation of the asynchronous interleaved sampling () algorithm: (a) the half-wave-rectified (HWR) filter outputs as inputs to the algorithm (dashed black lines) and the spike outputs (solid red lines); (b) the algorithm s internal state variables, including the neuronal capacitor voltage (solid blue) and the inhibition current (dashed green) The algorithm turns on an inhibition current as soon as a spike (pulse) fires high variability, at a far slower rate of 1 Hz to 1 KHz in parallel bands and at -bit-to--bit precision In contrast, analog preprocessing lets our processor efficiently compress the incoming data such that low-speed and low-precision A/D converters at a later stage of the computation quantize the meaningful information Some of our prior work analyzes the optimal point for digitizing information in more general systems 1 Too much analog preprocessing before digitization is inefficient because the costs required to maintain precision begin to rise steeply Too little analog preprocessing before digitization is inefficient because the digital system ignores analog degrees of freedom that can be exploited to improve computational efficiency Analog systems are more efficient than digital systems at low output precision, whereas digital systems are more efficient than analog systems at high output precision 1 In our processor, the output precision in each channel is 7 bits, and we intentionally limited the maximum output firing rate to 1 KHz, to lower stimulation power and to avoid a firing rate in the auditory nerve that is limited to the refractory period of recovery (when the nerve is overstimulated at a rate that is too high) Our processor s internal dynamic range (IDR) is near 55 db, with gain control allowing 75 db of input dynamic range An analog solution can therefore compete with a digital solution if the entire system maintains the necessary precision If a task required 1 bits of output precision, 7 db IDR and 1 KHz bandwidth at each channel, the A/Dthen-DSP strategy would definitely be more efficient than our solution An analog solution must preserve its efficiency advantage by carefully monitoring robustness (that is, immunity or insensitivity to process variation, power supply noise, crosstalk between signals, and pickup of other interfering noise sources) Such robustness need not be present in every device and every signal, as in a digital solution, but only at important locations in the signal-flow chain, where it truly matters Our processor is robust in the face of power-supply noise, thermal noise, temperature variations, and transistor mismatches, owing to its use of feedforward and feedback calibration s, robust biasing techniques, and careful analog design Thus, an analog system addresses the robustness-efficiency trade-off very differently than a digital system does Programmability is certainly not as great in an analog system as in a digital one However, as in our case, this is less of an issue when implementing an algorithm that s known to work Our processor s programmability of 5 parameters with 5 bits allows sufficient but not excessive programmability Our processor s efficiency is high because it exploits the transistor s analog degrees of freedom for computation without treating it as a mere switch The algorithm This algorithm uses half-wave-rectified (HWR) and phase-locked current outputs from spectral-analysis channels to charge an array of neuronal capacitors that compete with one another in a race-to-spike paradigm: The first neuron to reach a fixed voltage threshold wins the race and gets to fire a spike PERVASIVE computing wwwcomputerorg/pervasive

4 Bandpass filter channel 1 Envelope detector Log A/D 7 bits at 1 KHz Tristates FG339 Microphone Preamplifier 75 db overall dynamic range 55 db internal dynamic range Broadband automatic gain control Bandpass filter channel Bandpass filter channel HWR magnitude Envelope detector HWR magnitude Envelope detector Log A/D Log A/D V o1 output pulse 7 bits at 1 KHz V o output pulse 7 bits at 1 KHz Tristates Tristates Output bus HWR magnitude V o output pulse Figure The processor The FG339 microphone picks up sound, which goes through a preamplifier and then to a broadband automatic gain control (AGC) The AGC compresses this sound and converts the input dynamic range of 75 db to an internal dynamic range of 55 db A bank of bandpass filters then filter the AGC s compressed output Envelope detectors perform rectification and peak detection on the filter outputs to create inputs for the and log A/D (analog/digital) blocks, respectively The then generates the asynchronous timing events, while the log A/D converter digitizes the envelope of each channel (pulse) Thus, the algorithm prevents simultaneous channel stimulation, to avoid spectral smearing through electrode interactions 13 Once a spike fires, all the capacitors reset, and the race to spike begins again, except that the algorithm applies a negative current to the neuron that just spiked, to inhibit it from winning in subsequent races This inhibition current remains active for the duration of a predetermined relaxation time constant The algorithm thereby enforces a minimum interspike interval, which the relaxation time constant sets This prevents the maximum stimulation rate from ever exceeding the refractory rate of neuronal recovery, which would otherwise cause unnatural distortions in the temporal discharge patterns of cochlear implants However, stimulation is not constrained to fire only at the maximum rate The algorithm naturally adapts the stimulation rate (effectively, the rate at which the algorithm samples the input) in both time and spectral space to the signal s information content, so that the processor doesn t spend any power during quiet periods or on quiet channels Therefore, high-intensity channels win the race to spike more frequently and are sampled at a high phase-encoded rate, whereas low-intensity channels win less frequently and are sampled at a lower phase-encoded rate This adaptable stimulation rate lowers the average stimulation power and allows more natural, asynchronous stimulation of the auditory nerve Figure 1 shows a Matlab simulation of the algorithm on a segment of speech The processor Figure shows a block diagram of the processor, which implements the algorithm, building on our prior work 1,11 We modified the envelope detector in our prior work so that it could quickly output HWR currents to the When a spike fires, the spike activates tristate buffers within the winning channel to report the log envelope amplitude as a 7-bit digital number onto a common output bus, thus providing both amplitude information and fine-phase-timing information in a single output event The only constraint on the rate of spikes arriving from multiple channels onto the output bus is that they not overlap Hence, our -channel analog processor provides high temporal resolution, without the need for a high-rate sampling clock that constantly runs whether or not events occur Figure 3 shows a -channel, voltage-mode winner-take-all (WTA) that forms the s core by detecting the first channel whose neuronal state variable, V ix, crosses a fixed voltage threshold, V thresh (Throughout our description, the letter x in a signal variable denotes the signal variable corresponding to a channel with a channel number x The value of x can range from 1 to ) Output voltage V ox goes high only in the winning channel, thereby suppressing all other channel outputs from rising by pulling up strongly on the common source voltage V s through positive feedback in the JANUARY MARCH PERVASIVE computing 3

5 implantable electronics T 13 T 1 Vi1 T 11 T 1 T 15 T 3 T T 3 T V pcasc V o1 V i V s V Channel 1 T 11 Channel T 115 T 1 loop of transistors T x, T x3, T x, and T x5 The current sink gate voltage V sink, which falls in the vicinity of a threshold crossing, reduces the pull-down current from all the T x15 transistors This action T V pcasc T 5 Figure 3 The voltage-mode winnertake-all (WTA) that implements the algorithm l in Translinear current gain T x T x1 l T x3 T x1 C in T x l o V ix T x5 T x1 T x9 V inhth T x11 T x3 T x T x1 T x3 T x33 l pota V hx T x3 V o T 15 V thresh T 1 I b V ncasc l a + l r T x31 V ax T x T x C r T 1 V rx V pcasc V sink T5 T 15 enhances the s positive-feedback loop gain, making it greater than that of an earlier voltage-mode WTA that Gert Cauwenberghs and Volnei Pedroni described 1 T x7 T x13 T x T x5 V ox V s T x1 T x15 Reset Figure One channel of the, with the attack-and-release sub shown in bold V pcasc l r V ncasc V sink When a channel wins and V ox rises, signaling an asynchronous firing event, a method of setting a one-shot pulse width on V ox is required It s also necessary to immediately inhibit the winning channel from firing again until after an absolute refractory period Figure shows a single channel of the The attack-and-release sub (shown in bold in the figure), defines both V ox pulse width T a and the absolute refractory period of inhibition T r immediately after a pulse fires This sub works as follows: A twotransistor superbuffer of cascaded n and p source followers (T x7 and T x in figure ) is biased with a large pullup current I a and a small pull-down current I r By design, the superbuffer output voltage V ax initially sits below comparator input threshold voltage V inhth, so comparator output voltage V hx is low, and devices T x1 and T x11 are off At the rising edge of V ox, V ax initially undershoots because T x7 shorts out the threshold drop on T x such that V ax falls to approximately the value of the release voltage V rx Current I a then charges up the release capacitor C r, and V ax ramps up from a minimum value until it crosses V inhth and causes V hx to go high, turning on T x1 and T x11 and terminating the pulse by pulling V ox low again Fixing C r and V inhth lets us make pulse width T a programmable by varying I a The pulse width s programmability is necessary to accommodate different time profiles for charge transfer in each stimulation event Turning on T x1 and T x11 pulls V ox low and inhibits input voltage V ix from rising Upon the falling edge of V ox, T x7 shuts off, causing V ax to step back up to a threshold drop above V rx V ax then follows V rx, which ramps down as I r discharges C r The inhibition from V hx, therefore, remains high until V ax falls below V inhth again, and the time PERVASIVE computing wwwcomputerorg/pervasive

6 Figure 5 Measured chip waveforms showing the range of programmability in the : (a) superbuffer output voltage V a waveforms with increasing pulse width T a and absolute refractory period of inhibition T r, where I a is the pull-down current and I r is the pull-up current; (b) input voltage V i waveforms with increasing current gain A, where I 3 is the parameter used to set A it takes to do so sets T r, programmable by varying I r Programmability in T r is necessary to enforce a minimum interpulse interval, which prevents a channel that has just won the race from immediately winning again This programmability is also necessary for setting a minimum refractory period, which allows the auditory nerves stimulated by the winning channel to recover To perform pre-emphasis or equalization across channels, which might be necessary due to patient variability or fabrication offsets, a translinear input stage programs the effective threshold in each channel by varying the current gain, A, applied to each input Rather than fixing A and varying V thresh across channels, we equivalently fix V thresh and vary A Because PMOS (p-channel metal-oxide semiconductor) devices T x1, T x, T x3, and T x are biased below threshold, the translinear loop yields output current I o as I in (I /I 3 ); thus, A = I /I 3, and we make A programmable by fixing I and varying I 3 The algorithm requires resetting all input capacitors, C in, to ground whenever a stimulation pulse is generated A reset digital signal, which is a Schmitt-triggered, buffered version of analog signal V s, accomplishes this resetting Thus, C in discharges through T x9 when V s goes high, for a stimulation pulse s duration We program I a, I r, and I 3 using 3-bit current D/A converters Figure 5 shows the range of programmability in the from measured chip waveforms The chip has a total of 5 programmable (a) Superbuffer output, V a (V) Capacitor voltage, V i (V) (b) V inhth = 11 V l a =, l r = 7 l a = 3, l r = 5 l a = 5, l r = 3 l a =, l r = 1 1 T a T r Time (ms) = = 3 = = 5 = 7 3 Time (ms) bits, allowing the adjustment of 5 spectral-analysis and parameters through a three-wire serial peripheral interface We employed robust biasing of D/A currents, immune to both power supply noise and temperature, as described in our earlier work 1,11 Performance comparisons We played various sound clips from the computer into the processor, and we recorded the asynchronous stimulation pulses along with their 7- bit log envelope values One of these clips, taken from Handel s Messiah, was analyzed by a bandpass filter bank in Matlab that was mathematically equivalent to the filters on the chip Figure a shows this clip as a spectrogram Figure b shows the asynchronous spike pulses scaled by the log envelope energy, which we reconstructed into a continuous-time signal (shown in figure c) using low-pass filtering As the spectrograms show, the chip reconstruction matches the ideal Matlab simulation very well Figure 7 compares the performance V thresh = 11 V 1 1 Reset 1 1 of the processor (tested with various speech and music sound clips), an ideal Matlab simulation, and a traditional non-phase-based tone-vocoding simulation representing continuous-interleaved-sampling (CIS) synchronous stimulation The tonevocoding simulation represents only a traditional CIS strategy; to achieve higher performance, most modern cochlear implants implement more sophisticated strategies, which could be based on CIS 7 or on some other sampling technique 9 Nevertheless, cochlear implant simulations are still helpful for normal-hearing listeners to gauge the best possible outcomes in CI users The reason is that electrical stimulation creates many artificial problems, such as cross-fiber synchrony and perceptual dissonance, 15 that don t exist in natural acoustic stimulation In Figure 7a, we correlated the sound reconstruction (given by the summation of all channels) with the original sound signal, and the vertical bars represent the correlation coefficient, r A high correlation coefficient between JANUARY MARCH PERVASIVE computing 5

7 implantable electronics 1 Channel no 1 1 (a) N= N= N = 137 N = 77 N = N = 5 N = 7 N = 1,5 N = 1,9 N = 1,3 N = 99 N = 75 N = 1 N = N = 31 N = 95 1 Channel no 1 1 (b) r = NaN r = NaN r = 1 r = 3 r = r = 15 r = r = 39 r = 11 r = r = 5 r = 57 r = r = 31 r = r = 1 Channel no 1 1 (c) f =, Hz f = 5,1 Hz f =,13 Hz f = 3, Hz f =,595 Hz f = 1,93 Hz f = 1,55 Hz f = 1,33 Hz f = 1,13 Hz f = 933 Hz f = 739 Hz f = 5 Hz f = Hz f = 35 Hz f = Hz f = 13 Hz P ER VA SI V E computing Figure Spectrograms comparing (a) an ideal Matlab simulation of the bandpass filter outputs in each channel, where f indicates the center frequency of each filter; (b) asynchronous spike outputs from the processor, where N is the number of spikes recorded in that channel; (c) spike-reconstructed filter outputs from the processor, where r shows the correlation coefficient of each channel ranging from to 1, or NaN (meaning not a number, resulting from N in that channel being ) Note that fine phase-timing information is preserved (Sound source: s of the Hallelujah chorus from Handel s Messiah) the reconstruction and original sound captures the fidelity of both envelope and fine-phase-timing preserved in the signal A high correlation coefficient can also predict a normal-hearing listener s increased ability to recognize words and music while listening to a reconstruction The processor s correlation coefficients are comparable to those from the M atlab simulation Thus, the processor, unlike traditional CIS, encodes fine-phasetiming information, which is necessary for preserving music Figure 7b compares the average firing rate (AFR) of the processor, the ideal M atlab simulation, and the CIS tone-vocoding simulation The CIS stimulation rate is the fixed rate at which a conventional CIS processor samples the envelope of each analysis channel In practice, clinicians typically set this fixed rate to between Hz and 5 KHz and then adjust it to maximize performance1 So, for comparison purposes, we chose a rate of KHz in figure 7b achieves a lower AFR than conventional CIS, without compromising signal fidelity; in fact, increases this fidelity Hence, the processor demonstrates that adapting the sampling rate to the signal s needs can substantially save stimulation power This benefit comes at the cost of increased signal-processing wwwcomputerorg/pervasive

8 Coefficient of correlation with original sound, r Average firing rate (Hz), 1, 1, 1, 1, 1, (a) die buy Handel chorus Sound clip Jazz Blues Beethoven symphony processor MATLAB simulation CIS tone-vocoding simulation (b) die buy Handel chorus Sound clip Jazz Blues Beethoven symphony Figure 7 Performance comparison between the processor outputs, an ideal simulation in Matlab, and a traditional tonevocoding simulation representing traditional synchronous continuous-interleaved-sampling (CIS) stimulation that doesn t preserve phase information: (a) coefficients of correlation between signal reconstruction and original sound using each method; (b) average rates of stimulation using each method Power-supply-immune biasing Automatic gain control Microphone preamplifier Figure Die photo of the processor, showing the various blocks output tristates output tristates power However, in our analog implementation with the processor, the increase is a modest W (or W per channel) over our analog CIS processor, which consumes 51 W 1 Figure shows a die photo of the 93 mm 95 mm processor, with labels describing the various blocks The entire processor, built in a 15 m process, consumes 357 W This is very efficient compared to typical A/D-then-DSP cochlear-implant processors, which often consume 5 mw or more Log A/D Bandpass filters Envelope detectors Local bias distribution s Log A/D The processor demonstrates an example of how simple analog -building blocks can help implement a complex signal-processing JANUARY MARCH PERVASIVE computing 7

9 implantable electronics the Authors Ji-Jon Sit is an RFIC and systems engineer at Advanced Bionics He completed the work described in this article while pursuing his PhD at the Massachusetts Institute of Technology His research interests focus on emerging cochlear implant technology He received his PhD in electrical engineering from MIT Contact him at Advanced Bionics Corp, 17 San Fernando Rd, Sylmar, CA 913 Rahul Sarpeshkar heads a research group on Analog VLSI and Biological Systems on the faculty of the Electrical Engineering and Computer Science Department at the Massachusetts Institute of Technology His research interests include analog and mixed-signal VLSI, biomedical systems, ultralow-power s and systems, biologically inspired s and systems, molecular biology, neuroscience, and control theory He received his PhD in computation and neural systems from the California Institute of Technology He is an associate editor of IEEE Transactions on Biomedical Circuits and Systems Contact him at Massachusetts Inst of Technology, 77 Massachusetts Ave, Cambridge, MA 139; rahuls@mitedu Cochlear Implants that Encodes Envelope and Phase Information, IEEE Trans Biomedical Eng, vol 5, no 1, 7, pp ZM Smith, B Delgutte, and AJ Oxenham, Chimaeric Sounds Reveal Dichotomies in Auditory Perception, Nature, 7 Mar, pp 7 9 LM Friesen et al, Speech Recognition in Noise as a Function of the Number of Spectral Channels: Comparison of Acoustic Hearing and Cochlear Implants, J Acoustical Soc of America, vol 11, no, 1, pp IEEE THE #1 ARTIFICIAL INTELLIGENCE MAGAZINE! algorithm with minimal resources of power and silicon area In this example, the implemented algorithm is one that encodes music and lowers stimulation power, making fully implanted cochlear implants with good performance possible Future work needs to combine work such as ours with other improvements to allow fully implanted systems to enter clinical practice These improvements include lowering electrode impedances to further reduce stimulation power, improving the performance of implantable microphones to a level that is comparable to highquality external microphones, and reducing spectral and temporal smearing due to current-spreading interactions among electrode channels References 1 PC Loizou, Mimicking the Human Ear, IEEE Signal Processing Magazine, vol 15, no 5, 199, pp JW Picone, Signal Modeling Techniques in Speech Recognition, Proc IEEE, vol 1, no 9, 1993, pp HJ McDermott, Music Perception with Cochlear Implants: A Review, Trends in Amplification, vol, no,, pp 9 J-J Sit et al, A Low-Power Asynchronous Interleaved Sampling Algorithm for IEEE Intelligent Systems delivers the latest peer-reviewed research on all aspects of artificial intelligence, focusing on practical, fielded applications Contributors include leading experts in Intelligent Agents The Semantic Web Natural Language Processing Robotics Machine Learning Visit us on the Web at wwwcomputerorg/intelligent 7 V Looi et al, Comparisons of Quality Ratings for Music by Cochlear Implant and Hearing Aid Users, Ear and Hearing, vol, no, 7, pp 59S 1S K Nie, G Stickney, and F-G Zeng, Encoding Frequency Modulation to Improve Cochlear Implant Performance in Noise, IEEE Trans Biomedical Eng, vol 5, no 1, 5, pp 73 9 AE Vandali et al, Pitch Ranking Ability of Cochlear Implant Recipients: A Comparison of Sound-Processing Strategies, J Acoustical Soc of America, vol 117, no 5, 5, pp R Sarpeshkar et al, An Analog Bionic Ear Processor with Zero-Crossing Detection, Proc IEEE Int l Solid-State Circuits Conf (Isscc 5), IEEE Press, 5, pp R Sarpeshkar et al, An Ultra-Low- Power Programmable Analog Bionic Ear Processor, IEEE Trans Biomedical Eng, vol 5, no, 5, pp R Sarpeshkar, Analog Versus Digital: Extrapolating from Electronics to Neurobiology, Neural Computation, vol 1, no 7, 199, pp BS Wilson et al, Better Speech Recognition with Cochlear Implants, Nature, 1 July 1991, pp G Cauwenberghs and VA Pedroni, A Charge-Based CMOS Parallel Analog Vector Quantizer, Proc Advances in Neural Information Processing Systems 7 (NIPS 9), MIT Press, 199, pp GE Loeb, Are Cochlear Implant Patients Suffering from Perceptual Dissonance? Ear and Hearing, vol, no 5, 5, pp 35 5 PERVASIVE computing wwwcomputerorg/pervasive