VN5012AK-E. Single channel high side driver with analog current sense for automotive applications. Features. Application. Description.

Transcription

1 Single channel high side driver with analog current sense for automotive applications Datasheet production data Features Max supply voltage V CC 41 V Operating voltage range V CC 4.5 to 36 V Max on-state resistance (per ch.) R ON 12 mω Current limitation (typ) I LIMH 65 A Off-state supply current (typ) I S 2µA (1) 1. Typical value with all loads connected General features Inrush current active management by power limitation Very low stand-by current 3. V CMOS compatible input Optimized electromagnetic emission Very low electromagnetic susceptibility In compliance with the 22/95/EC european directive Diagnostic functions Proportional load current sense High current sense precision for wide range currents Current sense disable Thermal shutdown indication Very low current sense leakage Protections Undervoltage shutdown Overvoltage clamp Load current limitation Self limiting of fast thermal transients Protection against loss of ground and loss of V CC Thermal shutdown Reverse battery protection Electrostatic discharge protection Application All types of resistive, inductive and capacitive loads Description PowerSSO-24 The is a monolithic device made using STMicroelectronics VIPower M-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as fault condition disappears. Table 1. Device summary Package Tube Order codes Tape and reel PowerSSO-24 VN512AKTR-E September 213 Doc ID 1324 Rev 9 1/3 This is information on a product in full production. 1

2 Contents Contents 1 Block diagram and pin description Electrical specifications Absolute maximum ratings Thermal data Electrical characteristics Electrical characteristics curves Application information GND Protection network against reverse battery Solution 1: resistor in the ground line (RGND only) Solution 2: a diode (DGND) in the ground line Load dump protection MCU I/Os protection Maximum demagnetization energy (VCC = 13.5V) Package and PCB thermal data PowerSSO-24 thermal data Package and packing information ECOPACK packages PowerSSO-24 package mechanical data PowerSSO-24 packing information Revision history /3 Doc ID 1324 Rev 9

3 List of tables List of tables Table 1. Device summary Table 2. Pin function Table 3. Suggested connections for unused and not connected pins Table 4. Absolute maximum ratings Table 5. Thermal data Table 6. Power section Table 7. Switching (VCC = 13 V; Tj = 25 C) Table 8. Logic input Table 9. Protections and diagnostics Table 1. Current sense (8 V < V CC < 16 V) Table 11. Truth table Table 12. Electrical transient requirements (part 1/3) Table 13. Electrical transient requirements (part 2/3) Table 14. Electrical transient requirements (part 3/3) Table 15. Thermal parameter Table 16. PowerSSO-24 mechanical data Table 17. Document revision history Doc ID 1324 Rev 9 3/3

4 List of figures List of figures Figure 1. Block diagram Figure 2. Configuration diagram (top view) Figure 3. Current and voltage conventions Figure 4. Current sense delay characteristics Figure 5. Delay response time between rising edge of output current and rising edge of current sense (CS enabled) Figure 6. I OUT /I SENSE vs I OUT Figure 7. Maximum current sense ratio drift vs load current Figure 8. Switching characteristics Figure 9. Output voltage drop limitation Figure 1. Waveforms Figure 11. Off-state output current Figure 12. High level input current Figure 13. Input clamp voltage Figure 14. Input high level Figure 15. Input low level Figure 16. Input hysteresis voltage Figure 17. On-state resistance vs T case Figure 18. On-state resistance vs V CC Figure 19. Undervoltage shutdown Figure 2. I LIMH vs T case Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope Figure 23. CS_DIS high level voltage Figure 24. CS_DIS clamp voltage Figure 25. CS_DIS low level voltage Figure 26. Application schematic Figure 27. Maximum turn-off current versus inductance Figure 28. PowerSSO-24 PC board Figure 29. Rthj-amb vs PCB copper area in open box free air condition Figure 3. Rthj-amb vs PCB copper area in open box free air condition Figure 31. Thermal fitting model of a single channel HSD in PowerSSO Figure 32. PowerSSO-24 package dimensions Figure 33. PowerSSO-24 tube shipment (no suffix) Figure 34. PowerSSO-24 tape and reel shipment (suffix TR ) /3 Doc ID 1324 Rev 9

5 Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram V CC V CC CLAMP UNDERVOLTAGE PwCLAMP GND DRIVER I LIM OUTPUT INPUT LOGIC V DSLIM Pwr LIM OVERTEMP. CS_DIS I OUT K CURRENT SENSE Table 2. Pin function Name Function V CC OUTPUT GND INPUT CURRENT SENSE 1,2 CS_DIS Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. Analog current sense pin, delivers a current proportional to the load current. Active high CMOS compatible pin, to disable the current sense pin. Doc ID 1324 Rev 9 5/3

6 Block diagram and pin description Figure 2. Configuration diagram (top view) V CC GND NC NC INPUT NC CURRENT SENSE 7 18 NC 8 17 CS_DIS 9 16 NC 1 15 NC V CC NC NC NC OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT NC NC NC TAB = V CC Table 3. Suggested connections for unused and not connected pins Connection / Pin Current Sense N.C. Output Input CS_DIS Floating N.R. (1) X X X X To ground Through 1 KΩ resistor X N.R. Through 1 KΩ resistor Through 1 KΩ resistor 1. Not recommended. 6/3 Doc ID 1324 Rev 9

7 Electrical specifications 2 Electrical specifications Figure 3. Current and voltage conventions I S V CC V F V CC V CSD I CSD CS_DIS OUTPUT I OUT V OUT V IN I IN INPUT CURRENT SENSE GND I SENSE V SENSE I GND Note: V F = V OUT - V CC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol Parameter Value Unit V CC DC supply voltage 41 V -V CC Reverse DC supply voltage.3 V -I GND DC reverse ground pin current 2 ma I OUT DC output current Internally limited A -I OUT Reverse DC output current -3 A I IN DC input current -1 to 1 ma I CSD DC current sense disable input current -1 to 1 ma -I CSENSE DC reverse CS pin current 2 ma V CSENSE Current sense maximum voltage V CC -41 V +V CC V Doc ID 1324 Rev 9 7/3

8 Electrical specifications Table 4. Absolute maximum ratings (continued) Symbol Parameter Value Unit E MAX V ESD Maximum switching energy (L = 1.25 mh; R L =Ω; V bat =13.5V; T jstart =15 C; I OUT =I liml (typ.)) Electrostatic discharge (Human Body Model: R = 1.5 KΩ; C=1pF) INPUT CURRENT SENSE CS_DIS OUTPUT V CC 58 mj V ESD Charge device model (CDM-AEC-Q1-11) 75 V T j Junction operating temperature -4 to 15 C T stg Storage temperature -55 to 15 C V V V V V V V 2.2 Thermal data Table 5. Thermal data Symbol Parameter Max value Unit R thj-case Thermal resistance junction case (max) (with one channel on).4 C/W R thj-amb Thermal resistance junction ambient (max) See Figure 29 C/W 2.3 Electrical characteristics 8V<V CC <36V; -4 C<T j < 15 C, unless otherwise specified. Table 6. Power section Symbol Parameter Test conditions Min. Typ. Max. Unit V CC Operating supply voltage V V USD Undervoltage shutdown V V USDhyst Undervoltage shutdown hysteresis.5 V R ON On-state resistance (2) I OUT = 5 A; T j = 15 C 24 mω I OUT = 5 A; T j =25 C 12 mω I OUT = 5 A; V CC =5V; T j =25 C 16 mω V clamp Clamp voltage I S =2mA V 8/3 Doc ID 1324 Rev 9

9 Electrical specifications Table 6. I S Supply current I L(off) Off-state output current (2) V F Power section (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit Off-state; V CC =13V; T j =25 C; V IN =V OUT =V SENSE =V CSD =V On-state; V CC =13V; V IN =5V; I OUT =A V IN =V OUT =V; V CC =13V; T j =25 C V IN =V OUT =V; V CC =13V; T j =125 C 2 (1) 5 (1) µa μα.1 3 µa 5 µa Output - V CC diode voltage (2) -I OUT =8A; T j =15 C.7 V 1. PowerMOS leakage included. 2. For each channel. Table 7. Switching (V CC =13V; T j =25 C) Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time R L =2.6Ω (see Figure 8) 3 µs t d(off) Turn-off delay time R L =2.6Ω (see Figure 8) 55 µs dv OUT /dt (on) Turn-on voltage slope R L =2.6Ω See Figure 21 V/µs dv OUT /dt (off) Turn-off voltage slope R L =2.6Ω See Figure 22 V/µs W ON W OFF Switching energy losses during t won R L =2.6Ω (see Figure 8) 1.2 mj Switching energy losses during t woff R L =2.6Ω (see Figure 8).7 mj Table 8. Logic input Symbol Parameter Test conditions Min. Typ. Max. Unit V IL Input low level voltage.9 V I IL Low level input current V IN =.9V 1 µa V IH Input high level voltage 2.1 V I IH High level input current V IN =2.1V 1 µa V I(hyst) Input hysteresis voltage.25 V V ICL Input clamp voltage I IN =1mA V I IN =-1mA -.7 V V CSDL CS_DIS low level voltage.9 V I CSDL Low level CS_DIS current V CSD =.9V 1 µa V CSDH CS_DIS high level voltage 2.1 V I CSDH High level CS_DIS current V CSD =2.1V 1 µa Doc ID 1324 Rev 9 9/3

10 Electrical specifications Table 8. Logic input (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit V CSD(hyst) CS_DIS hysteresis voltage.25 V V CSCL CS_DIS clamp voltage I CSD =1mA V I CSD =-1mA -.7 V Table 9. Protections and diagnostics (1) Symbol Parameter Test conditions Min. Typ. Max. Unit I limh I liml DC Short circuit current Short circuit current during thermal cycling V CC = 13 V A 5V<V CC <36V 9 A V CC =13V; T R <T j <T TSD 24 A T TSD Shutdown temperature C T R Reset temperature T RS + 1 T RS + 5 C T RS Thermal reset of STATUS 135 C Thermal hysteresis T HYST 7 C (T TSD -T R ) V DEMAG V ON Turn-off output voltage clamp Output voltage drop limitation I OUT = 2 A; V IN =V; L=6mH I OUT =.5 A; T j = -4 C to 15 C (see Figure 9) V CC - 41 V CC - 46 V CC - 52 V 25 mv 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 1. Current sense (8 V < V CC <16V) Symbol Parameter Test conditions Min. Typ. Max. Unit K I OUT /I SENSE I OUT =.25 A; V SENSE =.5V; V CSD =V; T j = -4 C to 15 C K 1 I OUT /I SENSE T j = -4 C to 15 C I OUT = 5 A; V SENSE =.5V; V CSD =V; I OUT = 5 A; V SENSE =.5V; V CSD =V; T j = 25 C to 15 C dk 1 /K 1 (1) Current sense ratio drift I OUT =5A; V SENSE =.5V; V CSD =V; T j = -4 C to 15 C K 2 I OUT /I SENSE T j = -4 C to 15 C I OUT =1A; V SENSE =4V; V CSD =V; I OUT =1A; V SENSE =4V; V CSD =V; T j = 25 C to 15 C dk 2 /K 2 (1) Current sense ratio drift I OUT =1A; V SENSE =4V; V CSD =V; T J = -4 C to 15 C % % 1/3 Doc ID 1324 Rev 9

11 Electrical specifications Table 1. K 3 I OUT /I SENSE T j = -4 C to 15 C I OUT =25A; V SENSE =4V; V CSD =V; I OUT =25A; V SENSE =4V; V CSD =V; T j = 25 C to 15 C dk 3 /K 3 (1) I SENSE I OL V SENSE V SENSEH I SENSEH t DSENSE1H t DSENSE1L t DSENSE2H Δt DSENSE2H t DSENSE2L Current sense (8 V < V CC < 16 V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit Current sense ratio drift Analog sense leakage current Openload on-state current detection threshold Max analog sense output voltage Analog sense output voltage in over temperature condition Analog sense output current in over temperature condition Delay response time from falling edge of CS_DIS pin Delay response time from rising edge of CS_DIS pin Delay response time from rising edge of INPUT pin Delay response time between rising edge of output current and rising edge of current sense Delay response time from falling edge of INPUT pin 1. Parameter guaranteed by design, it is not tested. I OUT =25A; V SENSE =4V; V CSD =V; T j = -4 C to 15 C I OUT =A; V SENSE =V; V CSD =5V; V IN =V; T j =-4 C to 15 C I OUT =A; V SENSE =V; V CSD =V; V IN =5V; T j =-4 C to 15 C I OUT =2A; V SENSE =V; V CSD =5V; V IN =5V; T j =-4 C to 15 C % 1 µa 2 µa 1 µa V IN =5V; I SENSE =5µA 1 45 ma I OUT =15A; V CSD =V 5 V V CC =13V; R SENSE =2.2KΩ 9 V V CC =13V; V SENSE =5V 8 ma V SENSE <4V; 1.5A<I OUT <25A; I SENSE =9% of I SENSE max (see Figure 4) V SENSE <4V; 1.5A<I OUT <25A; I SENSE =1% of I SENSE max (see Figure 4) V SENSE <4V; 1.5A<I OUT <25A; I SENSE =9% of I SENSE max (see Figure 4) V SENSE <4V; I SENSE =9% of I SENSEMAX ; I OUT =9% of I OUTMAX ; I OUTMAX =5A (see Figure 5) V SENSE <4V; 1.5A<I OUT <25A; I SENSE =1% of I SENSE max (see Figure 4) 5 1 µs 5 2 µs 27 4 µs 3 µs 1 25 µs Doc ID 1324 Rev 9 11/3

12 Electrical specifications Figure 4. Current sense delay characteristics INPUT CS_DIS LOAD CURRENT SENSE CURRENT t DSENSE2H t DSENSE1L t DSENSE1H tdsense2l Figure 5. Delay response time between rising edge of output current and rising edge of current sense (CS enabled) V IN Δt DSENSE2H t I OUT I OUTMAX 9% I OUTMAX t I SENSE I SENSEMAX 9% I SENSEMAX t 12/3 Doc ID 1324 Rev 9

13 Electrical specifications Figure 6. I OUT /I SENSE vs I OUT Figure 7. Maximum current sense ratio drift vs load current Note: Parameter guaranteed by design; it is not tested. Doc ID 1324 Rev 9 13/3

14 Electrical specifications Table 11. Truth table Conditions Input Output Sense (V CSD =V) (1) Normal operation Over temperature Undervoltage Short circuit to GND (R sc 1 mω) Short circuit to V CC Negative output voltage clamp L H L H L H L H H L H L H L L L L L L L H H Nominal V SENSEH if T j < T TSD V SENSEH if T j > T TSD < Nominal L L 1. If the V CSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit. Figure 8. Switching characteristics V OUT t Won t Woff 8% 9% dv OUT /dt (on) tr 1% t f dv OUT /dt (off) t INPUT t d(on) t d(off) t Figure 9. Output voltage drop limitation V cc -V out T j =15 o C T j =25 o C T j =-4 o C V on V on /R on(t) I out 14/3 Doc ID 1324 Rev 9

15 Electrical specifications Table 12. Electrical transient requirements (part 1/3) ISO : 24(E) test pulse III Test levels (1) IV Number of pulses or test times Burst cycle/pulse repetition time Delays and impedance 1-75V -1V 2a +37V +5V 5 pulses 5 pulses.5 s 5 s 2 ms, 1 Ω.2 s 5 s 5 µs, 2 Ω 3a -1V -15V 1h 9 ms 1 ms.1 µs, 5 Ω 3b +75V +1V 1h 9 ms 1 ms.1 µs, 5 Ω 4-6V -7V 1 pulse 1 ms,.1 Ω 5b (2) +65V +87V 1 pulse 4 ms, 2 Ω Table 13. Electrical transient requirements (part 2/3) ISO : 24(E) test pulse III Test level results (1) IV 1 C C 2 C C 3a C C 3b C C 4 C C 5 (2) C C 1. The above test levels must be considered referred to V CC = 13.5 V except for pulse 5b. 2. Valid in case of external load dump clamp: 4V maximum referred to ground. Table 14. Electrical transient requirements (part 3/3) Class C E Contents All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the Doc ID 1324 Rev 9 15/3

16 Electrical specifications Figure 1. Waveforms INPUT CS_DIS LOAD CURRENT SENSE CURRENT NORMAL OPERATION UNDERVOLTAGE V CC V USD V USDhyst INPUT CS_DIS LOAD CURRENT SENSE CURRENT SHORT TO V CC INPUT CS_DIS LOAD VOLTAGE LOAD CURRENT SENSE CURRENT <Nominal <Nominal OVERLOAD OPERATION T j INPUT CS_DIS TR T TSD T RS LOAD CURRENT SENSE CURRENT I LIMH I LIML V SENSEH current limitation power limitation SHORTED LOAD thermal cycling NORMAL LOAD 16/3 Doc ID 1324 Rev 9

17 Electrical specifications 2.4 Electrical characteristics curves Figure 11. Off-state output current Figure 12. High level input current Iloff (ua) Iih (ua) Off State Vcc=13V Vin=Vout=V Vin=2.1V Tc ( C) Tc ( C) Figure 13. Input clamp voltage Figure 14. Input high level Vicl (V) lin=1ma Vih (V) Tc ( C) Tc ( C) Figure 15. Input low level Figure 16. Input hysteresis voltage Vil (V) Tc ( C) Vihyst (V) Tc ( C) Doc ID 1324 Rev 9 17/3

18 Electrical specifications Figure 17. On-state resistance vs T case Figure 18. On-state resistance vs V CC Ron (mohm) 18 Ron (mohm) Iout=5A Vcc=13V Tc=15 C Tc=125 C Tc=25 C 1 8 Tc=-4 C Tc ( C) Vcc (V) Figure 19. Undervoltage shutdown Figure 2. I LIMH vs T case Vusd (V) Ilimh (A) Vcc=13V Tc ( C) Tc ( C) Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope (dvout/dt)on (V/ms) 1 (dvout/dt)off (V/ms) Vcc=13V RI=2.6Ohm 8 7 Vcc=13V RI=2.6Ohm Tc ( C) Tc ( C) 18/3 Doc ID 1324 Rev 9

19 Electrical specifications Figure 23. CS_DIS high level voltage Figure 24. CS_DIS clamp voltage Vcsdh (V) 8 Vcsdcl (V) Icsd=1mA Tc ( C) Tc ( C) Figure 25. CS_DIS low level voltage Vcsdl (V) Tc ( C) Doc ID 1324 Rev 9 19/3

20 Application information 3 Application information Figure 26. Application schematic +5V V CC R prot CS_DIS D ld μc R prot R prot INPUT CURRENT SENSE GND OUTPUT C ext R SENSE V GND R GND D GND 3.1 GND Protection network against reverse battery Solution 1: resistor in the ground line (R GND only) This can be used with any type of load. The following is an indication on how to select the R GND resistor. 1. R GND 6 mv / (I S(on)max ). 2. R GND ( V CC ) / (-I GND ) where -I GND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in R GND (when V CC < : during reverse battery situations) is: P D = (-V CC ) 2 /R GND. This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I S(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the R GND produces a shift (I S(on)max * R GND ) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in case of several high side drivers sharing the same R GND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 2/3 Doc ID 1324 Rev 9

21 Application information Solution 2: a diode (D GND ) in the ground line A resistor (R GND =1 kω) should be inserted in parallel to D GND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift ( 6 mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift does not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection D ld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the V CC max DC rating. The same applies if the device is subject to transients on the V CC line that are greater than the ones shown in the ISO : 24(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transients are present on the V CC line, the control pins are pulled negative. ST suggests to insert a resistor (R prot ) in line to prevent the µc I/O pins from latching-up. The value of these resistors is a compromise between the leakage current of µc and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of µc I/Os. -V CCpeak /I latchup R prot (V OHμC -V IH -V GND ) / I IHmax Calculation example: For V CCpeak = -1 V and I latchup 2 ma; V OHμC 4.5 V 5kΩ R prot 18 kω. Recommended values: R prot =1kΩ, C EXT =1nF. Doc ID 1324 Rev 9 21/3

22 Application information 3.4 Maximum demagnetization energy (V CC = 13.5V) Figure 27. Maximum turn-off current versus inductance A: T jstart = 15 C single pulse B: T jstart = 1 C repetitive pulse C: T jstart = 125 C repetitive pulse V IN, I L Demagnetization Demagnetization Demagnetization t Note: Values are generated with R L = Ω.In case of repetitive pulses, T jstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. 22/3 Doc ID 1324 Rev 9

23 Package and PCB thermal data 4 Package and PCB thermal data 4.1 PowerSSO-24 thermal data Figure 28. PowerSSO-24 PC board Note: Layout condition of R th and Z th measurements (PCB: Double layer, Thermal Vias, FR4 area = 77 mm x 86 mm,pcb thickness = 1.6mm, Cu thickness = 7 µm (front and back side), Copper areas: from minimum pad layout to 8 cm 2 ). Figure 29. R thj-amb vs PCB copper area in open box free air condition RTHj_amb( C/W) PCB Cu heatsink area (cm^2) Doc ID 1324 Rev 9 23/3

24 Package and PCB thermal data Figure 3. R thj-amb vs PCB copper area in open box free air condition Equation 1: pulse calculation formula Z THδ = R TH δ + Z THtp ( 1 δ) where δ = t p T Figure 31. Thermal fitting model of a single channel HSD in PowerSSO The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 24/3 Doc ID 1324 Rev 9

25 Package and PCB thermal data Table 15. Thermal parameter Area/island (cm 2 ) Footprint 2 8 R1 ( C/W).1 R2 ( C/W).3 R3 ( C/W) 6 R4 ( C/W) 7.7 R5 ( C/W) R6 ( C/W) C1 (W.s/ C).25 C2 (W.s/ C).24 C3 (W.s/ C).25 C4 (W.s/ C).75 C5 (W.s/ C) C6 (W.s/ C) Doc ID 1324 Rev 9 25/3

26 Package and packing information 5 Package and packing information 5.1 ECOPACK packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 5.2 PowerSSO-24 package mechanical data Figure 32. PowerSSO-24 package dimensions 26/3 Doc ID 1324 Rev 9

27 Package and packing information Table 16. PowerSSO-24 mechanical data Millimeters Symbol Min. Typ. Max. A A a1 -.1 b c D E e e G G H h L N - - 1deg X Y Doc ID 1324 Rev 9 27/3

28 Package and packing information 5.3 PowerSSO-24 packing information Figure 33. PowerSSO-24 tube shipment (no suffix) C B Base Q.ty 49 Bulk Q.ty 1225 Tube length (±.5) 532 A 3.5 B 13.8 C (±.1).6 All dimensions are in mm. A Figure 34. PowerSSO-24 tape and reel shipment (suffix TR ) Reel dimensions Base Q.ty 1 Bulk Q.ty 1 A (max) 33 B (min) 1.5 C (±.2) 13 F 2.2 G (+ 2 / -) 24.4 N (min) 1 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb Tape width W 24 Tape Hole Spacing P (±.1) 4 Component Spacing P 12 Hole Diameter D (±.5) 1.55 Hole Diameter D1 (min) 1.5 Hole Position F (±.1) 11.5 Compartment Depth K (max) 2.85 Hole Spacing P1 (±.1) 2 All dimensions are in mm. End Start Top cover tape No components 5mm min Components Empty components pockets saled with cover tape. No components 5mm min User direction of feed 28/3 Doc ID 1324 Rev 9

29 Revision history 6 Revision history Table 17. Document revision history Date Revision Changes 24-Jan-26 1 Initial release. 13-Feb Oct Dec-27 4 Document reformatted and restructured. Added Section 3.4: Maximum demagnetization energy (VCC = 13.5V). Document reformatted and restructured. Added lists of tables and figures. Added ECOPACK packages information. Table 4: Absolute maximum ratings: changed E MAX value from 283 to 58 mj. Table 1: Current sense (8 V < V CC <16V): added dk1/k1, dk2/k2, dk3/k3, Δt DSENSE2H parameters. Added Figure 5: Delay response time between rising edge of output current and rising edge of current sense (CS enabled). Updated Figure 6: I OUT /I SENSE vs I OUT. Added Figure 7: Maximum current sense ratio drift vs load current. Table : - Updated test level values III and IV for test pulse 5b and notes. Updated Table 1: Current sense (8 V < V CC <16V): changed dk1/k1 values from ± 7 to ± 8 % changed dk2/k2 values from ± 3 to ± 5 % changed dk3/k3 values from ± 2 to ± 4 % changed t DSENSE2H max value from 6 µs to 4 µs changed Δt DSENSE2H max value from 25 µs to 3 µs added I OL parameter. Updated Figure 7: Maximum current sense ratio drift vs load current with new dk/k values. 12-Feb Aug Jun Oct Updated Description 23-Sep Updated Disclaimer. Corrected typing error in Table 1: Current sense (8 V < V CC <16V): changed I OL test condition from V IN = V to V IN =5V. Updated Table 16: PowerSSO-24 mechanical data: changed a1 max. value from.75 mm to.1 mm. Updated Table 16: PowerSSO-24 mechanical data: Changed A (min) value from 2.15 mm to - and A (max) from 2.47 mm to 2.45 mm Changed A2 (max) from 2.4 mm to 2.35 mm Doc ID 1324 Rev 9 29/3

30 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. 213 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 3/3 Doc ID 1324 Rev 9