A New Topology of Sub-modules With DC Fault Current Blocking Capability and a New Type of Hybrid MMC Converter

Transcription

1 34 29 Vol.34 No.29 Oct.15, Proceedings of the SEE 214 hin.soc.for Elec.Eng DOI /j pcsee (214) TM 76 (() 4374) A New Topology of Sub-modules With D Fault urrent Blocking apability and a New Type of Hybrid MM onverter XIANG Wang, LIN Weixing, WEN Jinyu, HENG Shijie (State Key Laboratory of Advanced Electromagnetic Engineering and Technology (School of Electrical and Electronic Engineering, Huazhong University of Science and Technology), Wuhan 4374, Hubei Province, hina) ABSTRAT: To solve the problem that traditional MM based on half-bridge sub-module being incapable of isolating dc fault current, a new topology of self-blocking sub-module is proposed in this paper. Four types of self-blocking sub-modules that require simultaneously blocking the IGBTs are firstly proposed. To eliminate the requirements on simultaneously blocking, two types of enhanced self-blocking sub-modules are further proposed. To further reduce the used power electronic devices, a hybrid converter combines enhanced self-blocking sub-modules with traditional half bridge sub-modules is then proposed. Feasibility of the proposed sub modules and hybrid converter are verified by simulations in PSAD/EMTD. The proposed hybrid converter is able to isolate dc fault current with only 25% increase of the used power electronic device compared with traditional half-bridge cell MM which is not able to isolate dc fault current. KEY WORDS: modular multilevel converter (MM); full-bridge sub-modules; clamp-double sub-modules; innovative sub-modules; D fault blocking; hybrid converter 4 4 IGBT IGBT 2 (modular multilevel convertersmm) MM MMPSAD/EMTD MM MM 25% IGBT (modular multilevel convertersmm) 22 [1] [2-3] 3 [4] [5] [6] [7-8] [9] 21 MM-HVD Trans Bay able MM [1] 3 [11] 5 MM MM-HVD [12] [13-14]

2 MM-HVD L- HVD [15] [16] [17-18] [19-2] [21] MM MM IGBT MM 2 MM MM MM 25% 2 IGBT [22] 3 IGBT [23] 3L-F 3L-NP (self-blocking sub-modulesb-sm) MM 3 IGBT MM PSAD/EMTD MM MM MM 25% IGBT (a) 1(b)(c) T 1 T 2 (a) T 1 T 2 D2 D 6 T 1 D1 T 4 T 4 D2 (b) D 7 T 5 D 5 (c) T 4 1 Fig. 1 Traditional topologies of sub-modules (a)(d) T 1 D1 T 1 D3 U T3 T 2 T2 (a) 1 (b) 2 T 1 D1 T 1 D1 T T 2 3 D2 T 2 D2 (c) 3 (d) Fig. 2 Four types of self-blocking sub-module 1.2 1

3 L dc R dc T 1 T 2 U U IGBT 1 1 U a U b U c L s L s L s arm L L L L L L D' 2 D' 1 Tab. 1 1 Switching states of self-blocking sub-modules arm D' 3 L dc R dc T 1 T U (a) 3 MM 3 IGBT arm L R dc L dc IGBT 3 IGBT A 3(a) i a > i a A L arm L dc R dc R dc L dc arm L U a L s i a U b L s U c L s arm L L L L L D' 1 D' 2 D' 3 (a) i a > L dc R dc arm i c L dc R dc (b) i a < 3 MM IGBT Fig. 3 Equivalent circuit of the self-blocking MM when all IGBTs are tripped L U U dc U U dc /N N 3(a) 3(b) arm U arm U arm N U (1) i1 m_ci U m_ci m(mab) i 3(a)A U a_lower U c_upper U U U U a_lower c_upper a_ci _ci i1 i1 N N (2) A u ac 3(a) U diode U u ( U U ) (3) diode ac a_lower c_upper ms IGBT U m_ci U (2)(3) U 3U 2NU (4) diode m U m U m U dc M U 1 U 2 m (5) dc

4 M <M<1(6) 3 Udiode 3Um 2 NU ( M 2) Udc (6) 2 (6) 3(a) 3(b) i a < 3(a) 3(b) 3 MM MM MM (a) T 1 T 2 U D2 (a) 1 T 1 T 2 T 1 T 2 U (b) 2() T 1 D1 T 2 (c) 3() (d) 4 Fig. 4 4 Enhanced self-blocking sub-modules U E +U 4(a) 2(a) 2(b) 4(b) 4(b) 4(b) 2(c) 4(c) 4(c)MM 4(c) 4(d) 2(d) MM 4(d) U 4 4(a)(d) (a) 1 1 MM 4(d) 4 4

5 z s I up SM N SM N SM N SM N SM N SM N 5 Fig. 5 Topology of modular multilevel converter 2.3 MM MM 3.1 U dc MM N U NU dc Flt U (7) MM u peak Udc upeak M, M 1 (8) 2 U dc /2 N/2 N/2 MM M<1 N/ MM MM IGBT 2 N MM 2 MM MM MM [21] 6 + A B U T3 6 Fig. 6 Topology of Hybrid converter 2 MM () Tab. 2 omparisons of the devices number of different types of MM (taking one converter arm as example) MM MM MM MM N N.5N N N N N N 2N 4N 3.5N 3N IGBT 2N 4N 2.5N 2.5N [24] IGBT

6 IGBT 1% MM 5% PSAD/EMTD 7 MM PSAD/EMTD z s MM 23 kv:352 kv P ±32 kv, 1 MW 7 Fig. 7 Topology of simulated model 1 MVA 23 kv32 kv 164 F.112 H [11].1 H [25] N8 8 kv 7 MM (a) 1. s MM 1.1 smm IGBT MM 1 MW 8(a) A IGBT 8(b)I dc 7 I dc Flt U dc U/kV Idc/kA Fig (a) A U (b) (c) 8 Simulation results using self-blocking sub-modules IGBT 8(c) U T3 2(a) s MM 1. 5 s AB 1.2 s IGBT s MM 9 1 A s 5 kv _1 8 kv_1 _1 _1 _1 Flt 9 Fig. 9 Equivalent circuit with asynchronous blocking signals of

7 U T3_obthers U T3_1 1 Fig. 1 Overvoltage due to the time difference in blocking the IGBTs s 1.2 s d i L d t 2 1 U T3_1 U T3_obthers 11 Fig. 11 Verification of the first sub-module adopt enhanced self-blocking sub-module (a) A 12(b) MM 8 Idc/kA 4 UT3_1 UT3_3 UT3_5 UT3_7 UT3_2 UT3_4 UT3_6 UT3_8 UT3_8 (a) A (b) 12 Fig. 12 Verification of the enhanced sub-modules (a) A 14 13(b) 12 12(a) 12(a) 2 8 kv Idc/kA 8 4 UT3_1 UT3_2 UT3_3 UT3_4 (a) A (b) 13 Fig. 13 Waveforms of Hybrid converter at inverter state MM 1. s MM 1. 5 s AB s Idc/kA 13 9 UUT3_1 UT3_2 UT3_3 UT3_4 5 1 (a) A (b)

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