ILD1151. Datasheet. Multitopology High Power LED DC/DC Controller IC for Industrial Applications. Rev. 1.0,

Transcription

1 Multitopology High Power LED DC/DC Controller IC for Industrial Applications Datasheet Rev..0,

2 Table of Contents Table of Contents Overview Block Diagram Pin Configuration Pin Assignment Pin Definitions and Functions General Product Characteristics Absolute Maximum Ratings Functional Range Thermal Resistance Switching Regulator Description Electrical Characteristics Oscillator and Synchronization Description Electrical Characteristics Enable and Dimming Function Description Electrical Characteristics Linear Regulator Description Electrical Characteristics Protection and Diagnostic Functions Description Electrical Characteristics Analog Dimming Purpose of Analog Dimming: Description Electrical Characteristics Application Information Further Application Information Package Outlines Revision History Datasheet 2 Rev..0,

3 Multitopology High Power LED DC/DC Controller IC for Industrial Applications Overview Features Wide Input Voltage Range from 4.5 V to 45 V Constant Current or Constant Voltage Regulation Drives LEDs in Boost, Buck-Boost and SEPIC Topology Very Low Shutdown Current: I q_off < 0 µa Flexible Switching Frequency Range, 00 khz to 500 khz Synchronization with external clock source PWM Dimming Analog Dimming feature to adjust average LED current PG-SSOP-4 Internal 5 V Low Drop Out Voltage Regulator Open Circuit Detection Short to GND Protection Output Overvoltage Protection Internal Soft Start Over Temperature Shutdown Wide LED current range via simple adaptation of external components 300mV High Side Current Sense to ensure highest flexibility and LED current accuracy Available in a small thermally enhanced PG-SSOP-4 package Green Product (RoHS) Compliant Description The is a Multitopology High Power DC/DC Controller IC with built in protection features. The main function of this device is to regulate a constant LED current. The constant current regulation is especially beneficial for LED color accuracy and longer lifetime. The controller concept of the allows multiple configurations such as Boost, Buck/Boost and SEPIC by simply adjusting the external components. The offers the most flexible dimming options. Dimming can be achieved with analog or PWM input.the switching frequency is adjustable in the range of 00 khz to 500 khz and can be synchronized to an external clock source. The features an enable function reducing the shut-down current consumption to I q_off < 0 µa. The current mode regulation scheme of this device provides a stable regulation loop maintained by small external compensation components. The integrated soft start feature limits the current peak as well as voltage overshoot at start-up. This IC provides output overvoltage protection, device overtemperature shutdown and short circuit to GND protection. Type Package Marking PG-SSOP-4 Datasheet 3 Rev..0,

4 Overview Applications LED Controller for Industrial Applications Universal Constant Current and Voltage Source General Illumination e.g. Halogen Replacement Residential Architectural and Industrial Commercial Lighting for in- and outdoor Signal and Marker Lights for Orientation or Navigation (e.g. steps, exit ways, etc.) For automotive and transportation applications, please refer to the Infineon Auto LED products. Datasheet 4 Rev..0,

5 Block Diagram 2 Block Diagram IN 4 LDO IVCC EN / PWMI 3 On/Off Logic Internal Supply EN_INT/ PWM_INT Power On Reset FREQ / SYNC Oscillator Soft Start Power Switch Gate Driver 2 SWO Slope Comp. Thermal Protection PWM Generator Switch Current Error Amplifier 4 3 SWCS SGND Open Load + Short to GND detection Leading Edge Blanking SET 0 Reference Current Generation Over Volage Protection 9 OVFB COMP 8 Feedback Voltage Error Amplifier 6 7 FBH FBL 2 EN_INT/ PWM_INT Dimming Switch Gate Driver 5 PWMO GND Figure Block Diagram Datasheet 5 Rev..0,

6 Pin Configuration 3 Pin Configuration 3. Pin Assignment IVCC 4 IN SWO 2 3 EN/PWMI SGND SWCS PWMO exposed Pad 2 0 GND FREQ/SYNC SET FBH 6 9 OVFB FBL 7 8 COMP Figure 2 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Function IVCC Internal LDO Output; Used for internal biasing and gate drive. Bypass with external capacitor close to the pin. Pin must not be left open. 2 SWO Switch Output; Connect to gate of external switching MOSFET 3 SGND Current Sense Ground; Ground return for current sense switch 4 SWCS Current Sense Input; Detects the peak current through switch 5 PWMO PWM Dimming Output; Connect to gate of external MOSFET 6 FBH Voltage Feedback Positive; Non inverting Input (+) 7 FBL Voltage Feedback Negative; Inverting Input (-) 8 COMP Compensation Input; Connect R and C network to pin for stability Datasheet 6 Rev..0,

7 Pin Configuration Pin Symbol Function 9 OVFB Output Overvoltage Protection Feedback; Connect to resistive voltage divider to set overvoltage threshold. 0 SET Analog Dimming Input; Load current adjustment Pin. Pin must not be left open. If analog dimming feature is not used connect to IVCC pin. FREQ / SYNC Frequency Select or Synchronization Input; Connect external resistor to GND to set frequency. Or apply external clock signal for synchronization within frequency capture range. 2 GND Ground; Connect to system ground. 3 EN / PWMI Enable or PWM Input; Apply logic HIGH signal to enable device or PWM signal for dimming LED. 4 IN Supply Input; Supply for internal biasing. EP Exposed Pad; Connect to external heatspreading GND Cu area (e.g. inner GND layer of multilayer PCB with thermal vias). Datasheet 7 Rev..0,

8 General Product Characteristics 4 General Product Characteristics 4. Absolute Maximum Ratings Absolute Maximum Ratings ) T j = -40 C to +25 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. Voltages 4.. IN V IN V Supply Input 4..2 EN / PWMI Enable or PWM Input V EN V 4..3 FBH-FBL Feedback Error Amplifier Differential 4..4 FBH Feedback Error Amplifier Positive Input 4..5 FBL Feedback Error Amplifier Negative Input V FBH -V FBL V The maximum delta must not exceed 6V V FBH V The difference between V FBH and V FBL must not exceed 6V, refer to Parameter 4..3 V FBL V The difference between V FBH and V FBL must not exceed 6V, refer to Parameter FBH and FBL current I FBL,FBH ma t < 00ms, V FBH - V FBL = 0.3V 4..7 OVFB V OVP V 4..8 Over Voltage Feedback Input V t < 0s 4..9 SWCS V SWCS V 4..0 Switch Current Sense Input V t < 0s 4.. SWO V SWO V 4..2 Switch Gate Drive Output V t < 0s 4..3 SGND V SGND V Current Sense Switch GND 4..4 COMP V COMP V 4..5 Compensation Input V t < 0s 4..6 FREQ / SYNC; Frequency and V FREQ / SYNC V 4..7 Synchronization Input V t < 0s 4..8 PWMO V PWMO V 4..9 PWM Dimming Output V t < 0s SET V SET V 4..2 IVCC V IVCC V Internal Linear Voltage Regulator Output V t < 0s Temperatures Junction Temperature T j C Datasheet 8 Rev..0,

9 General Product Characteristics Absolute Maximum Ratings ) T j = -40 C to +25 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max Storage Temperature T stg C ESD Susceptibility ESD Resistivity of all Pins V ESD,HBM -2 2 kv HBM 2) ESD Resistivity of IN, EN/PWMI, FBH, FBL and SET pin to GND V ESD,HBM -4 4 kv HBM 2) ) Not subject to production test, specified by design. 2) ESD susceptibility, Human Body Model HBM according to EIA/JESD 22-A4B Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as outside normal operating range. Protection functions are not designed for continuous repetitive operation. 4.2 Functional Range Pos. Parameter Symbol Limit Values Unit Conditions Min. Max Supply Voltage Range V IN ) V V IVCC > V IVCC,RTH,d Feedback Voltage Input V FBH; 3 60 V V FBL Junction Temperature T j C ) Not subject to production test, specified by design. Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Datasheet 9 Rev..0,

10 General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD5 standards. For more information, go to Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max ) 2) Junction to Case R thjc 0 K/W ) 3) Junction to Ambient R thja 47 K/W 2s2p R thja 54 K/W s0p mm R thja 64 K/W s0p mm 2 ) Not subject to production test, specified by design. 2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed pad are fixed to ambient temperature). Ta=25 C; The IC is dissipating W. 3) Specified R thja value is according to JEDEC 2s2p (JESD 5-7) + (JESD 5-5) and JEDEC s0p (JESD 5-3) + heatsink area at natural convection on FR4 board; The device was simulated on a 76.2 x 4.3 x.5 mm board. The 2s2p board has 2 outer copper layers (2 x 70µm Cu) and 2 inner copper layers (2 x 35µm Cu). A thermal via (diameter = 0.3 mm and 25 µm plating) array was applied under the exposed pad and connected the first outer layer (top) to the first inner layer and second outer layer (bottom) of the JEDEC PCB. Ta=25 C; The IC is dissipating W. Datasheet 0 Rev..0,

11 Switching Regulator 5 Switching Regulator 5. Description The regulator is suitable for boost, buck-boost and SEPIC configurations. The constant output current is especially useful for light emitting diode (LED) applications. The regulator function is implemented by a pulse width modulated (PWM) current mode controller. The PWM current mode controller uses the peak current through the external power switch and error in the output current to determine the appropriate pulse width duty cycle (on time) for constant output current. The current mode controller provides a PWM signal to an internal gate driver which then outputs to an external n-channel enhancement mode metal oxide field effect transistor (MOSFET) power switch. The current mode controller also has built-in slope compensation to prevent sub-harmonic oscillations which is a characteristic of current mode controllers operating at high duty cycles (>50% duty). An additional built-in feature is an integrated soft start that limits the current through the inductor and external power switch during initialization. The soft start function gradually increases the inductor and switch current over t SS (Parameter 5.2.8) to minimize potential overvoltage at the output. OVFB 9 OV FB H when OVFB >.25V COMP 8 V Ref.25V = High when IVCC < 4.0V UV IVCC FBH 6 FBL 7 SET 0 FREQ/ SYNC x 0 if SET <.6V 0 VRef ( SET 0.V ) 5 = V Ref 0.3V Oscillator EA Soft start I gmea Slope Comp t I EA I SLO PE Current Comp High when l EA- I SLOPE- I CS >0 Low when T j > 75 C Clock R & & OFF when H Q S Q Error-FF NOR > Output Stage OFF when Low NAND 2 & R S & & PWM-FF Q Q = V Ref 4.0V INV I CS Gate Driver Supply Gate Driver Current Sense IVCC 2 SWO 4 SWCS 3 SGND Figure 3 Switching Regulator Block Diagram Datasheet Rev..0,

12 Switching Regulator 5.2 Electrical Characteristics All parameters have been tested at 25 C, unless otherwise specified. ) Table EC Switching Regulator V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Regulator: 5.2. Feedback Reference Voltage V REF V refer to Figure 25 V REF = V FBH -V FBL V SET = 5V I LED = 350 ma Feedback Reference Voltage V REF V refer to Figure 25 V REF = V FBH -V FBL V SET = 0.4V I LED = 70mA Feedback Reference Voltage Offset Voltage Load Regulation (ΔV REF / V REF ) / ΔI BO Switch Peak Over Current Threshold V REF_offset 5 mv refer to Figure 7 and Figure 25 V REF = V FBH -V FBL V SET = 0.V V OUT >V IN 5 %/A refer to Figure 25 V SET = 5V; I LED = 00 to 500mA V SWCS mv V FBH = V FBL = 5V V COMP = 3.5V Maximum Duty Cycle D MAX,fixed % Fixed frequency mode Maximum Duty Cycle D MAX,sync 88 % Synchronization mode Soft Start Ramp t SS µs V FB rising from 5% to 95% of V FB, typ IFBH I FBH µa V FBH - V FBL = 0.3V Feedback High Input Current IFBL I FBL µa V FBH - V FBL = 0.3V Feedback Low Input Current 5.2. Switch Current Sense Input I SWCS µa V SWCS = 50mV Current Input Undervoltage Shutdown V IN,off V V IN decreasing Input Voltage Startup V IN,on 4.85 V V IN increasing ) Not subject to production test, specified by design Datasheet 2 Rev..0,

13 Switching Regulator Table EC Switching Regulator V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Gate Driver for external Switch Gate Driver Peak Sourcing I SWO,SRC 380 ma ) V SWO = V to 4V Current Gate Driver Peak Sinking I SWO,SNK 550 ma ) V SWO = 4V to V Current Gate Driver Output Rise Time t R,SWO ns ) C L,SWO = 3.3nF; V SWO = V to 4V Gate Driver Output Fall Time t F,SWO ns ) C L,SWO = 3.3nF; V SWO = 4V to V Gate Driver Output Voltage V SWO V ) C L,SWO = 3.3nF; ) Not subject to production test, specified by design Datasheet 3 Rev..0,

14 Oscillator and Synchronization 6 Oscillator and Synchronization 6. Description The internal oscillator is used to determine the switching frequency of the boost regulator. The switching frequency can be selected from 00 khz to 500 khz with an external resistor to GND. To set the switching frequency with an external resistor the following formula can be applied. R FREQ = 0 2 s ( 4 0 [ ]) ( f []) Ω FREQ s 3 ( 3.5 [ Ω ]) [ Ω ] In addition, the oscillator is capable of changing from the frequency set by the external resistor to a synchronized frequency from an external clock source. If an external clock source is provided on the pin FREQ/SYNC, then the internal oscillator synchronizes to this external clock frequency and the boost regulator switches at the synchronized frequency. The synchronization frequency capture range is 250 khz to 500 khz. V CLK FREQ / SYNC R FREQ Oscillator Multiplexer PWM Gate 2 Clock Frequency Logic Driver Detector SWO Figure 4 Oscillator and Synchronization Block Diagram and Simplified Application Circuit T SYNC = / f SYNC V SYNC t SYNC,TR t SYNC,TR t SYNC,PWH 4.5 V 0.5 V V SYNC,H V SYNC,L t Figure 5 Synchronization Timing Diagram Datasheet 4 Rev..0,

15 Oscillator and Synchronization 6.2 Electrical Characteristics All parameters have been tested at 25 C, unless otherwise specified. Table 2 EC Oscillator and Synchronization V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Oscillator: 6.2. Oscillator Frequency f FREQ khz R FREQ = 20kΩ Oscillator Frequency f FREQ khz Adjustment Range FREQ / SYNC Supply I FREQ -700 µa V FREQ = 0V Current Frequency Voltage V FREQ V f FREQ = 00kHz Synchronization Synchronization Frequency f SYNC khz Capture Range Synchronization Signal High Logic Level Valid V SYNC,H 3.0 V ) 2) Synchronization Signal V SYNC,L 0.8 V ) 2) Low Logic Level Valid Synchronization Signal Logic High Pulse Width t SYNC,PWH 200 ns ) 2) ) Synchronization of external PWM ON signal to falling edge 2) Not subject to production test, specified by design Datasheet 5 Rev..0,

16 Oscillator and Synchronization Typical Performance Characteristics of Oscillator Switching Frequency f SW versus Frequency Select to GND R FREQ/SYNC ffreq [khz] T j = 25 C R FREQ/SYNC [kohm] Datasheet 6 Rev..0,

17 Enable and Dimming Function 7 Enable and Dimming Function 7. Description The enable function powers ON or OFF the device. A valid logic LOW signal on enable pin EN/PWMI powers OFF the device and current consumption is less than I q_off (Parameter 7.2.4). A valid logic HIGH enable signal on enable pin EN/PWMI powers on the device. The enable function features an integrated pull down resistor which ensures that the IC is shut down and the power switch is OFF in case the enable pin EN is left open. In addition to the enable function described above, the EN/PWMI pin detects a pulse width modulated (PWM) input signal that is fed through to an internal gate driver. The internal gate driver outputs the same PWM signal on the PWMO pin to an external N-channel enhancement mode MOSFET for PWM dimming an LED load. PWM dimming an LED is a commonly practiced dimming method and can prevent color shift in an LED light source. Moreover the PWM output function may also be used to drive other types of loads besides LED. The enable and PWM input function share the same pin. Therefore a valid logic LOW signal at the EN/PWMI pin needs to differentiate between an enable power OFF or an PWM dimming LOW signal. The device differentiates between enable OFF and PWM dimming signal by requiring the enable OFF at the EN/PWMI pin to stay LOW for the Enable Turn OFF Delay Time (t EN,OFF,DEL Parameter 7.2.6). IN 4 Enable LDO IVCC Microcontroller EN / PWMI 3 Enable / PWMI Logic Enable Gate Driver 2 SWO PWMI Gate Driver 5 PWMO Figure 6 Block Diagram and Simplified Application Circuit Enable and LED Dimming Datasheet 7 Rev..0,

18 Enable and Dimming Function t EN,START T PWMI t PWMI,H t EN,OFF,DEL V EN/PWMI V EN/PWMI,ON V EN/PWMI,OFF V IVCC t V IVCC,ON V IVCC,RTH t V PWMO V SWO T FREQ = f FREQ t t Power ON Normal Dim Normal Dim Normal Power OFF Delay Time Power OFF SWO ON PWMO OFF SWO ON PWMO OFF SWO ON Iq_OFF PWMO ON SWO OFF PWMO ON SWO OFF PWMO ON Figure 7 Timing Diagram Enable and LED Dimming 7.2 Electrical Characteristics All parameters have been tested at 25 C, unless otherwise specified. Table 3 EC Enable and Dimming V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Enable/PWM Input: 7.2. Enable/PWMI V EN/PWMI,ON 3.0 V Turn On Threshold Enable/PWMI Turn Off Threshold V EN/PWMI,OFF 0.8 V Datasheet 8 Rev..0,

19 Enable and Dimming Function Table 3 EC Enable and Dimming V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max Enable/PWMI Hysteresis V EN/PWMI,HYS mv ) Enable/PWMI I EN/PWMI,H 30 µa V EN/PWMI = 6.0V High Input Current Enable/PWMI I EN/PWMI,L 0. µa V EN/PWMI = 0.5V Low Input Current Enable Turn Off t EN,OFF,DEL ms Delay Time PWMI Min Duty Time t PWMI,H 4 µs Enable Startup Time t EN,START 00 µs ) Gate Driver for Dimming Switch: PWMO Gate Driver Peak I PWMO,SRC 230 ma ) V PWMO = V to 4V Sourcing Current PWMO Gate Driver Peak I PWMO,SNK 370 ma ) V PWMO = 4V to V Sinking Current 7.2. PWMO Gate Driver Output Rise Time t R,PWMO ns ) C L,PWMO = 3.3nF; V PWMO = V to 4V PWMO Gate Driver Output Fall Time PWMO Gate Driver Output Voltage Current Consumption Current Consumption, Shutdown Mode t F,PWMO ns V PWMO V ) C L,PWMO = 3.3nF; V PWMO = 4V to V ) C L,PWMO = 3.3nF; I q_off 0 µa V EN/PWMI = 0.8 V; T j 05C; V IN = 6V I 7 ma V 4.75V; Current Consumption, Active Mode 2) q_on EN/PWMI I BO = 0mA; V SWO = 0% Duty Cycle ) Not subject to production test, specified by design 2) Dependency on switching frequency and gate charge of boost and dimming switch. Datasheet 9 Rev..0,

20 Linear Regulator 8 Linear Regulator 8. Description The internal linear voltage regulator supplies the internal gate drivers with a typical voltage of 5V and current up to I LIM,min (Parameter 8.2.2). An external output capacitor with ESR lower than R IVCC,ESR (Parameter 8.2.5) is required on pin IVCC for stability and buffering transient load currents. During normal operation the external boost and dimming MOSFET switches will draw transient currents from the linear regulator and its output capacitor. Proper sizing of the output capacitor must be considered to supply sufficient peak current to the gate of the external MOSFET switches. Integrated undervoltage protection for the external switching MOSFET: An integrated undervoltage reset threshold circuit monitors the linear regulator output voltage (V IVCC ) and resets the device in case the output voltage falls below the IVCC Undervoltage Reset switch OFF Threshold (V IVCC,RTH,d Parameter 8.2.7). The Undervoltage Reset threshold for the IVCC pin helps to protect the external switches from excessive power dissipation by ensuring the gate drive voltage is sufficient to enhance the gate of an external logic level N-channel MOSFET. IN 4 IVCC Linear Regulator EN / PWMI 3 Gate Drivers Figure 8 Voltage Regulator Block Diagram and Simplified Application Circuit Datasheet 20 Rev..0,

21 Linear Regulator 8.2 Electrical Characteristics All parameters have been tested at 25 C, unless otherwise specified. Table 4 EC Line Regulator V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max Output Voltage V IVCC V 6V V IN 45V 0.mA I IVCC 50mA Output Current Limitation I LIM 5 90 ma V IN = 3.5V V IVCC = 4.5V Drop out Voltage V DR 0.5 V V IN = 4.5V I IVCC = 25mA IVCC Buffer Capacitor C IVCC µf ) 2) IVCC Buffer Capacitor ESR R IVCC,ESR 0.5 Ω ) Undervoltage Reset Headroom V IVCC,HDRM 00 mv V IVCC decreasing V IVCC - V IVCC,RTH,d IVCC Undervoltage Reset switch OFF Threshold V IVCC,RTH,d V 3) V IVCC decreasing IVCC Undervoltage Reset switch ON Threshold V IVCC,RTH,i 4.5 V V IVCC increasing ) Not subject to production test, specified by design 2) Minimum value given is needed for regulator stability; application might need higher capacitance than the minimum. 3) Selection of external switching MOSFET is crucial and the V IVCC,RTH,d min. as worst case V GS must be considered. Datasheet 2 Rev..0,

22 Protection and Diagnostic Functions 9 Protection and Diagnostic Functions 9. Description The has integrated circuits to diagnose and protect against output overvoltage, open load, open feedback and overtemperature faults. Additionally the FBH and FBL potential is monitored and in case the LED load short circuits to GND (see description Figure 5) the regulator stops the operation and protects the system. In case any of the six fault conditions occur the PWMO and IVCC signal will change to an active logic LOW signal to communicate that a fault has occurred (detailed overview in Figure 9 and Figure 0 below). Figure illustrates the various open load and open feedback conditions. In case of an overtemperature condition the integrated thermal shutdown function turns off the gate drivers and internal linear voltage regulator. The typical junction shutdown temperature is 75 C (T j,sd Parameter 9.2.2). After cooling down the IC will automatically restart. Thermal shutdown is an integrated protection function designed to prevent IC destruction and is not intended for continuous use in normal operation (Figure 3). To calculate the proper overvoltage protection resistor values an example is given in Figure 4. Input Output Overvoltage Protection and Diagnostic Circuit Output Open Load Short to GND OR SWO and PWMO Gate Driver Off Open Feedback Overtemperature Input Undervoltage OR Linear Regualtor Off Figure 9 Protection and Diagnostic Function Block Diagram Datasheet 22 Rev..0,

23 Protection and Diagnostic Functions Input Condition Output Open Load Short to LED chain Open Feedback Overtemperature Input Level* False True False True False True False True False True False True Output SWO PWMO IVCC Sw* H or Sw * Active L L Active Sw* H or Sw * Active L L Active Sw* H or Sw * Active L L Active Sw* H or Sw * Active L L Active Sw* H or Sw * Active L L Shutdown Sw* H or Sw * Active L L Shutdown *Note: Sw = Switching False = Condition does not exist True = Condition does exist Figure 0 Diagnosis Truth Table Overvoltage Compartor OVFB V OVFB,TH 9 R OVH R OVL V BO R FB Open Circuit 3 Open Circuit Open Circuit 2 D D 2 Output Open Circuit Conditions Open Circuit Condition Fault Condition Open FBH Open FBL Open VBO Open PWMO Fault Threshold Voltage V REF -20 to -00 mv 0.5 to.0 V -20 to -00 mv Detected by overvoltage D 3 V REF Feedback Voltage Error Amplifier FBH FBL V REF - D 4 D 5 D 6 D 7 D 8 Max Threshold =.0 V Open FBL D 9 Min Threshold = 0.5 V D 0 Typical V REF = 0.3 V PWMO 5 T DIM Open Circuit 4 Max Threshold = -20 mv Min Threshold = -00 mv Open FBH Open VBO Figure Open Load and Open Feedback Conditions Datasheet 23 Rev..0,

24 Protection and Diagnostic Functions Startup Normal Thermal Shutdown Overvoltage Open Load / Feedback Shutdown V IVCC 2 3 V IVCC,RTH,i V IVCC,RTH,d t T j T j,sd,hyst T j,sd V BO V OVFB,HYS 2 t V OVFB V OVFB,TH V IN V FBH- V FBL 3 t V REF,2 t SS t SS 0.3 V Typ V REF, t V PWMO t Figure 2 Open load, Overvoltage and Overtemperature Timing Diagram Datasheet 24 Rev..0,

25 Protection and Diagnostic Functions V EN/PWMI H L t T j T jsd T jso ΔΤ Ta t V SWO t I LED I peak t V PWMO t V IVCC 5V Device OFF Normal Operation Overtemp Fault ON Overtemp Fault ON Overtemp Fault ON Overtemp Fault t Figure 3 Device overtemperature protection behavior Datasheet 25 Rev..0,

26 Protection and Diagnostic Functions example: V OUT,max=40V.25mA V OVFB V OVP,max R OVH 40V 33.2kΩ.25mA Overvoltage Protection ACTIVE OVFB 9 V OVFB,TH.25V GND 2 R OVL kω.25v Overvoltage Protection is disabled t Figure 4 Overvoltage Protection description Short to GND protection for Highside Return Applications (B2B) from Figure 23 The FBH and FBL pins features a Short to GND detection threshold (V FBL,FBH_S2G ). If the potential on those pins is below this threshold the Device stops his operation. This means that the PWMO signal changes to inactive state (LOW potential) and the corresponding p-channel (T DIM2 ) is switched OFF accordingly and protects the LED chain. For the B2B application some external components are needed to ensure a LOW potential during a short circuit event. D and D2 are low power diodes (BAS6-03W) and the resistor R lim (0kOhm) is needed to limit the current through this path. The diode D3 should be a high power diode and is needed to protect the R FB and the FBH and FBL pins in case of an short circuit to GND event. This short circuit detection and protection concept considers potential faults for LED chains (LED Modules) which are separated from the ECU via two wires (at the beginning and at the end of the LED chain). If the short circuit condition disappears, the device will re-start with a soft start. C BO D Rlim D2 V FBL,FBH 60V V bb R FB wire harness LED Module wire harness T DIM2 C IN D3 Short to GND D n D Short to GND Normal Operation L BO D BO I LED T DIM PWMO FBH FBL IN SWO SWCS SGND I SW V T OUT SW 4.5V V FBL,FBH_S2G Device working with parameter deviations Short Circuit detected on FBH/FBL t Figure 5 Short Circuit to GND Protection Datasheet 26 Rev..0,

27 Protection and Diagnostic Functions 9.2 Electrical Characteristics All parameters have been tested at 25 C, unless otherwise specified. Table 5 EC Protection and Diagnosis V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Short Circuit Protection 9.2. FBH and FBL Short-Circuit fault sensing common mode range V FBL,FBH_S2G.5 2 V refer to Figure 5 V FBH =V FBL decreasing Temperature Protection: Over Temperature Shutdown T j,sd C ) refer to Figure Over Temperature Shutdown T j,sd,hyst 5 C ) Hystereses Overvoltage Protection: Output Over Voltage Feedback V OVFB,TH V refer to Figure 4 Threshold Increasing Output Over Voltage Feedback V OVFB,HYS mv ) Output Voltage Hysteresis decreasing Over Voltage Reaction Time t OVPRR 2 0 µs Output Voltage decreasing Over Voltage Feedback Input I OVFB - 0. µa V OVFB =.25V Current Open Load and Open Feedback Diagnostics Open Load/Feedback Threshold ) Specified by design; not subject to production test. V REF,, mv refer to Figure V REF = V FBH - V FBL Open Circuit or Open Feedback Threshold V REF,2 0.5 V V REF = V FBH - V FBL Open Circuit 2 Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as outside normal operating range. Protection functions are not designed for continuous repetitive operation. Datasheet 27 Rev..0,

28 Analog Dimming 0 Analog Dimming This pin is influencing the Feedback Voltage Error Amplifier by generating an internal current accordingly to an external reference voltage (V SET ). If the analog dimming feature is not needed this pin must be connected to IVCC or external >.6V supply. Different application scenarios are described in Figure 8. This pin can also go outside of the ECU for instance if a thermistor is connected on a separated LED Module and the Analog Dimming Input is used to thermally protect the LEDs. For reverse battery protection of this pin an external series resistor should be placed to limit the current. 0. Purpose of Analog Dimming: ) It is difficult for LED manufacturers to deliver LEDs which have the same Brightness, Colorpoint and Forward Voltage Class. Due to this relatively wide spread of the crucial LED parameters customers order LEDs from one or maximum two different colorpoint classes. The LED manufacturer must preselect the LEDs to deliver the requested colorpoint class. Those preselected LEDs are matched in terms of the colorpoint but a variation of the brightness remains. To correct the brightness deviation an analog dimming feature is needed. The mean LED current can be adjusted by applying an external voltage V SET at the SET pin. 2) If the DC/DC application is separated from the LED loads the ECU manufacturers aim is to develop one hardware which should be able to handle different load current conditions (e.g. 80mA to 400mA) to cover different applications. To achieve this average LED current adjustment the analog dimming is a crucial feature. 0.2 Description Application Example: Desired LED current = 400mA. For the calculation of the correct Feedback R FB the following equation can be used: This formula is valid if the analog dimming feature is disabled and V SET >.6V. V I LED = R REF FB V R = 0.3V 400mA --> REF FB I --> R = = m Ω FB 750 LED A decrease of the average LED current can be achieved by controlling the voltage at the SET pin (V SET ) between 0V and.6v. The mathematical relation is given in the formula below: I LED = V SET 5 * R 0, V FB If V SET is 00mV the LED current is only determined by the internal offset voltages of the comparators. For this example I LED = 0A if V SET < 00mV. Refer to the concept drawing in Figure 7. Datasheet 28 Rev..0,

29 Analog Dimming V REF [V] typ. 300mV 00 mv.6v Analog Dimming Feature Enabled VSET 0.V ILED = 5* R FB Analog Dimming Disabled VREF I LED = R FB V SET [V] Figure 6 Voltage V SET versus LED current V REF V OUT I LED R FB FBL FBH 7 6 I FBL I FBH V int R 2 R V Bandgap =.6V V REF_offset + - Feedback Voltage Error Amplifier I SET n*i SET I SET SET V SET R 3 COMP 8 2 GND 00mV C COMP R COMP Figure 7 Concept Drawing Analog Dimming Datasheet 29 Rev..0,

30 Analog Dimming Multi-purpose usage of the Analog dimming feature ) A µc integrated digital analog converter (DAC) output or a stand alone DAC can be used to supply the SET pin of the. The integrated voltage Regulator (V IVCC ) can be used to supply the µc or external components if the current consumption does not exceed 25mA. 2) The analog dimming feature is directly connected to the input voltage of the system. In this configuration the LED current is reduced if the input voltage V IN is decreasing. The DC/DC boost converter is changing (increasing) the switching duty cycle if V IN drops to a lower potential. This is causing an increase of the input current consumption. If applications require a decrease of the LED current in respect to VIN variations this setup can be choosen. 3) The usage of an external resistor divider connected between IVCC (integrated 5V regulator output and gate buffer pin) SET and GND can be choosen for systems without µc on board. The concept allows to control the LED current via placing cheap low power resistors. Furthermore a temperature sensitive resistor (Thermistor) to protect the LED loads from thermal destruction can be connected additionally. 4) If the analog dimming feature is not needed the SET pin must be connected directly to >.6V potential (e.g. IVCC potential) 5) Instead of an DAC the µc can provide a PWM signal and an external R-C filter is producing a constant voltage for the analog dimming. The voltage level is depending on the PWM frequency (f PWM ) and duty cycle (DC) which can be controlled by the µc software after reading the coding resistor placed at the LED module. Datasheet 30 Rev..0,

31 Analog Dimming. +5V 2 D/A-Output 0 IVCC SET C IVCC V bb R SET2 4 IN µc V SET 0 SET GND 2 V SET R SET C filter GND V IVCC = +5V IVCC V IVCC = +5V IVCC R SET2 CIVCC R filter C IVCC 0 SET 0 SET V SET R SET C filter GND 2 V SET ~ V IVCC C filter GND V IVCC C IVCC PWM PWM output µc (e.g. XC866) Rfilter 0 SET C filter V SET GND 2 Figure 8 Analog Dimming in various applications Datasheet 3 Rev..0,

32 Analog Dimming 0.3 Electrical Characteristics All parameters have been tested at 25 C, unless otherwise specified. Table 6 EC Analog Dimming V IN = 24V; T j = -40 C to +25 C, all voltages with respect to ground, positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Analog Dimming Range ) 0.3. SET programming range V SET 0.6 V refer to Figure 6 ) Specified by design; not subject to production test. Datasheet 32 Rev..0,

33 Application Information Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. I BO VIN = 4.5V to 45V L BO D BO V BO C IN I SW C BO R FB V REF 4 IN SWO 2 T SW CIVCC IVCC SWCS 4 D R CS D2 VCC or VIVCC Analog Dimming IC 2 Microcontroller (e.g. XC866) PWM PWMI Rfilter VSET Cfilter 0 SET IC SGND OVFB 3 9 R OVH R OVL D3 D4 D5 D6 D7 Classic Boost Setup: VOUT > VIN Input Digital Dimming Output 3 EN / PWMI FREQ / SYNC FBH 6 D8 D9 8 COMP FBL 7 D0 I LED C COMP PWMO TDIM PWMO 5 R FREQ R COMP GND 2 Figure 9 LED Low Side Return Application Circuit (Boost to GND, B2G) Reference Designator D - 0 D BO C IN, C BO C COMP C IVCC IC IC 2 L BO R COMP R FB R FREQ R OVH R OVL R CS T DIM,T SW Value White Schottky, 3 A, 00 V R 00 uf, 50V 00 uh Manufacturer Osram Vishay Panasonic Coilcraft Part Number LW W5SM EEEFKH0GP 0 nf EPCOS X7R uf, 6.3V Dual N-ch enh. (60V, 20A) EPCOS Infineon Infineon Infineon SS3H0 MLCC CCNPZC05KBW X7R XC866 MSS278T-04ML 0 kω, % Panasonic ERJ3EKF002V 820 mω, % Panasonic ERJ4BQFR82U 20 kω, % Panasonic ERJ3EKF2002V 33.2 kω, % Panasonic ERJ3EKF3322V kω, % Panasonic ERJ3EKF00V 50 mω, % Panasonic ERJBCFR05U IPG20N06S4L-26 Type LED Diode Capacitor Capacitor Capacitor IC IC Inductor Transistor Quantity alternativ: 00V N-ch, 35A Infineon IPD35N0S3L-26 Transistor 2 alternativ : 60V N-ch, 2.6A Infineon BSP38S Transistor Figure 20 Bill of Materials for LED Low Side Return Application Circuit Datasheet 33 Rev..0,

34 Application Information L CSEPIC D BO VIN = 4.5V to 45V V IN C IN I SW L 2 R FB V REF CBO 4 IN SWO 2 T SW SWCS 4 I LED RCS VCC or VIVCC SGND 3 R OVH D Analog Dimming PWM VSET 0 SET OVFB 9 IC 2 Microcontroller (e.g. XC866) Input Digital Dimming Output PWMI Rfilter Cfilter 3 EN / PWMI FREQ / SYNC IC FBH 6 R OVL Number of LEDs could be variable: ) VIN > VOUT (BUCK) 2) VIN < VOUT (BOOST) 8 COMP FBL 7 C COMP D POL R POL IVCC D n CIVCC R FREQ R COMP PWMO GND 2 PWMO 5 TDIM Figure 2 SEPIC Application Circuit Reference Designator D - n D BO C SEPIC C IN, C BO C COMP C IVCC IC IC 2 L, L 2 R COMP, R POL D POL R FB R FREQ R OVH R OVL R CS T DIM,T SW Value White Schottky, 3 A, 00 V R 00 uf, 50V 47 uh Manufacturer Osram Vishay Panasonic Coilcraft Part Number LW W5SM EEEFKH0GP 0 nf EPCOS X7R uf, 6.3V Dual N-ch enh. (60V, 20A) EPCOS Infineon Infineon Infineon SS3H0 MLCC CCNPZC05KBW X7R XC866 MSS278T-473ML 0 kω, % Panasonic ERJ3EKF002V 820 mω, % Panasonic ERJ4BQFR82U 20 kω, % Panasonic ERJ3EKF2002V 33.2 kω, % Panasonic ERJ3EKF3322V kω, % Panasonic ERJ3EKF00V 50 mω, % Panasonic ERJBCFR05U IPG20N06S4L-26 Type LED Diode Capacitor Capacitor Capacitor IC IC Inductor Transistor Quantity variable 3.3 uf, 20V EPCOS X7R, Low ESR Capacitor alternativ: 22uH coupled inductor Coilcraft MSD MLD Inductor 80V Diode Infineon BAS603W Diode alternativ: 00V N-ch, 35A Infineon IPD35N0S3L-26 Transistor 2 alternativ : 60V N-ch, 2.6A Infineon BSP38S Transistor Figure 22 Bill of Materials for SEPIC Application Circuit Datasheet 34 Rev..0,

35 Application Information C BO DSC: Low Power Diode Rlim:0kΩ range DSC2: Low Power Diode V IN R FB TDIM2 V IN = 4.5V to 45V C IN D3 Power Schottky Diode Dn Short to GND VOUT is always higher than VIN Therefore: Number of LEDs could be variable! D Short to GND D Z R DIM R DIM2 L BO D BO T DIM I SW PWMO 5 PWMO T SW SWO 2 I LED V OUT SWCS 4 V CC or V IVCC Analog Dimming PWM FBH FBL IN SET SGND OVFB 3 9 R CS R OVH IC 2 Microcontroller (e.g. XC866) Input Digital Dimming PWMI Rfilter Cfilter VSET 3 EN / PWMI IC R OVL Output FREQ / SYNC COMP 8 IVCC C COMP CIVCC R FREQ GND 2 R COMP Figure 23 LED High Side Return Application Circuit (Boost to Vbb, B2B) Reference Designator Value Manufacturer Part Number Type Quantity D - n White Osram LW W5AP Diode variable D BO, D 3 Schottky, 3 A, 00 V R Vishay SS3H0 Diode 2 D SC, D SC2 Low Power Diode Infineon BAS6-03W Diode 2 DZ Zener Diode Diode C BO CIN 00 uf, 80V Panasonic EEVFKK0Q Capacitor 00 uf, 50V Panasonic EEEFKH0GP Capacitor C COMP 0 nf EPCOS X7R Capacitor CIVCC uf, 6.3V EPCOS MLCC CCNPZC05KBW X7R Capacitor IC -- Infineon IC IC 2 -- Infineon XC866 IC LBO 00 uh Coilcraft MSS278T-04ML_ Inductor RCOMP, RDIM, RDIM2, Rlim 0 kω, % Panasonic ERJ3EKF002V 4 R FB 820 mω, % Panasonic ERJ4BQFR82U R FREQ 20 kω, % Panasonic ERJ3EKF2002V ROVH 33.2 kω, % Panasonic ERJP06F502V R OVL kω, % Panasonic ERJ3EKF00V R CS 50 mω, % Panasonic ERJBCFR05U TDIM,TDIM2 60V Dual N-ch (3.A) and P-ch. enh. (2A) Infineon BSO65CG Transistor alternativ: 00V N-ch (0.37A), Infineon BSP23 Transistor alternativ: 60V P-ch (.9A) Infineon BSP7P Transistor TSW N-ch, OptiMOS-T2 00V, 35A Infineon IPD35N0S3L-26 Transistor AppDiagLED _HSR_HSSBOM.vsd alternativ: 60V N-ch, 30A Infineon IPD30N06S4L-23 Transistor alternativ : 60V N-ch, 2.6A Infineon BSP38S Transistor Figure 24 Bill of Materials for LED High Side Return Application Circuit Datasheet 35 Rev..0,

36 Application Information I BO V IN = 4.5V to 45V V IN L BO D BO V BO I Load C IN ISW C BO R L constant V OUT 4 IN SWO 2 T SW IVCC SWCS 4 C IVCC R CS V CC or V IVCC PWM SGND 3 R OVH Analog Dimming 0 SET OVFB 9 IC 2 Microcontroller (e.g. XC866) Rfilter V SET Cfilter 5 PWMO IC R OVL R FB Digital Dimming 3 EN / PWMI Output FREQ / SYNC FBH 6 8 COMP R FB2 V REF C COMP FBL 7 R FREQ R COMP GND R FB 3 2 Figure 25 Boost Voltage Application Circuit Reference Designator Value Manufacturer Part Number Type Quantity D BO Schottky, 3 A, 00 V R Vishay SS3H0 Diode C BO C IN 00 uf, 80V Panasonic EEVFKK0Q Capacitor 00 uf, 50V Panasonic EEEFKH0GP Capacitor C COMP 0 nf TBD TBD Capacitor C IVCC uf, 6.3V Panasonic MLCC CCNPZC05KBW X7R Capacitor IC -- Infineon IC IC 2 -- Infineon XC886 IC L BO 00 uh Coilcraft MSS278T-04ML_ Inductor R COMP 0 kω TBD TBD R FB,R FB3 5 kω, % Panasonic ERJ3EKF502V R FB2 kω, % Panasonic ERJ3EKF00V R FREQ 20 kω, % Panasonic ERJ3EKF2002V 2 R OVH 5 kω, % Panasonic ERJP06F502V R OVL kω, % Panasonic ERJ3EKF00V R CS 50 mω, % Panasonic ERJBCFR05U T SW N-ch, 75 V, 65 mω Infineon IPD22N08S2L-50 Transistor Figure 26 Bill of Materials for Boost Voltage Application Circuit Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Datasheet 36 Rev..0,

37 Application Information. Further Application Information In fixed frequency mode where an external resistor configures the switching frequency the minimum boost inductor is given by the formula in Figure 27. L MIN = Minimum Inductance Required During Fixed Frequency Operation V BO = Boost Output Voltage R CS = Current Sense f FREQ = Switching Frequency Note: In SEPIC configuration the equation below is valid if a coupled inductor (two coils on one magnetic core) is used. If the SEPIC application consists of two independent coils, the L MIN value should be doubled. V BO [ V] R CS [ Ω] L MIN [ V] f FREQ [ Hz] Figure 27 Minimum Inductance Required During Fixed Frequency Operation (B2G configuration) In synchronization mode where an external clock source configures the switching frequency the minimum boost inductor is given by the formula in Figure 28. L SYNC = Minimum Inductance Required During Synchronization Operation V BO = Boost Output Voltage R CS = Current Sense V BO [ V] R CS [ Ω] L SYNC [ V] 250kHz Figure 28 Minimum Inductance Required During Synchronization Operation (B2G configuration) Please contact us for information regarding the FMEA pin. Existing App. Note For further information you may contact Datasheet 37 Rev..0,

38 Package Outlines 2 Package Outlines Stand Off (.45).7 MAX. C 0.08 C 0.35 x ±0. ) 0. C D ± MAX ±0.05 2) 0.5 M C A-B D 4x D 6 ± M D 8x Bottom View A B 0. C A-B 2x 4.9 ±0. ) Exposed Diepad 3 ± ±0.2 Index Marking ) Does not include plastic or metal protrusion of 0.5 max. per side 2) Does not include dambar protrusion PG-SSOP-4-,-2,-3-PO V02 PG-SSOP-4 Figure 29 PG-SSOP-4 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further package information, please visit our website: Dimensions in mm Datasheet 38 Rev..0,

39 Revision History 3 Revision History Revision Date Changes Initial Datasheet Datasheet 39 Rev..0,

40 Edition Published by Infineon Technologies AG 8726 Munich, Germany 20 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.