Analysis, design and implementation of an improved two-switch zero-current zero-voltage pulse-width modulation forward converter

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1 Published in IET Power Electronics Received on 11th June 2013 Revised on 21st July 2013 Accepted on 17th August 2013 ISSN Analysis, design and implementation of an improved two-switch zero-current zero-voltage pulse-width modulation forward converter Karim Soltanzadeh 1, Majid Dehghani 1, Hosein Khalilian 2 1 Department of Electrical Engineering, Najafabad Branch, Islamic Azad University, Najafabad, Iran 2 Department of Electrical Engineering, Tabriz National University, Tabriz, Iran k.soltanzadeh@yahoo.com Abstract: In this study, an improved two-switch zero-current zero-voltage switching pulse-width modulation (ZCZVS-PWM) forward converter, which employs a simple resonant lossless snubber circuit, is introduced. A simple resonant snubber circuit consists of a capacitor, an inductor and two diodes. In proposed converter, switch Q 1 operates under exactly zero-current switching at turn-on, and exactly zero-voltage switching (ZVS) at turn-off, and switch Q 2 operates under exactly ZCZVS at turn-on, and ZVS at turn-off, and the all-passive semiconductor devices operate under soft-switching at turn-on and turn-off. The proposed converter has no current and voltage spikes in the switches in comparison with the hard-switching forward converter counterpart and is suitable for high switching frequency and high-power operation. The proposed converter is analysed and various operating modes of the improved two-switch ZCZVS-PWM forward converter are discussed. Analysis and design considerations are presented and the prototype experimental results of a 160 W (32 V/5 A) proposed converter operating at 300 khz switching frequency, confirm the validity of theoretical analysis. 1 Introduction Pulse-width-modulated (PWM) forward converter is used in the industry in a wide variety of applications. This converter is required to operate with high switching frequency because of demands for small converter size and high-power density. High switching frequency operation, however, results in higher switching losses, increased electromagnetic interference (EMI) and reduced converter efficiency. In the classical configuration of the forward converter uses a tertiary winding for core reset [1, 2], and a disadvantage of the reset winding is that the transformer leakage inductance discharge spike cannot be put off. The leakage spike sums up with the voltage induced by the reset winding and causes a high-voltage spike across the active switch. In [3], a resistorcapacitor-diode (RCD) clamp circuit was proposed for the forward converter transformer reset. The RCD snubber is simple, but the power stored in snubber capacitor dissipates on the resistor and the switch turns off at hard-switching, thus the overall efficiency of converter is still low. In order to decrease the switching losses and absorb the voltage spikes while reducing the converter losses, active snubber and clamps are applied to dc dc forward converters [4 19]. Almost all these techniques achieve soft-switching condition in the switch using an active auxiliary circuit. Resonant forward converters have been presented in [4 7] to reduce switching losses and increase system efficiency. However, the voltage stress in resonant converters is high for high-input voltage applications. The high-voltage or current stress on semiconductors will increase conduction losses. The forward converters with the zero-voltage switching (ZVS) technique have been presented in [8 12]. However, the main drawbacks of these schemes are the complex control approach and too many power switches in the circuit. In [13, 14] active clamp, ZVS forward converters providing ZVS condition for the converter switch were presented. In the active clamp technique, the soft-switching condition is load dependent and soft-switching condition is lost under light load condition. In [15 17], zero-current switching (ZCS) forward converter is introduced. In [15], an extra winding is required to reset the transformer core just like the regular forward converter. In [16, 17], an auxiliary circuit on the secondary side of transformer is required. However, this auxiliary circuit is complex. In [18, 19], conventional reset winding in switching transformer were removed, but these converters must operate at frequency modulation and output filter is not optimum. The aim of this paper is to introduce a simple snubber cell for dc/dc PWM two-switch forward converter. The proposed improved two-switch zero-current zero-voltage switching pulse-width modulation (ZCZVS-PWM) forward converter is depicted in Fig. 1. The ZCZVS technique in this paper is provided by a snubber cell. The snubber cell consists of a resonant inductor L r, a resonant capacitor C r and two diodes D r and D. The switch Q 1 in the proposed converter is turned ON under ZCS, and Q 2 is turned ON under ZCZVS, 1016 Downloaded from

2 Fig. 1 Proposed two-switch ZCZVS-PWM forward converter and both switches are turned off under ZVS condition without voltage spikes. To simplify the steady-state analysis of the circuit given in Fig. 1 during one-switching cycle, it is assumed that input and output voltages and output current are constant, and semiconductor devices and resonant circuit are ideal. Section 2 presents the principle of circuit operation and analysis of the proposed converter. The converter design procedure is given in Section 3. In Section 4, experimental results for a 160 W (32 V/5 A) proposed converter operating at 300 KHz switching frequency are given. Finally, in Section 5, the conclusions and discussions are presented. 2 Operation principles and analysis Seven stages occur within one-switching cycle in the steady-state operation of the proposed converter. The main theoretical waveforms of the proposed forward converter are shown in Fig. 2. The equivalent circuit schemes of these operation stages are given in Figs. 3a g, respectively. At earlier moment of t = t 0, the equations (t) = V s and (t) = i Ld (t) = 0 are valid. Stage 1 [t 0,t 1 :Fig.3a]: At the beginning of this stage, the switches Q 1 and Q 2 are off and the free-wheeling diode D 2 is in the on state and conducts the load current I o.att = t 0,both the switches Q 1 and Q 2 areturnedonbyanexternalgate driver circuit, and Q 1 turns on under exactly ZCS through leakage inductor,andq 2 turns on under exactly ZCZVS. The clamping diodes D m1 and D m2 are reverse biased and hence their currents i Dm1 (t) and i Dm2 (t) are zero. Since (t) = V s, the diode D r turns on under ZVZCS at t = t 0,and the resonance between C r and L r occurs, and resonant capacitor C r begins to discharge on the resonant inductor L r and (t) increases. The voltage across the leakage inductance is V s. The current through the leakage inductance and rectifier diode D 1 rises and the i D2 (t)fallsfromi o to zero at t = t 1 given by Fig. 2 Theoretical waveforms voltage (t) can be written as follows in this interval. (t) = V s sin v (t t 0 ) r (4) (t) = V s cos v r (t t 0 ) (5) where the characteristic impedance is = L r C r (6) i Ld (t) = i Q2 (t) = V s (t t 0 ) (1) i D1 (t) = nv s (t t 0 ) (2) and the resonant frequency ω r is given by v r = 1/ L r C r So the current through the switch Q 1 is (7) i D2 nv s (t t 0 ) (3) The resonant inductance current (t) and the resonant capacitor i Q1 (t) = V s (t t 0 ) + V s sin v r (t t 0 ) (8) At t = t 1, the current through the switch Q 2 reaches I o /n and the 1017

3 Fig. 3 Equivalent circuit schemes of the operation stages in the proposed converter 1018

4 free-wheeling diode D 2 turns off with almost ZCZVS and this stage finishes. The duration of this time interval is Dt 1 = t 1 t 0 = I o nv s (9) Stage 2 [t 1,t 2 :Fig. 3b]: During this stage, the switches Q 1, Q 2 and diodes D 1, D r are on, and another diodes are off. The voltage across the leakage inductance is V s and the leakage inductance is linearly charged by the input voltage source. The switch current i Q2 (t)equals I o /n and i D1.Att = t 1 the resonance between C r and L r continues in stage 1, and the resonant capacitor voltage (t) decreases and (t) increases fastly. At t = t x1, (t) falls to zero and (t) reaches to its peak value V s /. The resonant currents (t), i Q1 (t) and the resonant voltage (t) aregivenas (t) = V C r (t 1 ) sin v r (t t 1 ) + (t 1 )cosv r (t t 1 ) (10) (t) = V Cr (t 1 )cosv r (t t 1 ) (t 1 ) sin v r (t t 1 ) (11) The time interval Δt x1 is i Q1 n + i L r (t) (12) ( ) Dt x1 = t x1 t 1 = 1 tan 1 V Cr (t 1 ) v r I Lr (t 1 ) (13) At t = t 2, (t) reaches to V s and the resonant inductor current (t) decreases from its peak value V s /, and falls to zero, and then resonant diode D r turns off under exactly ZVZCS. The resonant currents (t), i Q1 (t) and the resonant voltage (t) are given as The time interval Δt x2 is (t) = V s cos v r (t t x1 ) (14) (t) = V s sin v r (t t x1 ) (15) i Q1 n + i L r (t) (16) Dt x2 = t 2 t x1 = p 2.v r (17) At t = t 2, i Q1 /nand this stage finishes. The time interval of this stage is given as Dt 2 = t 2 t 1 = Dt x1 + Dt x2 = p v r Dt 1 (18) Stage 3[t 2, t 3 :Fig. 3c]: This stage is on state of the conventional two-switch PWM forward converter and power transfer process occurs from source to load. During this stage, the voltage across the leakage inductance is V s and it is linearly charged by the input voltage source. The currents (t), i Q1 (t), i Q2 (t) and resonant voltage (t) are given as (t) = i Dr (t) = 0 (19) i Q1 (t) = i Q2 n (20) (t) = V s (21) At t = t 3, the switches Q 1 and Q 2 turn-off under ZVS condition because of capacitor charge, and resonant diode D turns on under ZVS and this stage finishes. The time interval Δt 3 of this stage is written as Dt 3 = DT s Dt 2 Dt 1 (22) where D is the duty cycle of control signal and T s =1/f s is the switching period. f s is the switching frequency. Stage 4 [t 3, t 4 :Fig. 3d]: Since the resonant capacitor C r is precharged to V s from stage 2, the power switches Q 1 and Q 2 turn-off under ZVS condition at t = t 3, then reflected load current I o /n forces the snubber diode D on. During this stage, the voltage across C r is discharged by reflected load current and the energy stored in C r is released to the load side. Negative voltage across C r keeps the diode D 1 on. As the voltage across C r decreases, the voltage across the switches increases. The resonant capacitor voltage (t) for this interval is derived as nc r (t t 3 ) V s (23) This stage ends at time t = t 4, when the voltage across resonant capacitor C r is discharged by reflected load current completely and falls to zero, and allowing diode D 2 starts to conduct. The time interval of this stage is as Dt 4 = t 4 t 3 = nv sc r I o (24) Stage 5 [t 4, t 5 :Fig. 3e]: At t = t 4, the diode D 2 starts to conduct and the resonance between leakage inductance and capacitor C r begins. During this stage, the current i Ld (t) decreases from its peak value and charges (t) from zero. The resonant current starts the power rectifiers commutation, so that D 1 current drops while D 2 current rises. The resonant currents i Ld (t)and resonant voltage (t) are given as where and I Ld n cos v d(t t 4 ) (25) nz d sin v d (t t 4 ) (26) Z d = C r (27) v d = 1 (28) C r This stage ends at time t = t 5 when the voltage across each switch and (t) equalsv s thus turning on the clamping diodes D m1 and D m1 under ZVZCS and snubber diode D 1019

5 turns OFF under exactly ZVZCS. The time interval of this stage is as Dt 5 = 1 v d arcsin ( ) nv s Z d I o (29) Stage 6 [t 5, t 6 :Fig. 3f]: At t = t 5, the clamping diodes D m1 and D m1 turn-on and transformer starts with the beginning of reset and i Ld (t) decreases. During this stage, the voltage across each switch and (t) equals V s, the current of free-wheeling diode i D2 (t) rises and the current of rectifier diode i D1 (t) falls simultaneously and linearly. The currents i Ld (t), i Dm1 (t), i Dm2 (t), i D1 (t) and i D2 (t) are given as I Ld (t) = i Dm1 (t) = i Dm2 (t) = V s (t t 5 ) + I Ld (t 5 ) (30) I D1 (t) = ni Dm1 (t) = nv s (t t 5 ) + ni Ld (t 5 ) (31) I D2 ni Dm1 + nv s (t t 5 ) ni Ld (t 5 ) (32) This stage ends at time t = t 6 when i D2 (t) arrives to load current I o, and diodes D 1, D m1 and D m1 turn of under ZVZCS condition. The time interval of this stage is as Dt 6 = t 6 t 5 = I (t 5 ) V s (33) Stage 7 [t 6, t 7 :Fig. 3g]: This stage at t = t 6 starts when the current of free-wheeling diode i D2 (t)arrives to the load current I o. This stage is off-state of the conventional PWM forward converter. At t = t 7, one-switching cycle is completed and another switching cycle begins. 3 Design two-switch ZCZVS-PWM forward procedure 3.1 DC voltage transfer function Referring to the voltage waveform of the output inductor in Fig. 2 and applying volt second balance, we have ( ) V s n V (Dt 1 + Dt 2 + Dt 3 ) o (V o )(Dt 4 + Dt 5 + Dt 6 + Dt 7 ) (34) Assuming that the time duration of stages 1 and 4 is very small in comparison with those of stages 2, 3, 5, 6 and 7, the dc voltage transfer function is approximately M = V o D s V s n 3.2 Design power switches and power diodes (35) During stage 4, the maximum off-state voltage appearing across power switches is almost the same as a standard hard-switching two-switch forward converter design and given by V = V = V Q 1 (max ) Q 2 (max ) s (36) During stage 2, the maximum value of the current through the power switch Q 1 is I Q1 (max ) = I o(max ) n + V s (37) During stage 2, the maximum value of the current through the power switch Q 2 is I Q2(max = I o(max ) (38) ) n The maximum reverse voltages across the power diodes D 1 and D 2 are almost the same as a standard hard-switching forward converter design and given by VD 1 (max ) = V D 2 (max ) = V s n (39) The maximum value of the currents through the power diodes is I D1 (max ) = I D 2 (max ) = I o(max ) (40) 3.3 Design the snubber parameters Snubber capacitor: The snubber capacitor is designed to control dv/dt of the drain-to-source voltage of the power switches. When the main switches turn-off, it provides an alternative path for the leakage inductance current to reduce switching turning-off losses and dv/dt EMI noises. High-frequency response capacitor with low equivalent series resistance is required. The capacitor C r in proposed converter is mainly responsible for ZVS turn-off of power switches. Thus, the discharging time of C r should be larger than the fall time of the switch to ensure proper ZVS turn-off of the switch. During stage 4, the switches Q 1 and Q 2 turn-off and the current I o /n flows through snubber diode D to discharge C r to leakage inductance. During this stage, capacitor discharges linearly. Thus Δt 4 = t ZVS is time that C r discharges completely from the value V s to zero. To ensure proposed ZVS turn-off of the switches, discharge time t ZVS is taken to be approximately three-times the fall time t f of switches. The snubber capacitor is derived as C r = I o( max ) nv s( min ) (3t f ) (41) Snubber inductor: In order to minimise the influence of the resonant parameters and to easily achieve ZVS turning-off for power switch, we selected f s /f r = Thus, we can obtain the resonant inductor L r as follows 1 L r = (2pf r ) 2 (42).C r Snubber diodes: During stage 1, the maximum value of the current through the snubber diode D r is I Dr = V s (max ) (43) (max ) The maximum reverse voltage across the D r is V Dr (max ) = V s(max ) (44) 1020

6 During stage 4, the maximum value of the current through the snubber diode D is I D (max ) = I o(max ) n The maximum reverse voltage across the D is 4 Experimental result (45) V D(max ) = V s(min ) (46) The ZVZCS PWM forward converter is designed for the following specifications: Maximum output power: P o = 160 W; Output voltage: V o = 32 VDC; Maximum input voltage: V s = 180 VDC; Minimum input voltage: V s = 120 VDC; Nominal input voltage: V s = 150 VDC; Switching frequency = f s = 300 khz. 4.1 Design transformer and output filter Although the lossless snubber cell is present in the two-switch PWM forward converter, the transformer turns ratio and output filter can be selected using the traditional hard-switching forward converter design method [20] as follows n = n 1 n 2 = hv s(min )D max V = 1.62 where η is the efficiency of converter, and we assumed that η = 0.9. D max is the maximum value of the duty cycle and D max = 0.48 is selected with reference to [21]. Ferrite EE30 core is selected as a core of power transformer. The filter inductance L f and filter C f capacitor are designed like a regular PWM forward converter. Voltage output ripple and current output ripple must not exceed 1 and 20%, respectively. L F. V o(1 D) DI LF.f L F = 150 mh,. 1 D 8.L F. DV o V o.f 2, C F = 4.7 mf Using the design procedure discussed in the previous section, the following components were selected: Power switches Q 1 and Q 2 : IRF640; Power diodes D 1 and D 2 : HER605; C F Fig. 4 Complete circuit of the implemented prototype 1021

7 Fig. 5 Voltage and current of the switch Q 1,v Q1 (t) = 100 V/div, i Q1 (t) = 5 A/div, V GS (t) = 20 V/div, time:0.5 μs/div Fig. 8 Leakage inductance current and voltage across resonance capacitor, ( t): 100 V/div, i Ld ( t): 3 A/div, time:0.5 μ/div Fig. 6 Voltage and current of the switch Q 1,v Q2 (t) = 100 V/div, i Q2 (t) = 5 A/div, V GS (t) = 20 V/div, time:0.5 μs/div Snubber diodes D r and D: HER604; Output inductor L F = 150 μh: ferrite EI28 core/60 turns/2 mm air gap length; Snubber capacitor C r = 1 nf/250 V; Snubber inductor L r =6μH, ferrite EE10 core/10turns/0.1 mm air gap length. Filter capacitor C F = 4.7 μf/60 V. The complete prototype circuit diagram of the proposed converter is shown in Fig. 4. The control system implemented by two main IC and they are TL494 and HIP2500. The output pulse of the TL494 Fig. 9 Current of diode D and voltage across resonance capacitor, ( t): 100 V/div, i D (t): 2 A/div, time:0.5 μ/div PWM controller is applied to HIP2500. TL494 used for control output voltage, and produces PWM pulse signal. The HIP2500 is high-voltage, high-speed power MOSFET driver with independent high- and low-side referenced output channels. The output pulse of HO pin of HIP2500 is applied to gate of switch Q 2 and LO pin is applied to gate of switch Q 1. Fig. 7 Resonant inductance current and voltage across resonance capacitor, ( t): 100 V/div, ( t): 2 A/div, time:0.5 μ/div Fig. 10 Efficiency of the proposed converter (continuous line) and hard-switching counterpart (broken line) against output power 1022

8 Figs. 5 9 have shown some obtained experimental results of the prototype proposed converter. It can be seen that the experimental waveforms are closed to theoretical waveform, and confirming the soft-switching without voltage and current spikes. Fig. 5 has shown voltage and current of the switch Q 1, and Fig. 6 has shown voltage and current of the switch Q 2. In Figs. 5 and 6, it can be noticed that Q 1 and Q 2 operate in ZCS and ZCZVS turn-on, and both of them operate in ZVS turn-off, and it can also be noticed that they do not have any voltage and current spikes in switching state. Fig. 7 has shown voltage across resonant capacitor (t) and resonant inductance current (t); Fig. 8 has shown voltage across resonant capacitor (t) and the leakage inductance current i Ld (t); and Fig. 9 has shown voltage across resonant capacitor (t) and the diode D current i D (t). The efficiency curve of the proposed converter against output power is shown in Fig. 10. Note that the proposed converter has 91% efficiency in full load, and also has high efficiency in light load. 5 Conclusion In this paper, an improved two-switchzczvs-pwm forward converter that employs a simple snubber circuit that overcomes most of the drawbacks of the normal PWM forward converter is proposed. In the proposed converter, the switches Q 1 and Q 2 operate at ZCS and ZCZVS turn-on respectively and both of them operate at ZVS turn-off, and the all-passive semiconductor devices operate at soft-switching turn-on and turn-off. This new converter has no additional current and voltage spikes of the main switches, and it is suitable for high switching frequency and high-power operation. A PWM ZCZVS two-switch forward converter has been analysed in detail. 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