FUJITSU ASSP PRODUCTS Power Management ICs. 1-ch DC/DC Converter IC for Low Voltage MB39A105

Transcription

1 (1/12) *This document summarizes major features of the device. The contents of this document are preliminary. A formal specification is separately provided by DATA SHEET. FUJITSU ASSP PRODUCTS Power Management ICs Version 2.0 April, ch DC/DC Converter IC for Low Voltage MB39A105 DESCRIPTION The MB39A105 is a 1-channel pulse width modulation (PWM) DC/DC converter IC for low voltage. This IC is ideal for up conversion. This IC is a lowest operating voltage of 1.8V, and is the ideal of power supply for low voltage operation such as LCD panel module. FEATURES Power supply voltage range : 1.8 V to 6 V Reference voltage precision : ±1 % High frequency operation : 1MHz(Max) Built-in standby current function : 0µA(typ) Built-in timer-latch short-circuit protection circuit Built-in short-circuit protection detection output function Built-in circuit for load-independent soft-start Totem-pole type output for N-ch MOS FET Package : TSSOP-8P(thickness : 1.1mm Max) PACKAGE 8-pin plastic TSSOP

2 (2/12) PIN ASSIGNMENT (TOP VIEW) -INE 1 8 FB CSCP 2 7 RT VCC 3 6 GND SCPOD 4 5 OUT PIN DISCRIPTIONS Pin no. Symbol I/O Description 1 -INE I Error amp inverted input terminal 2 CSCP - Timer-latch short-circuit protection capacitor connection terminal 3 VCC - Power supply terminal 4 SCPOD O Open drain output terminal for the short-circuit protection detection. At the timer latch short-circuit protection operation : output "Hi-Z" At the normal operation :output "L" level 5 OUT O External N-ch MOS FET gate drive terminal 6 GND - Ground terminal 7 RT - Triangular waveform oscillation frequency setting resistor connection terminal 8 FB O Error amp output terminal

3 (3/12) BLOCKDIAGRAM VCC SCPOD A -INE VREF Error Amp PWM Comp. Nch Drive OUT A Vo (9.0V) FB VREF (0.5V±1%) SCP Comp (0.7V) (0.3V) Io=400mA at VCC=3.3V GND (0.9V) VIN (1.8V to 6.0V) CSCP (1.0V) S Q R OSC RT Current UVLO ±10% bias VREF (1.27V) VREF Power ON/OFF CTL RT ON/OFF CTL (L:OFF,H:ON)

4 (4/12) ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Rating Unit Power supply voltage VCC - 7 V Output current IOUT - (35) ma Peak output current IOUT Duty 5%(t=1/fosc Duty) (700) ma Power dissipation PD Ta<25 C (490)* mw Storage temperature Tstg to 125 C *When mounted on a 10cm square epoxy double-sided. RECOMMENDED OPERATION CONDITIONS Parameter Symbol Condition Min Typ Max Unit power supply voltage VCC V Input voltage VINE -INE terminal 0 - VCC-0.9 V SCPOD terminal output voltage VSCPOD V SCPOD terminal output current ISCPOD ma Output current IOUT - (-30) - (30) ma Oscillation frequency fosc (1000) khz Timing resistor RT - (3.3) (7.5) (33) kω CSCP terminal capacitor CSCP - - (0.22) (1.0) µf Operating ambient Ta C Temperature Please be advised that this specification might be changed for some reasons such as improvement of performance without any pre-notice.

5 (5/12) ELECTRICAL CHARACTERISTICS Parameter Symbol Pin No. (Ta = 25 C, VCC=3.3V) Condition Min Typ Max Unit 1. Under Voltage Lockout Protection Circuit Block [UVLO] Threshold voltage VTLH 3 VCC = (1.06) (1.26) (1.46) V VTHL 3 VCC = (1.03) (1.23) (1.43) V Hysteresis width VH (0.03)* - V 2. Short-Circuit Detection Circuit Block [SCP] Threshold voltage VTH 2 - (0.95) 1.00 (1.05) V Input Source Current ICSCP 2 CSCP=0.85V (-1.76) (-0.88) (-0.44) µa Reset Voltage VRST 3 VCC = (1.1) (1.3) (1.5) V SCPOD terminal output leak current SCPOD terminal output ON resistor ILEAK 4 SCPOD=3.3V µa RON 4 SCPOD=1mA - (50) (100) Ω 3. Triangular Wave Oscillator Block [OSC] Oscillation frequency fosc 5 (RT=7.5kΩ) khz 4. Soft-Start Block [CS] Charging current ICS 2 CSCP=0V (-16) (-11) (-6) µa 5. Error Amplifier Block [Error Amp] Threshold voltage VTH 1 FB=0.5V (0.495) (0.5) (0.505) V Input bias current IB 1 -INE =0V (-120) (-30) - na Voltage gain AV 8 DC - (70)* - db Frequency band width BW 8 AV=0dB - (1.1)* - MHz Output voltage VOH 8 - (1.14) (1.24) (1.34) V VOL mv Output source current ISOURCE 8 FB=0.5V - (-80) (-50) µa Output sink current ISINK 8 FB=0.5V (100) (300) - µa *:Standard design value

6 (6/12) Parameter Symbol Pin No. (Ta = 25 C, VCC=3.3V) Condition Min Typ Max Unit 6. PWM Comp. Block [PWM Comp.] Maximum duty cycle Dtr 5 (RT=7.5kΩ) (85) (90) (95) % 7. Output block [Drive] Output source current ISOURCE 5 OUT=0V,Duty 5% - (-400)* - ma Output sink current ISINK 5 OUT=3.3V,Duty 5% - (400)* - ma Output ON resistor ROH 5 OUT=-15mA - (4.0)* - Ω ROL 5 OUT=15mA - (3.0) (6.0) Ω 8. General Standby current ICCS 3 (RT=OPEN) - (0) (10) µa Power supply current ICC 3 (RT=7.5kΩ) - (1.2) (1.8) ma *: Standard design value

7 (7/12) FUNCTIONAL MATRIX BY THE PROTECTION CIRCUIT OPERATING Function SCPOD OUT Short-Circuit Protection Hi-Z L UVLO Hi-Z L SETTING THE OUTPUT VOLTAGE Vo R1 R2 -INE (0.5V) Error Amp Vo(V) = 0.5 R2 (R1+R2) CSCP SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY Oscillation frequency can be set by timing resistor (RT ) connected to RT terminal (pin 7). fosc(khz) 3750 RT(k (kω)

8 (8/12) SETTING THE SOFT-START TIME To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitor (CSCP) to the CSCP terminal (pin 2). When IC is turned on (Vcc UVLO threshold voltage), charging starts on capacitor (Cscp) connected to the CSCP terminal at 11 µa. The error amplifier output (FB terminal (pin 8)) is determined by comparison between the lower one of the potentials at two non-inverted input terminals (internal reference voltage ( 0.5V) and CSCP terminal voltage) and inverted input terminal (-INE1 terminal (pin 1)). The FB terminal voltage during the soft-start period is determined by comparison between the CSCP terminal voltage and internal reference voltage ( 0.5V). The DC/DC converter output voltage rises in proportion to the CSCP terminal voltage as capacitor connected to the CSCP terminal is charged. The soft-start time is obtained from the following formula: Soft-start time : ts (time to output 100%) ts (s) CSCP CP (µf) SETTING THE TIMER-LATCH SHORT-CIRCUIT PROTECTION The output level of the error amplifier always does the comparison operation with short-circuit protection comparator (SCP Comp.) as the reference voltage. When the load condition of the DC/DC converter is steady, the short-circuit protection comparator keeps balancing because there is no output change of the error amplifier. At this time, the CSCP terminal (pin 2) is held in the soft-start end voltage ( 0.8V). When the load condition changes rapidly by the load short-circuit etc., the DC/DC converter output voltage drops, and the error amplifier output becomes 0.9V or more, capacitor Cscp is charged further. When the capacitor CSCP is charged to 1.0V the SR latch is set, and the external FET is turned off (dead time is set to 100%). At this time, the SR latch input is closed and the CSCP terminal is held at L level. When the CSCP terminal becomes "L" level, internal N-ch MOS connected with the SCPOD terminal (pin 4) is turned off. The SCPOD terminal is "L" levels at the normal operation, and the SCPOD terminal can be used as a detection signal output terminal at the short-circuit operates. Short-circuit detection time : tcscp tcscp (s) 0.23 Cscp (µf) R1 Vo FB -INE Error Amp R2 (0.88µA) (10.1µA) (0.5V) VREF SCP Comp. (0.9V) CSCP to Drive (1.0V) VREF S R Latch UVLO < Timer latch short-circuit protection circuit>

9 (9/12) FB voltage 1.0V 0.9V 0.8V CSCP voltage 0.7V OSC amplitude 0.3V Output short-circut Output short-circuit Soft-start time ts Short-circuit detection time tcscp t <Soft-start and short-circuit protection timing chart>

10 PACKAGE DIMENSIONS (10/12)

11 (11/12) USAGE PRECAUTIONS Design ground lines on printed circuit with regard to common impedance. Be sure to take measures against electrostatics. Use static protection products or conductive containers for storing semiconductor devices. Use conductive bag or conductive containers for storing or carrying printed boards with semiconductor devices mounted. Be sure to connect ground lines of work table, tools and measurement devices. Establish a ground for human body of a worker using a resistor of 250 kω to 1MΩ serially connected between the body and the ground. Do not apply a negative voltage. If a negative voltage lower than -0.3V, a parasitic transistor may appear on LSI, causing malfunction.

12 (12/12) FUJITSU LINITED For further information please contact Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices Akiruno Technology Center 50 Fuchigami, Akiruno, Tokyo, , Japan Tel: 81(42) Fax: 81(42) Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore Tel: (65) Fax: (65) North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA , USA Tel: (408) Fax: (408) Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) Fax: (408) Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D Dreieich-Buchschlag Germany Tel: (06103) Fax: (06103) All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. All right Reserved. FUJITSU Limited