SG6846A Highly Integrated Green-Mode PWM Controller

Transcription

1 SG6846A Highly Integrated Green-Mode PWM Controller Features Low Startup Current: 8µA Low Operating Current: 3.7mA Peak-Current Mode of Operation with Cycle-by- Cycle Current Limiting PWM Frequency Continuously Decreasing with Burst Mode at Light Loads V DD Over-Voltage Protection (OVP) AC Input Brownout Protection with Hysteresis Constant Output Power Limit (Full AC Input Range) Internal Latch Circuit for OVP, OTP, and OCP Two-level OCP Delay: 600ms Output Short-Circuited Delay Time: 00ms Programmable PWM Frequency with Frequency Hopping OCP Threshold is Half Peak Current Limit Feedback Open-loop Protection with 700ms Delay Built-in Soft-Start Applications General-purpose switch-mode power supplies and flyback power converters, including: Power Adapters Open-frame SMPS SMPS with Surge-current Output, such as for Printers, Scanners, Motor Drivers Description March 0 The SG6846A is especially designed for SMPS with surge-current output, incorporated with a two-level OCP function. Besides the cycle-by-cycle current limiting, if the switching current is higher than two thirds the peakcurrent threshold for 700ms, over-current protection is activated such that the SG6846A is latched off. If the switching current is higher than two thirds of the peak-current threshold for 00ms, and the voltage on the V DD is still higher than V DD-OFF + V, the PWM pulses are latched off immediately once the V DD voltage is lower than V DD-OFF + V. This is useful when an output short circuit occurs. SG6846A also integrates a frequency-hopping function internally to reduce EMI emission of a power supply with minimum line filters. Its built-in synchronized slope compensation provides proprietary internal compensation for constant output power limit over universal AC input range. Also, the gate output is clamped at 8V to protect the external MOSFET from over-voltage damage. Internal soft-start is built-in to soften the stress on the MOSFET and startup current during power on period. Other protection functions include AC input brownout protection with hysteresis, V DD over-voltage protection, and over-temperature protection. For over-temperature protection, an external NTC thermistor can be applied to sense the ambient temperature. When OCP, V DD OVP, or OTP is activated, an internal latch circuit latches off the controller. The PWM pulses stay latched off until the power supply is disconnected from the mains outlet. SG6846A controller is available in 8-pin SOP package. Ordering Information Part Number Operating Temperature Range OCP Latch Package Packing Method SG6846ALSY -40 to +05 C Yes 8-Pin Small Outline Package (SOP) Tape & Reel SG6846ALSZ -40 to +05 C Yes 8-Pin Small Outline Package (SOP) Tape & Reel SG6846ACSY -40 to +05 C No 8-Pin Small Outline Package (SOP) Tape & Reel 008 Fairchild Semiconductor Corporation SG6846A Rev...5

2 Typical Application L AC input EMI Filter + N VIN VDD GATE 8 4 RI SENSE 6 FB GND RT 5 SG6846A Block Diagram Figure. Typical Application + VO+ VO- Figure. Block Diagram 008 Fairchild Semiconductor Corporation SG6846A Rev...5

3 Marking Information SG6846AFTP XXXXXXXXYWWV Marking for SG6846ALSZ (Pb-Free) F: L = OCP Latch T: S = SOP P : Z = Lead Free + ROHS Compatible Null = regular package XXXXXXXX: Wafer Lot Y: Year; WW: Week V: Assembly Location Figure 3. Top Mark : Fairchild logo Z: Plant Code X: Year Code Y: Week Code TT: Die Run Code F: L = OCP Latch, C = OCP auto-recovery T: Package type, S = SOP P: Y = Green Package M: Manufacturing flow code Marking for SG6846ALSY (Green-compound), SG6846ACSY (Green-compound) Figure 4. Top Mark 008 Fairchild Semiconductor Corporation SG6846A Rev...5 3

4 Pin Configuration Pin Definitions GND FB VIN Pin # Name Function Description GND Ground Ground. FB Feedback 3 VIN 4 RI 5 RT Line-voltage Detection Reference Setting Temperature Detection 6 SENSE Current Sense 7 VDD Power Supply 8 GATE Driver Output RI Figure 5. Pin Configuration GATE VDD SENSE The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal from this pin and the currentsense signal from pin 6. Line-voltage detection is used for brownout protection with hysteresis. Constant output power limit over universal AC input range is achieved using this pin. Add a low-pass filter to filter out line ripple on the bulk capacitor. A resistor from the RI pin to ground generates a reference current source that determines the switching frequency. Increasing the resistance reduces the switching frequency. A 6kΩ resistor results in a 65kHz switching frequency. For over-temperature protection, an external NTC thermistor is connected from this pin to the GND pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the RT pin drops below a threshold, PWM output is disabled. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. If the switching current is higher than OCP threshold and lasts for 700ms, SG6846A turns off immediately. This two-level OCP feature is especially suitable for SMPS with surge current output. If an open-circuit failure occurs in the feedback loop, the internal protection circuit disables PWM output as long as V DD exceeds a threshold. The totem-pole output driver for the power MOSFET; internally clamped below 8V. RT 008 Fairchild Semiconductor Corporation SG6846A Rev...5 4

5 Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with respect to GND pin. Symbol Parameter Min. Max. Unit V DD Supply Voltage 5 V V L Input Voltage to FB, SENSE, VIN, RT, RI Pins V P D Power Dissipation at T A <50 C SOP 400 mw Θ JC Thermal Resistance (Junction-to-Case) SOP 54.4 C/W T J Operating Junction Temperature C T STG Storage Temperature Range C T L Lead Temperature, Wave Soldering, 0 Seconds +60 C ESD Human Body Model, JESD-A4 5.0 Charge Device Model, JESD-C0.5 Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. kv Symbol Parameter Min. Max. Unit T A Operating Ambient Temperature C 008 Fairchild Semiconductor Corporation SG6846A Rev...5 5

6 Electrical Characteristics V DD = 5V and T A = 5 C unless otherwise noted. Symbol Parameter Test Condition Min. Typ. Max. Unit V DD Section V DD-OP Continuously Operating Voltage 0 V V DD-ON Turn-on Threshold Voltage V V DD-OFF Turn-off Voltage V V DD-SCP Threshold voltage on VDD for Short-Circuit Protection V DD-OFF +0.5V V DD-OFF +.0V V DD-OFF +.5V V DD-LH Threshold Voltage for Latch-off Release V I DD-ST Startup Current V DD-ON 0.6V 8 30 µa I DD-OP Operating Supply Current GATE Open ma V DD-OVP V DD Over-Voltage Protection (Latch off) V t D-VDDOVP V DD OVP Debounce Time R I = 6kΩ µs I DD-OVP V DD OVP Latch-off Holding Current V DD = 5V µa V IN Section V IN-OFF PWM Turn-off Threshold Voltage V V IN-ON Feedback Input Section PWM Turn-on Threshold Voltage V IN-OFF +0.8 V IN-OFF +0.0 V IN-OFF +0. A V Input-Voltage to Current-Sense Attenuation /3.5 /4.0 /4.5 V/V Z FB Input Impedance kω V FBO FB Pin Open Voltage V V FB-OLP Threshold Voltage of Open-loop Protection V t D-OLP Open-loop Protection Delay Time R I = 6kΩ ms Current Sense Section Z SENSE Input Impedance kω t PD Delay to Output ns t LEB Leading-edge Blanking Time ns V SLOPE Slope Compensation Duty = DCY MAX V V STHV Threshold Voltage for Current Limit V IN = V V V STH3V Threshold Voltage for Current Limit V IN = 3V V V STHV-/3 OCP Threshold Voltage for Current Limit V IN = V V V STH3V-/3 OCP Threshold Voltage for Current Limit V IN = 3V V t D-OCP Delay Time for Over-Current Protection R I = 6kΩ ms t D-SCP Delay Time for Output Short-Circuited Protection R I = 6kΩ; V DD <V DD-SCP V V ms t SS-65KHz R I = 6kΩ ms Period During Startup Time t SS-30KHz R I = 3kΩ ms Continued on following page 008 Fairchild Semiconductor Corporation SG6846A Rev...5 6

7 NO () Normal Operation () I P >/3I PK FB > or V FB-OLP (3) Timing = 00ms Electrical Characteristics (Continued) V DD = 5V and T A = 5 C unless otherwise noted. (5) Timing= 700ms OCP (4) V DD <V SCP NO (7) Gate Off YES YES Figure 6. SG6846A OCP/SCP Logic Flow Diagram (6) NO V DD <=V Symbol Parameter Test Condition Min. Typ. Max. Unit Oscillator Section f OSC f OSC,MAX f OSC,MIN Normal PWM Frequency Maximum PWM Frequency Minimum PWM Frequency SCP Center Frequency R I = 6kΩ, V FB >V N Jitter Range ±3.7 ±4. ±4.7 Center Frequency R I = 3kΩ, V FB >V N Jitter Range ±7.4 ±8.4 ±9.4 Center Frequency R I = 36kΩ, V FB >V N Jitter Range ±.54 ±.90 ±3.6 khz khz khz t hop- R I = 6kΩ, V FB V N Jitter Period t hop-3 R I = 6kΩ, V FB = V G f OSC-G Green-Mode Minimum Frequency R I = 6kΩ khz V FB-N V FB-G FB Pin Frequency Reduction Threshold FB Voltage at f OSC-G Pin, FB voltage R I = 6kΩ, V FB = V N.9..3 V Jitter Range KHz Pin, FB voltage R I = 6kΩ, V FB = V G V Jitter Range KHz S G Slope for Green-Mode Modulation R I = 6kΩ 85 Hz/mV f DV Frequency Variation vs. V DD Deviation V DD =.5V to 0V 5 % f DT Frequency Variation vs. Temperature Deviation T A = -30 to 85 C % ms Continued on following page 008 Fairchild Semiconductor Corporation SG6846A Rev...5 7

8 Electrical Characteristics (Continued) Figure 7. PWM Frequency V DD = 5V and T A = 5 C unless otherwise noted. Symbol Parameter Test Condition Min. Typ. Max. Unit PWM Output Section DCY MAX Maximum Duty Cycle % V OL Output Voltage Low V DD = 5V, I O = 50mA.5 V V OH Output Voltage High V DD = V, I O = 50mA 8 V t R Rising Time GATE = nf 350 ns t F Falling Time GATE = nf 50 ns V CLAMP Gate Output Clamping Voltage V DD = 0V 8 V Over-Temperature Protection (OTP) Section () I RT Output Current of RT Pin R I = 6kΩ µa V RTTH Threshold Voltage for OTP V t DOTP-LATCH Over-Temperature Latch-off Debounce R I = 6kΩ 00 ms R RT-OFF Equivalent Impedance of RT for OTP () R I = 6kΩ kω R I Section RI NOR R I Operating Range 3 36 kω RI MAX Maximum R I Value for Protection 0 MΩ RI MIN Minimum R I Value for Protection 6 kω Note:. The relationship between R RT-OFF and R I is: R V / I V / (70 A 6 / R (K )) () RT-OFF OTP-LATCH-OFF RT RT I 008 Fairchild Semiconductor Corporation SG6846A Rev...5 8

9 Typical Performance Characteristics V DD-ON (V) I DD-ST (µa) Temperature ( ) Figure 8. Turn-on Threshold Voltage (V DD-ON ) vs. Temperature Temperature ( ) V DD-OFF (V) I DD-ST (µa) Temperature ( ) Figure 9. Turn-off Threshold Voltage (V DD-OFF ) vs. Temperature VDD (V) Figure 0. Startup Current (I DD-ST ) vs. Temperature Figure. Startup Current vs. V DD Voltage.5.00 V IN-OFF (V) Temperature ( ) VIN-ON (V) Temperature ( ) 5 Figure. PWM Turn-off Threshold Voltage (V IN-OFF ) vs. Temperature Figure 3. PWM Turn-on Threshold Voltage (V IN-ON ) vs. Temperature 008 Fairchild Semiconductor Corporation SG6846A Rev...5 9

10 Typical Performance Characteristics (Continued) FOSC (khz) VTH-P (V) Temperature ( C) Figure 4. Normal PWM Frequency (f OSC ) vs. Temperature PWM Frequency (khz) VTH-O (V) VFB (V) Figure 5. PWM Frequency vs. FB Voltage VIN ( V ) VIN (V) Figure 6. Current-Limit Threshold vs. V IN Voltage Figure 7. /3 Current-Limit Threshold vs. V IN Voltage I RT (µa) V RTTH (V) Temperature ( ) Temperature ( ) Figure 8. Output Current of RT Pin (I RT ) vs. Temperature Figure 9. FB Output High Voltage (V RTTH ) vs. Temperature 008 Fairchild Semiconductor Corporation SG6846A Rev...5 0

11 Operation Description Startup Operation The turn-on/turn-off thresholds are fixed internally at 6.5V and 0.5V. To enable the SG6846A during startup, the hold-up capacitor must first be charged to 6.5V through the startup resistor. The hold-up capacitor continues to supply V DD before energy can be delivered from the auxiliary winding of the main transformer. The V DD must not drop below 0.5V during this startup process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply V DD during startup. The typical startup current is only 8µA, which allows a high-resistance, low-wattage startup resistor to be used. For constant output power limit over a universal inputvoltage range, the peak-current threshold is adjusted by the voltage of the VIN pin. Since the VIN pin is connected to the rectified AC input line voltage through the resistive divider, a higher line voltage generates a higher V IN voltage. The threshold voltage decreases as the V IN increases, making the maximum output power at high line input voltage equal to that at low line input. The value of R-C network should not be so large it affects the power limit (shown in Figure 0). R and C should put on less than 300 and 000pF, respectively, to minimize power loss. A.5M /0.5W startup resistor and a 0µF/5V V DD hold-up capacitor are sufficient for a universal input range. The required operating current has been reduced to 3.7mA, which enables higher efficiency and reduces the V DD hold-up capacitance requirement. Green-Mode Operation The proprietary green-mode function provides off-time modulation to continuously decrease the switching frequency under light-load conditions. Maximum on-time is limited to provide protection against abnormal conditions. To further reduce power consumption under zero-load condition, the PWM oscillator is completely turned off and the power supply enters burst-mode. This green mode dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using SG6846A can meet restrictive international regulations regarding standby power consumption. Oscillator Operation A resistor connected from the RI pin to GND generates a reference current source, inside the SG6846A, used to determine the PWM frequency. Increasing the resistance decreases the amplitude of the current source and reduces the PWM frequency. Using a 6k resistor results in a corresponding 65kHz switching frequency. The relationship between R I and the switching frequency is: If an open-circuit or short-circuit to ground occurs at the RI pin, the internal protection circuit immediately shuts down the controller. Two-level Over-current Protection (OCP) The cycle-by-cycle current limiting shuts down the PWM immediately when the switching current is over the peak-current threshold. Additionally, when the switching current is higher than the over-current threshold, the internal counter counts down. When the total accumulated counting time is more than ~600ms (R I = 6k ), the controller is latched off and the internal counter counts up. When the switching current is lower than the over-current threshold, the internal counter counts down. When the total accumulated counting time is more than ~600ms (R I = 6k ), the controller is latched off. This two-level OCP protection and up/down counter are especially designed for SMPS with surge current output, such as those for printers, scanners, and motor drivers. Constant Output Power Limit For constant output power limit over universal inputvoltage range, the peak-current threshold is adjusted by the voltage of the VIN pin. Since the VIN pin is connected to the rectified AC input line voltage through the resistive divider, a higher line voltage generates a higher V IN voltage. The threshold voltage decreases as V IN increases, making the maximum output power at high-line input voltage equal to that at low-line input. Brownout Protection Since the VIN pin is connected through a resistive divider to the rectified AC input line voltage, it can also be used for brownout protection. If the V IN voltage is less than 0.7V, the PWM output is shut off. If the V IN is over 0.9V, the PWM output is turned on again. The hysteresis window for on/off is ~0.V. V DD Over-voltage Protection (OVP) V DD over-voltage protection is built in to prevent damage. If V DD is over 3.6V, SG6846A is latched off. Over-Temperature Protection (OTP) An external NTC thermistor can be connected from the RT pin to GND. The impedance of the NTC decreases at high temperatures. When the voltage of the RT pin drops below.05v, the SG6846A is turned off. For protection-mode options, see Ordering Information. fpwm 690 (khz) R (k ) I () 008 Fairchild Semiconductor Corporation SG6846A Rev...5

12 Operation Description (Continued) Noise Immunity Noise from the current sense or the control signal may cause significant pulse-width jitter, particularly in continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoid long PCB traces and component leads. Compensation and filter components should be located near the SG6846A. Figure 0. Current Sense R-C Filter 008 Fairchild Semiconductor Corporation SG6846A Rev...5

13 t RT Reference Circuit P F P P7 CY VZ LF CY 3 4 CXLF R C + CX R FB R5 R3 R R7 U GND FB VIN RI + C3 BD GATE VDD SENSE RT R8 R D R0 + C + C5 R C6 C4 D NTC L4 R3 D3 R6 C7 Q R Figure. Application Circuit for 3V / 6V Output R L3 FB FB 3 U TX 3 0 P6V P6V R5 A K 3 3 C9 C R U3 R6 D4 P3V P3V L C6 + +C D5 R8 R7 C7 + P6V P6V P6V P6V L R9 R +C4 P3V P3V R0 3V +C3 6V +C5 3V 6V Bill of Materials Part No. Value Part No. Value Part No. Value R, R, R3, R4 470KΩ ±5% C4 03 P 630V D3 FR03.0A 00V R8, R9 SMΩ ±% C0,C 0 P KV BD DBL406G R5 6KΩ ±% C6,C7 0 P 50V D4 BYT8-300 R5 K5Ω ±5% C9 P 50V D5 BYV3-50 R3 0Ω ±5% C4,C7 470µ 5V F 50V4A QUICK R8 4K7Ω ±5% C5 0µ 5V L,L.8µH R 5KΩ ±% C3,C6 0µ 50V L4 0µH R7 7KΩ ±5% C 50µ 400V U3 TL43 ±% R6 330Ω ±% C 4.7µ 50V U SG 6846 R9 0KΩ ±% C3 0µ 50V U PC87 R4 0Ω ±5% CX X 0.47µ 75V Q 7NB60 R6, R7 W 0Ω ±5% C8 Y P 50V TX EI-33 R 0KΩ ±5% C5 00µ 50V RT SCK053 R 00KΩ ±5% CX X 0.µF 75V VZ 4ψ 470V R0 887KΩ ±% D N448 R 0KΩ ±% D BYV95C 008 Fairchild Semiconductor Corporation SG6846A Rev...5 3

14 Physical Dimensions PIN ONE INDICATOR (0.33).75 MAX R0.0 R (.04) DETAIL A SCALE: : M C BA C A x B SEATING PLANE 0.0 C GAGE PLANE LAND PATTERN RECOMMENDATION SEE DETAIL A OPTION A - BEVEL EDGE OPTION B - NO BEVEL EDGE NOTES: UNLESS OTHERWISE SPECIFIED 5.60 A) THIS PACKAGE CONFORMS TO JEDEC MS-0, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC7P600X75-8M. E) DRAWING FILENAME: M08AREV3 Figure. 8-Pin Small Outline Package (SOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: Fairchild Semiconductor Corporation SG6846A Rev...5 4

15 008 Fairchild Semiconductor Corporation SG6846A Rev...5 5

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