Military End-Use. Phased Array Applications

Transcription

1 INTEGRATED VCO, GHz Features RF Bandwidth:.5 GHz to.5 GHz Fractional or Integer Modes Ultra Low Phase Noise GHz; 50 MHz Ref. -95 / khz (Frac / Int) - MHz (Open Loop) Figure of Merit (FOM) -22 / -22 dbc/hz (Frac / Int) Typical Applications VSAT Radio Point-to-Point / Multi-Point Radio Test Equipment & Industrial Control 2 bit Step Size, Resolution Hz typ 225 MHz, -bit reference path input Direct FSK Modulation Mode Cycle Slip Prevention Read / Write Serial Port, Chip ID 0 Lead xmm SMT Package: mm2 Military End-Use Phased Array Applications Functional Diagram [] Please refer to the pin description table for details - 0

2 INTEGRATED VCO, GHz General Description The is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The input reference frequency range is 00 khz to 220 MHz while the advanced delta-sigma modulator design in the fractional synthesizer allows both ultra-fi ne step sizes and very low spurious products. The highly integrated structure provides excellent phase noise performance over temperature, shock and process. The is packaged in a leadless QFN x mm surface mount package. The output power is dbm typical, making the ideal for driving the LO port of many of Hittite s Hi Linearity and I/Q mixer products. For theory of operation and register map refer to the PLLs w/ Integrated VCO - Microwave VCOs Operating Guide. To view the Operating Guide, please visit and choose from the Search by Part Number pull down menu. Electrical Specifications, T A = +25 C; VCCVCO, VDDCP, VCCCP = +5V; AVCC, VCCPS VDDPFD, AVDD, RVDD, DVDD, DVDDM, DVDDQ, VDDIO = +.V; A = D = 0V Parameter Condition Min. Typ. Max. Units RF Output Characteristics VCO Output Frequency Range.5.5 GHz VCO Output Power 5 5 dbm VCO Tuning Voltage 2 V VCO Tuning Sensitivity V TUNE = +5V 0 MHz/V Frequency Pulling (into a 2: VSWR) 8 MHz pp Frequency Pushing V TUNE = +5V MHz/V Frequency Drift Rate.2 MHz/ C Sub Harmonic (/2) 0 dbc Harmonic (2 nd ) 2 dbc Harmonic ( rd ) 0 dbc VCO SSB Phase 00 khz Offset (Open Loop) Synthesizer In-Band SSB Phase 0 khz Offset (Frac/Int) Synthesizer Normalized In-Band SSB Phase Noise Floor (Frac/Int) V TUNE = +5V Fvco = GHz Fref = 50 MHz Fvco = GHz Loop BW = 00 khz -0 dbc/hz -95 / -99 dbc/hz -22 / -22 dbc/hz Synthesizer Fractional Spurs [] -5 dbc Synthesizer Frequency Settling Time (00 MHz Step) From. GHz to GHz Loop BW = 00 khz 0 us -Bit Divider Range (Int) N Divider Ratio Bit Divider Range (Frac) N Divider Ratio REF Input Characteristics Max Ref Input Frequency (.V) MHz Min Ref Input Frequency khz Ref Input Sensitivity AC Coupled mv pp Max Ref Input DC Coupled 0 VDDIO V Ref Input Capacitance 5 pf -Bit Ref Divider Range 8 [] Actual spur level is dependent on loop parameters and will increase at division ratios closest to integer boundaries. Number listed is average value. -

3 INTEGRATED VCO, GHz Electrical Specifications (Continued) Phase Detector Parameter Condition Min. Typ. Max. Units Max Phase Detector Frequency (Frac) MHz Max Phase Detector Frequency (Int) 0 0 MHz Min Phase Detector Frequency 00 khz Charge Pump Max Output Current 2 ma Min Output Current 500 μa Charge Pump Noise Input referred 50 MHz Ref. -5 dbc/hz Logic Inputs VIH Input High Voltage VDDIO-0. VDDIO V VIL Input Low Voltage 0 0. V Logic Outputs VOH Output High Voltage VDDIO-0. VDDIO V VOL Output Low Voltage 0 0. V Serial Port Max Clock 50 MHz Power Supply Voltages Analog.V Supplies: AVCC, VDDPFD, AVDD, RVDD, VCCPS AVDD must equal DVDD..5 V Digital Internal Supplies: DVDD, DVDDQ, DVDDM..5 V Digital I/O Supplies: VDDIO Logic I/O V Analog 5V Supplies: VCCVCO, VDDCP, VCCCP VCCCP must equal VDDCP V Power Supply Currents Total Current Consumption (5V) 5 90 ma Total Current Consumption (.V) 90 0 ma Power Down Current [] CSP Disabled 0 μa CSP Enabled 50 μa Bias Reference Voltage Measured with 0 GΩ meter V [] Refers only to the Synthesizer portion of the - 2

4 INTEGRATED VCO, GHz SSB Phase Noise vs. Frequency, Integer Mode -0 SSB Phase Noise vs. GHz, Integer Mode -0 PHASE NOISE (dbc/hz) OFFSET FREQUEY (Hz) SSB Phase Noise Fractional GHz PHASE NOISE (dbc/hz) Temp = 25C Fref = 50 MHz Loop BW = 00 khz.5 GHz.0 GHz.5 GHz Example of Cycle Slip Prevention Hop from.2 to.7 GHz FREQUEY (GHz) Temp = 25C Fref = 50 MHz Loop BW = 00 khz OFFSET FREQUEY (Hz) CSP OFF CSP ON PHASE NOISE (dbc/hz) SSB Phase Noise vs. Reference Freq. & Loop GHz, Integer Mode PHASE NOISE (dbc/hz) Fref = 50 MHz Loop BW = 00 khz OFFSET FREQUEY (Hz) Fref = 0MHz Loop BW= 0kHz Fref = 50MHz Loop BW=00kHz OFFSET FREQUEY (Hz) Typical Reference Sensitivity vs. Frequency,.V [] SENSITIVITY (dbm) R = Max, +25C R = Max, +85C R =, +25C R =, +85C +25 C +85 C -0 C TIME (μsec) FREQUEY (MHz) [] R refers to the reference path division ratio -

5 INTEGRATED VCO, GHz Frequency vs. Tuning Voltage, T= 25 C. Frequency vs. Tuning Voltage, Vcc= +5V... OUTPUT FREQUEY (GHz) Vcc=.75V Vcc=5.00V Vcc=5.25V OUTPUT FREQUEY (GHz) C +85C -0C Sensitivity vs. Tuning Voltage, Vcc= +5V SENSITIVITY (MHz/V) Open Loop VCO SSB Phase Vtune = +5V SSB PHASE NOISE (dbc/hz) TUNING VOLTAGE (VOLTS) +25C +85C -0C TUNING VOLTAGE (VOLTS) +25C +85C -0C Output Power vs. Tuning Voltage, Vcc= +5V OUTPUT POWER (dbm) Open Loop VCO SSB Phase Noise vs. Tuning Voltage SSB PHASE NOISE (dbc/hz) TUNING VOLTAGE (VOLTS) +25C +85C -0C TUNING VOLTAGE (VOLTS) 0KHz Offset 00KHz Offset OFFSET FREQUEY (GHz) TUNING VOLTAGE (VOLTS) -

6 INTEGRATED VCO, GHz Pin Descriptions Pin Number Function Description, 9 -, 22, N/C No Connection. These pins may be connected to RF/DC ground. Performance will not be affected. 2 -, 7, 7, 9 [] These pins must be connected to RF/DC Ground 5 These pins and package bottom must be connected to RF/DC Ground 8 VCCVCO2 [2] +5V Power Supply for VCO 0 VCCVCO VTUNE ACG Control Voltage Input. Modulation port bandwidth dependent on drive source impedance. AC Ground. This pin must be connected to an external capacitor to ground. 5 AVCC Analog Power supply pin for the RF Section. A decoupling capacitor to the ground plane should be placed as close as possible to this pin. Nominally.V VDDCP +5V Power Supply for charge pump digital section 7 VCCCP +5V Power Supply for the charge pump analog section 8 CP Charge pump output 9 VDDPFD Analog Power supply for the phase frequency detector, Nominally.V 20 BIAS [] External bypass decoupling for precision bias circuits,.920v ±20 mv is generated internally 2 AVDD Analog Power supply for analog ref paths, Nominally.V 2 REFN Reference input (Negative or AC coupled to ) 2 REFP Reference input (Positive) 25 RVDD Ref path supply 2 DVDDQ Digital supply for Substrate, Nominally.V 27 CE Chip Enable 28 SEN Serial port latch enable input 29 SCK Serial port clock input 0 SDI Serial port data input DVDD Power supply pin for internal digital circuitry. Nominally.V 2 VDDIO Power Supply for digital I/O driver LD_SDO Lock Detect, Main Serial Data Output or VCO Serial Port Data Out VCCPS Analog Power Supply for Prescaler, Nominally.V 5 DVDDM Digital Power Supply for M-Counter, Nominally.V 8 RFOUT RF output (AC coupled). [] This pin is not connected internally, however, this pin must be connected to to maintain product family pin for pin compatibility. [2] This pin is not connected internally, however, this pin must be connected to Vcc to maintain product family pin for pin compatibility. [] BIAS ref voltage (pin 20) cannot drive an external load, and must be measured with a 0 GOhm meter such as Agilent 0A; a typical 0 Mohm DVM will read erroneously. - 5

7 INTEGRATED VCO, GHz Pin Schematic Equivalents Pins Equivalent Schematic RFOUT VCCVCO VTUNE SEN, CE, SCK, SDI LD_SDO CP -

8 INTEGRATED VCO, GHz Pin Schematic Equivalents (Continued) Pins Equivalent Schematic Bias REFN, REFP - 7

9 INTEGRATED VCO, GHz Header to USB Board Evaluation Circuit VDIGITAL J SCK SDI R8 00K CEN VANALOG VDIGITAL 0 C SDO SEN CEN C0 C8 TLW-0-05-T-D C9 C7 C5 J C 50 Ohm Trace C5 RFout 50 Ohm Co-Planar Trace TCXO LD VDD VC FOUT CE DVDDQ RVDD AVDD 0 VCCVCO 9 8 RFOUT 7 ACG 5 AVCC 5 VDDCP DVDDM 7 VCCCP VCCPS 8 CP LD_SDO 9 2 VDDPFD VDDIO 20 BIAS DVDD /5VVCO C SYNTH C NF VTUNE VCCVCO2 C U SDI SCK SEN REFP REFN C5 R 5 R27 L +5V TP FB C C7.9NF R 82 C.5NF 50 C57 22UF 000 FB 000 THS0IDGN U5 0K C0 NF R JP 2 VDIGITAL VANALOG REFin J2 VANALOG 5VCP C0 2 8 JP 2 00PF C2 NF VANALOG VANALOG 5VCP JP2 2 JP 2 R20 K VDIGITAL C C R 00K TP 50 TP5 50 SDO C2 C8 NF 00PF C R2 0 R28 C.9NF R2 R R K 0 C2 R 20 C C58 C9 NF R2 R25 R22 0 R5 0K C2 Y2 C27 C2 R2 0 C5 C C22 C2 C0 TP R7 0 C29 C 50 C2 C8 C25 VDIGITAL R9 C28 R2 0 R0 0 VTCXO 2-8

10 5.5V /5VVCO R.02K JP5 2 ADJ VOUT /SD VIN BPASS U8 /SD 5VCP ADJ VOUT VIN BPASS LP878MR-ADJ VANALOG C9 U2 LP5900-_V VOUT VIN EN VDIGITAL U LP5900-_V VOUT VIN EN VTCXO U LP5900-_V VOUT VIN EN JP v INTEGRATED VCO, GHz Evaluation Circuit - Continued TP2 50 TP 50 C2 C59 FB2 000 FB 000 C C8 R0.02K R K C7.2NF U9 LP878MR-ADJ C7 0NF C C7 R7 K C C5 R.02K C.2NF C7 0NF C C8 C20 R5 0K C C7 C5 C52 R8 0K C50 C9 C55 C5 R9 0K C5 C5-9

11 INTEGRATED VCO, GHz Absolute Maximum Ratings Nominal.V Supplies to -0.V to +.V Nominal Digital Supply Relative to.v Analog Supply -0.V to +0.V Nominal 5V Supply to -0. to +5.5V Vtune 0 to +5V Storage Temperature -5 to +50 C Max Peak Refl ow Temperature 20 C ESD Sensitivity (HBM) Class A Reliability Information Junction Temperature to Maintain Million Hour MTTF 5 C Nominal Junction Temperature (T=85 C) 0 C Thermal Resistance (Junction to Paddle, 5V Supply) 8. C/W Operating Temperature -0 to +85 C Outline Drawing NOTES:. LEADFRAME MATERIAL: COPPER ALLOY 2. DIMENSIONS ARE IN IHES [MILLIMETERS].. LEAD SPACING TOLERAE IS NON-CUMULATIVE. PAD BURR LENGTH SHALL BE 0.5mm MAXIMUM. PAD BURR HEIGHT SHALL BE 0.05mm MAXIMUM. 5. PACKAGE WARP SHALL NOT EXCEED 0.05mm.. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND. 7. REFER TO HITTITE APPLICATION NOTE FOR SUGGESTED PCB LAND PATTERN. Package Information Part Number Package Body Material Lead Finish MSL Rating Package Marking [] RoHS-compliant Low Stress Injection Molded Plastic 00% matte Sn MSL [] -Digit lot number XXXX H78 XXXX - 0

12 INTEGRATED VCO, GHz Evaluation PCB The circuit board used in the fi nal application should use RF circuit design techniques. Signal lines should have 50 ohm impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation circuit board shown is available from Hittite upon request. -

13 INTEGRATED VCO, GHz List of Materials for Evaluation PCB 7272 [] Item Description J Dual Row Terminal Strip J2, J PCB Mount SMA RF Connector JP - JP Single Row Terminal Strip C, C2, C8 - C9, C0 000 pf Capacitor, 002 Pkg. C2, C5, C, C8, C0, C, C, C9, C22, C2, C2, C5, C55 0 pf Capacitor, 002 Pkg. C, C7, C9, C, C, C, C8, C20, C2, C25, C27 - C29, C - C, C0 - C, 0. μf Capacitor, 002 Pkg. C, C50, C52, C5, C5 C, C7, C2, C5, C8, C9, C5, C8, C7.7 μf Capacitor, 0805 Pkg. C5, C 00 pf Capacitor, 002 Pkg. C, C7 00 pf Capacitor, 002 Pkg. C 500 pf Capacitor, 002 Pkg. C μf Capacitor, 00 Pkg. C7, C7 0,000 pf Capacitor, 002 Pkg. C57 22 μf Tantalum Capacitor, Case D C58, C59.7 μf Tantalum Capacitor, Case B C 900 pf Capacitor, 002 Pkg. FB - FB 000 Ohm 200 ma Ferrite Chip, 0805 Pkg. R, R8 00k Ohm Resistor, 002 Pkg. R2, R7 0 Ohm Resistor, 002 Pkg. R, R7, R20, R k Ohm Resistor, 002 Pkg. R 20 Ohm Resistor, 002 Pkg. R5, R, R5, R8, R9 0k Ohm Resistor, 002 Pkg. R 5 Ohm Resistor, 002 Pkg. R9 0 Ohm Resistor, 002 Pkg. R0, R22, R2 Zero Ohm Resistor, 002 Pkg. R, R, R0.02k Ohm Resistor, 002 Pkg. R 82 Ohm Resistor, 002 Pkg. R2 0 Ohm Resistor, 002 Pkg. TP - TP Test Point PC Compact SMT U Fractional-N Synthesizer, with Integrated VCO U2, U, U Low Noise.V, 00 ma Linear Regulator U5 Low Noise Op-Amp, THS0IDGN U8, U9 5V, 800mA Voltage Regulator Y2.V, 50 MHz VCXO Crystal Oscillator PCB [2] 55 Eval Board [] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: Rogers 50 or Arlon 25FR and FR - 2

14 INTEGRATED VCO, GHz Notes: -