EE29C Spring 2 Lecture 2: High-Speed Link Overview and Environment Eye Diagrams V V t b This is a This is a V e Eye Opening - space between and Elad Alon Dept. of EECS t e With voltage noise With timing noise With Both! EE29C Lecture 2 4 Most Basic Link BE clk Keep in mind that your goal is to receive the same bits that were sent BE = Bit Error ate Average # of wrong received bits / total transmitted bits Simplified example: V in, ampl Voff (voltage only) BE = 2 erfc 2σ noise BE = -2 : (V in,ampl V off ) = 7σ n EE29C Lecture 2 2 BE = -2 : (V in,ampl V off ) = 9.25σ n EE29C Lecture 2 5 Why Wouldn t You Get What You Sent? What About That Wire Line card trace Package On-chip parasitic (termination resistance and device loading capacitance) Package Back plane trace Back plane connector Line card Backplane [Kollipara, DesignCon3] EE29C Lecture 2 3 EE29C Lecture 2 6
Wire Models ICs: usually use lumped models for wires Capacitance almost always matters Sometimes resistance Less often inductance Works because dimensions << λ Let s look at some example λ and size numbers for links High-speed board-to-board connectors Daughtercard (mezzanine-type) Backplane connectors Distance: 8 up to ~4 Data-rate: 5-2Gb/s EE29C Lecture 2 7 EE29C Lecture 2 Chip to chip on a PCB Short and relatively well controlled Packaging usually limits speed Distance: 3-6 Data-rate: -2Gb/s Transmission Lines Quick eview Delay Characteristic Impedance eflections Loss EE29C Lecture 2 8 EE29C Lecture 2 Cables connecting chips on two different PCBs Cables are lossy, but relatively clean if coax Connector transitions usually the bad part Distance: ~m up to ~ s of m (Ethernet) Data-rate: -Gb/s eflections Z ------------------- Z+ Z 2 ------------------- Z+ Sources of eflections : Z - Discontinuities PCB Z mismatch Connector Z mismatch Vias (through) Z mismatch Device parasitics - effective Z mismatch DC Conn BP () Energy conserved (2) Voltages equal EE29C Lecture 2 9 EE29C Lecture 2 2
Skin Effect At high f, current crowds along the surface of the conductor Skin depth proportional to f -½ Model as if skin is δ thick Starts when skin depth equals conductor radius (f s ) Figure 2 Bill Dally Dielectric Loss cont d Attenuation 8 mil wide and m long 5 Ohm strip line. -. -2. -3. -4. F4 oger 435.E+6.E+7.E+8.E+9.E+ Frequency, Hz Kollipara DesignCon3 F4 cheapest most widely used ogers is most expensive high-end systems May not matter that much due to surface roughness EE29C Lecture 2 3 EE29C Lecture 2 6 Skin Effect cont d Skin + Dielectric Losses Skin depth =6.6 um =2.95 um W=2umt=28um =2.8 um Attenuation F4 dielectric, 8 mil wide and m long 5 Ohm strip line.e+6.e+7.e+8.e+9.e+ Frequency, Hz Kollipara DesignCon3 Total loss Conductor loss Dielectric loss Skin Loss f Dielectric loss f : bigger issue at high f EE29C Lecture 2 4 EE29C Lecture 2 7 Dielectric Loss High frequency signals jiggle molecules in the insulator Insulator absorbs energy Effect is approximately linear with frequency Modeled as conductance term in transmission line equations Dielectric loss often specified in terms of loss tangent Transfer function = e α D Length Table 2 Bill Dally EE29C Lecture 2 5 Everything Together: S2 S2: ratio of received vs. transmitted signals Transfer function Breakdown of a 26" F4 channel with 27 mil stubs. PCB traces PCB traces & connectors PCB traces, connectors & s Entire channel..e+ 5.E+8.E+9.5E+9 2.E+9 2.5E+9 3.E+9 3.5E+9 4.E+9 Frequency, Hz EE29C Lecture 2 8
eal Backplane NET: What Not To Do Voltage, V T 2 3 4 5 6 7 8 9 Time, ps EE29C Lecture 2 9 EE29C Lecture 2 22 Practical PCB Differential Lines µ -Strip Strip-line W W S S + - ε r H H H NET: Better Design Differential signaling has nice properties Many sources of noise can be made common-mode Differential impedance raised as f(mutuals) between wires Strong mutual L, C can improve immunity EE29C Lecture 2 2 Voltage, V T 2 3 4 5 6 7 8 9 EE29C Time, Lecture ps 2 23 Coupling Crosstalk Connectors Particularly Tough Near-end xtalk: NET (reverse wave) Far-end xtalk: FET (forward wave) NET in particular can be very destructive Full swing T vs. attenuated signal Good news: can control through design NET typically 3-6%, FET typically -3% EE29C Lecture 2 2 NET FET 55 ps (2-8%) 55 ps (2-8%) 8ps (-9%) 8ps (-9%) AB 4.4% 3.7% DF 3.3% 2.6% GH 3.3% 2.6% JK 4.3% 3.5% Tight footprint constraints Hard to match pairs and even individual lines May compensate skew on line card Also big source of impedance discontinuities EE29C Lecture 2 24
8 6 4 2-2 -4-6 -8 gh-gh conn. (baseline) : Normalized aw and eq pulse response: P length after main 6 Skew Within Link Minimizing Via Stubs Thinner PCB? Better s? Need very tight control to maintain constant % of bit time % skew on 3 line 5ps skew Half of a bit time at Gb/s Good news: connectors relatively short (~2ps) EE29C Lecture 2 25 All expensive:.-2x counterbored blind EE29C Lecture 2 28 eflections evisited Summary T DATA DATA A T Connector-BP transitions A B C T C D A T, T, C T, T, D A2 T, T, B Packaging, chip connection, etc. can all have an effect Entire conferences dedicated to signal integrity (SI) T EE29C Lecture 2 26 EE29C Lecture 2 29 eflections Due To Via Stub Attenuation [db] - -2 9" F4-3 26" F4-4 9" F4, -5 stub -6 26" F4, stub 2 4 6 8 frequency [GHz] Stub : extra piece of T-line hanging off main path Usually leads to resonance (notch) Especially on thick backplanes, s are a big culprit EE29C Lecture 2 27 Implications Transfer function.. F-4 BP, Length: 2", T/S: 3/27 mil...5 2. 2.52 3.2 3.52 4.2 4.53 5.3 5.53 frequency, GHz Need to know range of channels you will face Drives design of the link circuitry Start diving in to that next lecture Don t be a pure circuit weenie Simple fixes to channel may go a long way meas sim oger BP, Length:.5", T/S: 3/27 mil EE29C Lecture 2 3 Transfer function (s2)... 8.56 2.33 3. 3.89 4.67 5.45 6.22 7. Frequency, GHz meas sim