S-50TPS2L-M3 ishay Semiconductors Thyristor High oltage, Phase Control SCR, 50 A 2 3 TO-247AD 3L PRIMARY CHARACTERISTICS 2 (A) (K) (G) 3 I T(A) 50 A DRM / RRM 200 TM (typ.). I GT (typ.) 40 ma T J -40 C to +50 C Package TO-247AD 3L Circuit configuration Single SCR FEATURES Designed and qualified according to JEDEC -JESD 47 50 C maximum operating junction temperature Material categorization: for definitions of compliance please see www.vishay.com/doc?9992 APPLICATIONS Typical usage is in input rectification crowbar (soft start) and AC switch motor control, UPS, welding, and battery charge. DESCRIPTION The S-50TPS2 high voltage series of silicon controlled rectifiers are specifically designed for medium power switching, and phase control applications. The glass passivation technology used, has reliable operation up to 50 C junction temperature. MAJOR RATINGS AND CHARACTERISTICS PARAMETER TEST CONDITIONS ALUES UNITS RRM / DRM 200 T 50 A, T J = 25 C. I T(A) 50 I RMS 79 A I TSM 630 d/dt 0 /μs T J, T Stg -40 to +50 C OLTAGE RATINGS PART NUMBER RRM / DRM, MAXIMUM REPETITIE PEAK AND OFF-STATE OLTAGE RSM, MAXIMUM NON-REPETITIE PEAK REERSE OLTAGE I RRM /I DRM AT 25 C ma S-50TPS2L-M3 200 300 Revision: -Aug-208 Document Number: 95867
S-50TPS2L-M3 ishay Semiconductors ABSOLUTE MAXIMUM RATINGS ALUES PARAMETER SYMBOL TEST CONDITIONS TYP. MAX. Maximum average on-state current I T(A) T C = 2 C, conduction half sine wave - 50 Maximum continuous RMS on-state current as AC switch I T(RMS) - 79 ms sine pulse, rated RRM applied - 530 Peak, one-cycle non-repetitive surge current I TSM ms sine pulse, no voltage reapplied Initial T J = T J - 630 maximum I 2 t for fusing I 2 ms sine pulse, rated RRM applied - 405 t A 2 s ms sine pulse, no voltage reapplied - 986 I 2 t for fusing I 2 t t = 0. ms to ms, no voltage reapplied, T J = 25 C - 9 850 A 2 s Low level value of threshold voltage T(TO) - 0.89 High level value of threshold voltage T(TO)2-0.97 T J = 25 C Low level value of on-state slope resistance r t - 6.77 m High level value of on-state slope resistance r t2-6.32 50 A, T J = 25 C.2.32 On-state voltage T A, T J = 25 C.4.6 Rate of rise of turned-on current di/dt T J = 25 C - 50 A/μs Holding current I H - 300 Anode supply = 6, resistive load, T J = 25 C Latching current I L - 350 ma T J = 25 C - 0.05 Reverse and direct leakage current I RRM /I DRM T J = 25 C - Rate of rise of off-state voltage d/dt T J = T J maximum, linear to 80 % DRM, R g -k = - 0 /μs UNITS A TRIGGERING PARAMETER SYMBOL TEST CONDITIONS TYP. MAX. UNITS Peak gate power P GM - ms sine pulse, no voltage reapplied Average gate power P G(A) - 2.5 W Peak gate current I GM - 2.5 A Peak negative gate voltage - GM - T J = -40 C -.6 Required DC gate voltage to trigger GT T J = 25 C Anode supply = 6 resistive load -.5 T J = 50 C - T J = 25 C Anode supply = 6 resistive load 45 ma T J = -40 C - 60 T J = 50 C - 60 DC gate voltage not to trigger GD - 0.2 T J = 50 C, DRM = rated value DC gate current not to trigger I GD - 3 ma SWITCHING PARAMETER SYMBOL TEST CONDITIONS ALUES UNITS Turn-on time t gt I T = 50 A, D = 50 % DRM, I gt = 300 ma, T J = 25 C.5 I μs Turn-off time t T = 50 A, D = 80 % DRM, d/dt = 20 /μs, t p = 200 μs q 92 I gt = ma, di/dt = A/μs, R =, T J = 50 C Revision: -Aug-208 2 Document Number: 95867
S-50TPS2L-M3 ishay Semiconductors THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS TYP. MAX. UNITS Maximum junction and storage temperature range T J, T Stg -40 50 C Maximum thermal resistance, junction to case R thjc - 0.35 Maximum thermal resistance, junction to ambient R thja - 40 C/W Typical thermal resistance, case to heatsink R thcs Mounting surface, smooth, and greased 0.2 - minimum 6 (5) kgf cm Mounting torque maximum 2 () (lbf in) Marking device Case style Super TO-247AD 3L 50TPS2L R thj-hs CONDUCTION PER JUNCTION SINE HALF-WAE CONDUCTION RECTANGULAR WAE CONDUCTION DEICE UNITS S-50TPS2L-M3 0.43 0.66 0.208 0.299 0.4 0.099 0.68 0.223 0.3 0.494 C/W Maximum Allowable Case Temperature ( C) 50 R thjc (DC) = 0.35 C/W 40 30 20 0 20 30 40 50 60 Average On - State Current (A) Max. Average On-state Power Loss (W) 80 70 60 50 40 30 20 0 RMS limit T j = 50 C 0 20 30 40 50 60 Average On-state Current (A) Fig. - Current Rating Characteristics Fig. 3 - On-State Power Loss Characteristics Maximum Allowable Case Temperature ( C) 50 40 30 20 R thjc (DC) = 0.35 C/W DC 0 20 30 40 50 60 70 80 Average On- state Current (A) Max. Average On-state Power Loss (W) 80 70 60 50 40 30 20 RMS limit T j = 50 C 0 0 20 30 40 50 60 70 80 Average On-state Current (A) DC Fig. 2 - Current Rating Characteristics Fig. 4 - On-State Power Loss Characteristics Revision: -Aug-208 3 Document Number: 95867
S-50TPS2L-M3 ishay Semiconductors Peak Half Sine Wave On-state Current (A) 560 5 460 4 360 3 At any rated load condition and with rated RRM applied following surge. Initial T j = 50 C at 60 Hz 0.0083 s at 50 Hz 0.0 s 260 Number Of Equal Amplitude Half Cycle Current Pulse (N) Fig. 5 - Maximum Non-Repetitive Surge Current Peak Half Sine Wave On- state Current (A) 650 600 550 500 450 400 350 300 Maximum non repetitive surge current vs. pulse train duration. Control of conduction may not be maintained. Initial T j = 50 C No voltage reapplied rated RRM reapplied 250 0.0 0. Number Of Equal Amplitude Half Cycle Current Pulse (N) Fig. 6 - Maximum Non-Repetitive Surge Current Instantaneous On -state Current (A) 0 T J = 25 C T J = 25 C 0.5.0.5 2.0 2.5 3.0 Instantaneous On-state oltage () Fig. 7 - On-State oltage Drop Characteristics Instantaneous Gate oltage () Rectangular gate pulse a) Recommended load line for rated di/dt: 20, 30 Ω t r = 0.5 μs, t p 6 μs b) Recommended load line for 30 % rated di/dt: 20, 65 Ω t r = μs, t p 6 μs GD T J = 50 C T J = 25 C T J = - 40 C b) I a) GD 50TPS2L Series Frequency limited by PG(A) 0. 0.000 0.00 0.0 0. 0 Instantaneous Gate Current (A) Fig. 8 - Gate Characteristics () PGM = W, t p = 500 μs (2) PGM = 50 W, t p = ms (3) PGM = 20 W, t p = 2.5 ms (4) PGM = W, t p = 5 ms (4) (3) (2) () Revision: -Aug-208 4 Document Number: 95867
S-50TPS2L-M3 ishay Semiconductors Z thjc - Transient Thermal Impedance ( C/W) 0.50 0.33 0. 0.25 0.7 0.08 Single Pulse 0.0 0.000 0.00 0.0 0. Square Wave Pulse Duration (s) Fig. 9 - Thermal Impedance Z thjc Characteristics ORDERING INFORMATION TABLE Device code S- 50 T P S 2 L -M3 2 3 4 5 6 7 8 - ishay Semiconductors product 2 - Current code (50 = 50 A) 3 - Circuit configuration: T = thyristor 4 - P = TO-247AD 3L package 5 - Type of silicon: S = standard recovery rectifier 6 - oltage code (2 = 200 ) 7 - Package L = long lead 8 - -M3 = halogen-free, RoHS-compliant, and terminations lead (Pb)-free ORDERING INFORMATION (example) PREFERRED P/N QUANTITY PER TUBE MINIMUM ORDER QUANTITY PACKAGING DESCRIPTION S-50TPS2L-M3 25 contact factory Antistatic plastic tubes Dimensions Part marking information LINKS TO RELATED DOCUMENTS www.vishay.com/doc?95626 www.vishay.com/doc?95007 Revision: -Aug-208 5 Document Number: 95867
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