(anode) V R - V A or V D or VF or V T IA (also: I D, I F, I T ) control terminals (e.g. gate for thyrisr; basis for BJT) - (IR =-I A ) (cathode)
I A I F conducting range A p n K (a) V A (V F ) - A anode I A (I F ) cathode K (b) forward current (1A) reverse leakage current (1 A) V BR reverse breakdown reverse blocking (1V) V Fo V F forward voltage drop VA treshold voltage (1V) (c)
I A conducting area p V A A IA (I D ) A reverse leakage current forward breakover voltage n p n (V D ) (V T ) - K (I T ) G K G V BR I H I G3 >I G2 >I G1 >I G = VA reverse blocking range forward blocking range (a) (b) reverse (or avalanche) breakdown (c)
V G a a limit the conducting range b of the G-K diode c maximal value for the control power (PGmax) c d recommended load line of the control circuit V GT V GD d b VGT, IGT : gate voltage and gate current above which every thyrisr should start conduct VGD, IGD : gate voltage and gate current below which no thyrisr should start conduct I GD I GT I G
V DRM (kv) 4 asymmetrical thyrisr 2 symmetrical thyrisr 1 1 1 4 ff (µs)
I T 2 G _ V _ i G _ 3v _ 1v 1v _ ig 3v V T 1 _ I (a) (b)
A Anode curent I A Anode voltage G K or A voltage peak V d tail current G K or A time G I GR (a) K (b)
n p n p p p n n - => n - or n n p n p n p n p diode IGCT thyrisr (a) (b)
I C saturation C C I C B N P B V CE parameter I B N I B _ E E (a) npn (b) (c) V CE C V CE i C1 <i C2 <i C3 B Darlingn (e) E (d) usable range I B
logi C I Cmax pulse control P max second breakdown limit V CEmax logv CE
I DS I DS Al Gate Source I DS Drain 1 A 9 8 V GS = 15V 1 A 9 8 SiO 2 N -Polysilicium N _ N P N Gate V GS _ V DS _ Source 7 6 5 4 3 2 1V 7 6 5 4 3 2 V GS = 1V 5V Drain 1 5V 1 4V (a) (b) 2 4 6 8 1V V DS 2 4 6 8 1V V DS (c)
logi DS pulse control I Dmax P max V DSmax logv DS
I CE I CE Al SiO 2 N -Polysilicium N _ P P Gate N Emitter G V GE _ C I CE V CE _ 15 A 1 5 V CE = 18V V CE = 15V V CE = 12V V CE = 1V 2 A 15 1 5 V CE = 1V 9V 8V 7V 6V Collecr E V CE = 6V 2 4 6 8 1 V 5V 2 4 6 8 V 1 (a) (b) (c) V CE V CE (d)
V BB V BB R I DS R I DS V DS V DS V GS V GS MOSFET 15V IGBT 15V V GS V GS I DS I CE I tail 1 s VBB VBB V DS V CE
gate n source gate p p p n Drift layer n 4H-SiC substrate
source drain dielectric ohmic gate III N AlGaN barrier GaN buffer Transition layer Si substrate
SOURCE N N PASSIVATION LAYER D GATE P P P P P P P N - N C (a) DRAIN (b) S
PASSIVATION LAYER CATHODE N GATE P P P P P A N N N P G K ANODE
ANODE GATE OXIDE POLYSILICON } N N OXIDE POLYSILICON } } P - (ON - FET SOURCE) P J (ANODE) 1 N(PNP - BASE, OFF - FET DRAIN) (OFF - FET CHANNELS) ON - FET CHANNEL P - (ON - FET SOURCE) A P - (NPN BASE, ON - FET DRAIN) G P BUFFER N SUBSTRATE K CATHODE
U max (kv) 1kV IGCT 5kV 2,5kV 1kV (BJT) IGBT Thyrisr (grid commutation) MOS- FET 1A 1kA 1kA I max (A) 1Hz 1kHz GTO 1kHz 1kHz 1kHz Traction applications (IGBT and IGCT) f max (Hz)
a) Classification of semiconducrs Conduction Types Conduction modulation Forward voltage drop Switching time Switching frequency Control by Control power Driver cost cost/chip area unipolar majority charge carriers Schottky-Diode MOSFET, JFET, SIT none high (exc.: Schottky) short high voltage low low high bipolar majority and minority charge carriers Diode, thyrisr, BJT, IGBT, GTO, IGCT, SITh, MCT injection of charge carriers low medium long low medium current (voltage for IGBT) high (low for IGBT) high (low for IGBT) low (high for SITh) b) Typical values Type BJT/darlingn (with fine structure) V max I max t off P max Frequency [V] [A] [ s] [kva] [khz] 14 6 1 3 5 8 15 5 1 25 1 3 5 15 4.5.5 2 5 5 5 IGBT MOSFET SIT GTO IGCT SITh 3 1 1 6 14 45 6 2 1 2 2 15 3 3 3 6.5.5.1.1.1 1 2 2 tt 3 3.3.3.3 25 5 4 3 2 5 2 2 1 1 3 3.2.5 1 15 15 3 3 3 1 2 1
Semiconducr Darlingn BJT MOSFET IGBT Symbol B E S G S E G E Structure N P N - N N P N - N N P N - P Blocking properties (upper limits) C D C average low high Control circuit complexity & power average high small low minimal low Switching properties Switch-on time Switch-off time Switching loss Conducting properties Current Power losses average long high quite high low short short low low high average average average high rather low Pulse frequency limit for.5 I DC =4kHz =25kHz 1kHz
max forward voltage [V] max reverse voltage [V] max forward current [A] max switching frequency [khz] max power (3-phase) properties Thyrisr (Silicon Controlled Rectifier, SCR) 6-6 -5 5.4 2 MW - low current pulse for switching-on - switch-off requires killer circuit - high overload allowed - low switching frequency Gate Turn-Off Thyrisr (GTO) 8-6 2 6 1 (5 Hz for high power) 1 MW - low current pulse for switching-on - high current pulse for switching-off - lower maximum values than SCR IGCT 45 6-3 2 2 1 MW - improved switching compared GTO - lower switching and conduction losses than GTO en IGBT - snubber circuits not required Bipolar transisr (BJT of HFBT) and darlingn 5 14 5 5 3 1 (5Hz for high power) 8 kw (now replaced by IGBT) - conduction requires continuous basis current - reverse current pulse for switching-off - high switching frequencies Power-Mosfet 5 1 15 2 3 4 kw (5-1kW economical limit, for higher rather IGBT) - quite low pulse for switching on and off - quite high switching fequencies - rather high ON-state resistance - no reverse voltage allowed Insulated-Gate Bipolar Transisr (IGBT) 5 3 2 (lateral) 5 (vertical) 2 1 1 2 kw quite low pulse for switching on and off
BJT SIT MOSFET IGBT GTO SITh IGCT typical (maximum) values for voltage and current 8 V 1 A 6 V 2 A 5 V 2 A 3 V 1 A 4 kv 2 ka 15 V 6 A 4 kv 2 ka typical converter power (three-phase) 22kW 1 kw 5 kw (1 kw) 1 MW 2 MW 1 MW 2 MW typical gate signals U B U G U G U G I B t I G t I G t I G t required power for the control 1 W 5 2 khz 6 f 1 W 5 2 f 1 khz,6 W,2 4 f 2 khz,6 W,2 2 f 1 khz 2 W 1 1 khz 2 f 8 W 4 2 5 khz 1 f 2 W 1 2 3 f 1 khz fp khz 1 1 5 2 2 1 5 2.5 2 1 5 1 3 tal control power Ps W 39 52 21 6 2.7 3.9 1.8 2. 6 9 63 195 3 6 specific control power PST/PSR %.1.13.35 1..5.8.7.8.3.5.35.1.2.4 complexity of the control circuit average - high average minimal high average - high minimal (integrated)
V R also reverse blocking voltage V RRM repetitive R RSM peak (surge) maximal reverse blocking voltage I R reverse leakage current also I RRM repetitive maximal reverse leakage current I RRMS (M) effective maximal reverse leakage current (also for diodes) V RNM non-repetitive V D also forward blocking voltage V DRM repetitive V DSM peak (surge) maximal direct (forward) blocking voltage I D forward leakage current also I DRM repetitive maximal direct leakage current I DRMS (M) effective maximal direct leakage current (for thyrisrs) V DNM non-repetitive I L I H latching current holding current V T on-state voltage forward voltage drop I T direct current (I TAV (M) ; I TRMS (M); I TSM ; I TCM ;...) P T conduction loss (for diodes: T F) dv dt max di dt max t rr reverse recovery time (also for diodes) t off of t q turn-off time = t s (carrier srage time) t f (fall time) t off of t gq gate controlled turn-off time =t gs (carrier srage time) t gf (fall time) t on = t gt gate controlled turn-on time = t gd (delay time t r (rise time) n = t gt gate controlled turn-on time = t gd (delay time t r (rise time) (for thyrisrs) (for GTOs) V G gate voltage V GT minimum gate triggered voltage V GD maximum gate non-triggered voltage I G gate current I GT minimum gate triggered current I GD maximum gate non-triggered current P G control (gate) power
Quantity Symbol Value Unity Conditions Collecr current I C 25 A T C =25ºC Power loss P t 2 W T C =25ºC Avalanche current, periodical I AR Operating temperature limits 5 A T Jmax =15ºC T J -55 ºC - Ts tg 15 Thermal resistance chip-package R thjc.63 ºK/W - min. typ. max. Collecr-emitr break-over voltage Gate voltage (min) Collecr-emir saturation voltage V (BR)CES 1 - - V V GE = I C =.25mA V GE(th) 4. 5. 6 V V GE =V CE, I C =1mA V CE(sat) - 3.5 5 V V GE =15V, I C =15A Inductive load Turn-off time (recovery) Fall time Switching-off power loss (E off =E off1 E off 2 ) t d(off ) - 2 - ns t f - 2 - ns E off1 -.7 - mws E off 2-1 - T j =125ºC V CC =6V V GE =15V I C =15A R g(on) =3.3 R g(off) =3.3