Description United Silicon Carbide's cascode products co-package its highperformance G3 SiC JFETs with a cascode optimized MOSFET to produce the only standard gate drive SiC device in the market today. This series exhibits ultra-low gate charge, but also the best reverse recovery characteristics of any device of similar ratings. These devices are excellent for switching inductive loads, and any application requiring standard gate drive. 35mW - 12V SiC Cascode UJ3C124K3S 1 2 CASE 3 G (1) CASE D (2) S (3) Part Number Package Marking UJ3C124K3S TO-247-3L UJ3C124K3S Features Typical Applications Typical on-resistance R DS(on),typ of 35mW EV charging Maximum operating temperature of 175 C PV inverters Excellent reverse recovery Switch mode power supplies Low gate charge Power factor correction modules Low intrinsic capacitance Motor drives ESD protected, HBM class 2 Induction heating Maximum Ratings Drain-source voltage Gate-source voltage Continuous drain current 1 1 Limited by T J,max 2 Pulse width t p limited by T J,max 3 Starting T J = 25 C Symbol Single pulsed avalanche energy 3 L=15mH, I AS =4.2A Power dissipation Parameter V DS V GS I D I DM E AS P tot Test Conditions DC T C =25 C T C =1 C Pulsed drain current 2 T C =25 C 175 Maximum junction temperature Operating and storage temperature Max. lead temperature for soldering, 1/8 from case for 5 seconds T C =25 C 12-25 to +25 T J,max 175 C T J, T STG -55 to 175 C T L 25 C 65 47 132.3 429 V V A A A mj W Preliminary, November 217 1 For more information go to www.unitedsic.com.
Electrical Characteristics (T J = +25 C unless otherwise specified) Typical Performance - Static 35mW - 12V SiC Cascode UJ3C124K3S Parameter Symbol Test Conditions Min Typ Max Drain-source breakdown voltage BV DS V GS =V, I D =1mA 12 V Total drain leakage current Total gate leakage current Drain-source on-resistance Gate threshold voltage Gate resistance V DS =12V, 8 15 V GS =V, T J =25 C I DSS ma V DS =12V, 35 V GS =V, T J =175 C V DS =V, T j =25 C, I GSS 6 2 ma V GS =-2V / +2V R DS(on) V GS =12V, I D =4A, T J =25 C V GS =12V, I D =4A, T J =175 C 35 45 V G(th) V DS =5V, I D =1mA 4 5 6 V R G f=1mhz, open drain 4.5 W 73 mw Typical Performance - Reverse Diode Diode continuous forward current 1 Diode pulse current 2 Forward voltage Parameter Symbol Test Conditions Min Typ Max I S T C =25 C 65 A I S,pulse T C =25 C 175 A V FSD V GS =V, I F =A, T J =25 C V GS =V, I F =2A, T J =175 C 1.5 2 1.95 V Reverse recovery charge Reverse recovery time Q rr V R =8V, I F =4A, V GS =V,R G_EXT =15W 482 nc di/dt=3a/ms, t rr T J =15 C 39 ns Preliminary, November 217 2 For more information go to www.unitedsic.com.
Typical Performance - Dynamic 35mW - 12V SiC Cascode UJ3C124K3S Parameter symbol Test Conditions Min Typ Max Input capacitance C iss V DS =1V, 15 Output capacitance C oss V GS =V, 21 Reverse transfer capacitance C rss f=1khz 1.7 Effective output capacitance, energy related Effective output capacitance, time related V DS =V to 8V, C oss(er) 112 pf V GS =V V DS =V to 8V, C oss(tr) 28 pf V GS =V C OSS stored energy E oss V DS =8V, V GS =V 35.6 mj Total gate charge Gate-drain charge Gate-source charge Turn-on delay time Rise time Turn-off delay time Fall time Turn-on energy Turn-off energy Total switching energy Q G 51 V Q DS =8V, I D =4A, GD 11 V GS =-5V to 15V Q GS 19 t d(on) 33 t r V DS =8V, I D =4A, Gate Driver=-5V to +15V, 2 t d(off) Turn-on R G,EXT =1W, 63 t f Turn-off R G,EXT =2W 2 E Inductive Load, ON 93 FWD: UJ3D125K E OFF T 299 J =15 C E TOTAL 1229 pf nc ns mj Thermal Characteristics Parameter symbol Test Conditions Min Typ Max Thermal resistance, junction-to-case R qjc.27.35 C/W Preliminary, November 217 3 For more information go to www.unitedsic.com.
On Resistance, R DS_ON (P.U.) Typical Performance Diagrams 35mW - 12V SiC Cascode UJ3C124K3S 12 12 1 1 8 6 4 2 Vgs = 15V Vgs = 1V Vgs = 7.5V Vgs = 7V Vgs = 6.5V 8 6 4 2 Vgs = 15V Vgs = 1V Vgs = 7V Vgs = 6.5V Vgs = 6V 1 2 3 4 5 6 7 8 9 1 1 2 3 4 5 6 7 8 9 1 Figure 1 Typical output characteristics at T J = - 55 C, tp < 25 m s Figure 2 Typical output characteristics at T J = 25 C, tp < 25 m s 12 1 8 Vgs = 15V Vgs = 7V Vgs = 6.5V Vgs = 6V Vgs = 5.5V 2.5 2. 1.5 6 4 1. 2.5 1 2 3 4 5 6 7 8 9 1. -75-5 -25 25 5 75 1 125 15 175 Junction Temperature, T J ( C) Figure 3 Typical output characteristics at T J = 175 C, tp < 25 m s Figure 4 Normalized on-resistance vs. temperature at V GS = 12V and I D = 4A Preliminary, November 217 4 For more information go to www.unitedsic.com.
Threshold Voltage, V th (V) Gate-Source Voltage, V GS (V) On-Resistance, R DS(on) (mw) 35mW - 12V SiC Cascode UJ3C124K3S 15 12 125 1 Tj = 175 C Tj = 25 C Tj = - 55 C 1 8 Tj = -55 C Tj = 25 C Tj = 175 C 75 6 5 4 25 2 2 4 6 8 1 12 1 2 3 4 5 6 7 8 9 1 Gate-Source Voltage, V GS (V) Figure 5 Typical drain-source on-resistance at V GS = 12V Figure 6 Typical transfer characteristics at V DS = 5V 6 2 5 15 4 3 1 2 5 1-1 -5 5 1 15 2 Junction Temperature, T J ( C) -5 1 2 3 4 5 6 Gate Charge, Q G (nc) Figure 7 Threshold voltage vs. T J Figure 8 Typical gate charge at V DS = 5V and I D = 1mA at V DS = 8V and I D = 4A Preliminary, November 217 5 For more information go to www.unitedsic.com.
E OSS (mj) 35mW - 12V SiC Cascode UJ3C124K3S -1-2 Vgs = -5V Vgs = V Vgs = 5V -1-2 Vgs = - 5V Vgs = V Vgs = 5V -3-3 -4-4 -5-5 -6-4 -3-2 -1-6 -4-3 -2-1 Figure 9 3rd quadrant characteristics Figure 1 3rd quadrant characteristics at T J = - 55 C at T J = 25 C 8-1 7-2 6 5-3 -4-5 Vgs = - 5V Vgs = V Vgs = 5V 4 3 2 1-6 -4-3 -2-1 2 4 6 8 1 12 Figure 11 3rd quadrant characteristics at T J = 175 C Figure 12 Typical stored energy in C OSS at V GS = V Preliminary, November 217 6 For more information go to www.unitedsic.com.
Power Dissipation, P tot (W) Thermal Impedance, Z qjc ( C/W) Capacitance, C (pf) DC 35mW - 12V SiC Cascode UJ3C124K3S 1 1 1 1 1 C iss C oss C rss 2 4 6 8 1 12 7 6 5 4 3 2 1-75 -5-25 25 5 75 1 125 15 175 Case Temperature, T C ( C) Figure 13 Typical capacitances at 1kHz and V GS = V Figure 14 DC drain current derating 5 1 4 3 2 1-75 -5-25 25 5 75 1 125 15 175 Case Temperature, T C ( C) Figure 15 Total power dissipation.1.1 D =.5 D =.3 D =.1 D =.5 D =.2 D =.1 Single Pulse.1 1.E-6 1.E-5 1.E-4 1.E-3 1.E-2 1.E-1 Pulse Time, t p (s) Figure 16 Maximum transient thermal impedance Preliminary, November 217 7 For more information go to www.unitedsic.com.
Turn-on Energy, Eon (mj) Turn-Off Energy, Eoff (mj) Switching Energy (mj) 35mW - 12V SiC Cascode UJ3C124K3S 1 1 1 DC 1ms 1ms 1ms 1ms 1ms 15 1 5 V DD = 8V, V GS = -5V/15V R G_ON = 1W, R G_OFF = 2W FWD: UJ3D125K T J = 15 C Etot Eon Eoff.1 1 1 1 1 1 2 3 4 5 Figure 17 Safe operation area Figure 18 Clamped inductive switching energy T c = 25 C, D =, Parameter t p vs. drain current at T J = 15 C 14 8 12 7 1 6 8 6 4 2 V DD = 8V, V GS = -5V/15V I D = 4A, T J = 15 C FWD: UJ3D125K 5 4 3 2 1 V DD = 8V, V GS = -5V/15V I D = 4A, T J = 15 C FWD: UJ3D125K 5 1 15 2 Total External R G, R G,EXT_ON (W) 2 4 6 8 1 Total External R G, R G,EXT_OFF (W) Figure 19 Clamped inductive switching Figure 2 Clamped inductive switching turn-on energy vs. R G,EXT_ON turn-off energy vs. R G,EXT_OFF Preliminary, November 217 8 For more information go to www.unitedsic.com.
Switching Energy (mj) 35mW - 12V SiC Cascode UJ3C124K3S 15 125 1 75 5 Etot Eon Eoff V DD = 8V, V GS = -5V/15V R G_ON = 1W, R G_OFF = 2W FWD: UJ3D125K 25 25 5 75 1 125 15 175 Junction Temperature, T J ( C) Figure 21 Clamped inductive switching energy vs. junction temperature at I D = 4A Applications Information SiC cascodes are enhancement-mode power switches formed by a high-voltage SiC depletion-mode JFET and a low-voltage silicon MOSFET connected in series. The silicon MOSFET serves as the control unit while the SiC JFET provides high voltage blocking in the off state. This combination of devices in a single package provides compatibility with standard gate drivers and offers superior performance in terms of low on-resistance (R DS(on) ), output capacitance (Coss), gate charge (Qg), and reverse recovery charge (Qrr) leading to low conduction and switching losses. The SiC cascodes also provide excellent reverse conduction capability eliminating the need for an external anti-parallel diode. Like other high performance power switches, proper PCB layout design to minimize circuit parasitics is strongly recommended due to the high dv/dt and di/dt rates. An external gate resistor is recommended when the cascode is working in the diode mode in order to achieve the optimum reverse recovery performance. For more information on cascode operation, see www.unitedsic.com. Disclaimer United Silicon Carbide, Inc. reserves the right to change or modify any of the products and their inherent physical and technical specifications without prior notice. United Silicon Carbide, Inc. assumes no responsibility or liability for any errors or inaccuracies within. Information on all products and contained herein is intended for description only. No license, express or implied, to any intellectual property rights is granted within this document. United Silicon Carbide, Inc. assumes no liability whatsoever relating to the choice, selection or use of the United Silicon Carbide, Inc. products and services described herein. Preliminary, November 217 9 For more information go to www.unitedsic.com.